Subversion Repositories Kolibri OS

Rev

Go to most recent revision | Blame | Last modification | View Log | Download | RSS feed

  1. /**************************************************************************
  2.  *
  3.  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4.  * All Rights Reserved.
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the
  8.  * "Software"), to deal in the Software without restriction, including
  9.  * without limitation the rights to use, copy, modify, merge, publish,
  10.  * distribute, sub license, and/or sell copies of the Software, and to
  11.  * permit persons to whom the Software is furnished to do so, subject to
  12.  * the following conditions:
  13.  *
  14.  * The above copyright notice and this permission notice (including the
  15.  * next paragraph) shall be included in all copies or substantial portions
  16.  * of the Software.
  17.  *
  18.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21.  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22.  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23.  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24.  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25.  *
  26.  **************************************************************************/
  27.  
  28. #ifndef __VMWGFX_DRM_H__
  29. #define __VMWGFX_DRM_H__
  30.  
  31. #ifndef __KERNEL__
  32. #include <drm.h>
  33. #endif
  34.  
  35. #define DRM_VMW_MAX_SURFACE_FACES 6
  36. #define DRM_VMW_MAX_MIP_LEVELS 24
  37.  
  38.  
  39. #define DRM_VMW_GET_PARAM            0
  40. #define DRM_VMW_ALLOC_DMABUF         1
  41. #define DRM_VMW_UNREF_DMABUF         2
  42. #define DRM_VMW_CURSOR_BYPASS        3
  43. /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  44. #define DRM_VMW_CONTROL_STREAM       4
  45. #define DRM_VMW_CLAIM_STREAM         5
  46. #define DRM_VMW_UNREF_STREAM         6
  47. /* guarded by DRM_VMW_PARAM_3D == 1 */
  48. #define DRM_VMW_CREATE_CONTEXT       7
  49. #define DRM_VMW_UNREF_CONTEXT        8
  50. #define DRM_VMW_CREATE_SURFACE       9
  51. #define DRM_VMW_UNREF_SURFACE        10
  52. #define DRM_VMW_REF_SURFACE          11
  53. #define DRM_VMW_EXECBUF              12
  54. #define DRM_VMW_GET_3D_CAP           13
  55. #define DRM_VMW_FENCE_WAIT           14
  56. #define DRM_VMW_FENCE_SIGNALED       15
  57. #define DRM_VMW_FENCE_UNREF          16
  58. #define DRM_VMW_FENCE_EVENT          17
  59. #define DRM_VMW_PRESENT              18
  60. #define DRM_VMW_PRESENT_READBACK     19
  61. #define DRM_VMW_UPDATE_LAYOUT        20
  62. #define DRM_VMW_CREATE_SHADER        21
  63. #define DRM_VMW_UNREF_SHADER         22
  64. #define DRM_VMW_GB_SURFACE_CREATE    23
  65. #define DRM_VMW_GB_SURFACE_REF       24
  66. #define DRM_VMW_SYNCCPU              25
  67.  
  68. /*************************************************************************/
  69. /**
  70.  * DRM_VMW_GET_PARAM - get device information.
  71.  *
  72.  * DRM_VMW_PARAM_FIFO_OFFSET:
  73.  * Offset to use to map the first page of the FIFO read-only.
  74.  * The fifo is mapped using the mmap() system call on the drm device.
  75.  *
  76.  * DRM_VMW_PARAM_OVERLAY_IOCTL:
  77.  * Does the driver support the overlay ioctl.
  78.  */
  79.  
  80. #define DRM_VMW_PARAM_NUM_STREAMS      0
  81. #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  82. #define DRM_VMW_PARAM_3D               2
  83. #define DRM_VMW_PARAM_HW_CAPS          3
  84. #define DRM_VMW_PARAM_FIFO_CAPS        4
  85. #define DRM_VMW_PARAM_MAX_FB_SIZE      5
  86. #define DRM_VMW_PARAM_FIFO_HW_VERSION  6
  87. #define DRM_VMW_PARAM_MAX_SURF_MEMORY  7
  88. #define DRM_VMW_PARAM_3D_CAPS_SIZE     8
  89. #define DRM_VMW_PARAM_MAX_MOB_MEMORY   9
  90.  
  91. /**
  92.  * struct drm_vmw_getparam_arg
  93.  *
  94.  * @value: Returned value. //Out
  95.  * @param: Parameter to query. //In.
  96.  *
  97.  * Argument to the DRM_VMW_GET_PARAM Ioctl.
  98.  */
  99.  
  100. struct drm_vmw_getparam_arg {
  101.         uint64_t value;
  102.         uint32_t param;
  103.         uint32_t pad64;
  104. };
  105.  
  106. /*************************************************************************/
  107. /**
  108.  * DRM_VMW_CREATE_CONTEXT - Create a host context.
  109.  *
  110.  * Allocates a device unique context id, and queues a create context command
  111.  * for the host. Does not wait for host completion.
  112.  */
  113.  
  114. /**
  115.  * struct drm_vmw_context_arg
  116.  *
  117.  * @cid: Device unique context ID.
  118.  *
  119.  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  120.  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  121.  */
  122.  
  123. struct drm_vmw_context_arg {
  124.         int32_t cid;
  125.         uint32_t pad64;
  126. };
  127.  
  128. /*************************************************************************/
  129. /**
  130.  * DRM_VMW_UNREF_CONTEXT - Create a host context.
  131.  *
  132.  * Frees a global context id, and queues a destroy host command for the host.
  133.  * Does not wait for host completion. The context ID can be used directly
  134.  * in the command stream and shows up as the same context ID on the host.
  135.  */
  136.  
  137. /*************************************************************************/
  138. /**
  139.  * DRM_VMW_CREATE_SURFACE - Create a host suface.
  140.  *
  141.  * Allocates a device unique surface id, and queues a create surface command
  142.  * for the host. Does not wait for host completion. The surface ID can be
  143.  * used directly in the command stream and shows up as the same surface
  144.  * ID on the host.
  145.  */
  146.  
  147. /**
  148.  * struct drm_wmv_surface_create_req
  149.  *
  150.  * @flags: Surface flags as understood by the host.
  151.  * @format: Surface format as understood by the host.
  152.  * @mip_levels: Number of mip levels for each face.
  153.  * An unused face should have 0 encoded.
  154.  * @size_addr: Address of a user-space array of sruct drm_vmw_size
  155.  * cast to an uint64_t for 32-64 bit compatibility.
  156.  * The size of the array should equal the total number of mipmap levels.
  157.  * @shareable: Boolean whether other clients (as identified by file descriptors)
  158.  * may reference this surface.
  159.  * @scanout: Boolean whether the surface is intended to be used as a
  160.  * scanout.
  161.  *
  162.  * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
  163.  * Output data from the DRM_VMW_REF_SURFACE Ioctl.
  164.  */
  165.  
  166. struct drm_vmw_surface_create_req {
  167.         uint32_t flags;
  168.         uint32_t format;
  169.         uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
  170.         uint64_t size_addr;
  171.         int32_t shareable;
  172.         int32_t scanout;
  173. };
  174.  
  175. /**
  176.  * struct drm_wmv_surface_arg
  177.  *
  178.  * @sid: Surface id of created surface or surface to destroy or reference.
  179.  *
  180.  * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
  181.  * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
  182.  * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
  183.  */
  184.  
  185. struct drm_vmw_surface_arg {
  186.         int32_t sid;
  187.         uint32_t pad64;
  188. };
  189.  
  190. /**
  191.  * struct drm_vmw_size ioctl.
  192.  *
  193.  * @width - mip level width
  194.  * @height - mip level height
  195.  * @depth - mip level depth
  196.  *
  197.  * Description of a mip level.
  198.  * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
  199.  */
  200.  
  201. struct drm_vmw_size {
  202.         uint32_t width;
  203.         uint32_t height;
  204.         uint32_t depth;
  205.         uint32_t pad64;
  206. };
  207.  
  208. /**
  209.  * union drm_vmw_surface_create_arg
  210.  *
  211.  * @rep: Output data as described above.
  212.  * @req: Input data as described above.
  213.  *
  214.  * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
  215.  */
  216.  
  217. union drm_vmw_surface_create_arg {
  218.         struct drm_vmw_surface_arg rep;
  219.         struct drm_vmw_surface_create_req req;
  220. };
  221.  
  222. /*************************************************************************/
  223. /**
  224.  * DRM_VMW_REF_SURFACE - Reference a host surface.
  225.  *
  226.  * Puts a reference on a host surface with a give sid, as previously
  227.  * returned by the DRM_VMW_CREATE_SURFACE ioctl.
  228.  * A reference will make sure the surface isn't destroyed while we hold
  229.  * it and will allow the calling client to use the surface ID in the command
  230.  * stream.
  231.  *
  232.  * On successful return, the Ioctl returns the surface information given
  233.  * in the DRM_VMW_CREATE_SURFACE ioctl.
  234.  */
  235.  
  236. /**
  237.  * union drm_vmw_surface_reference_arg
  238.  *
  239.  * @rep: Output data as described above.
  240.  * @req: Input data as described above.
  241.  *
  242.  * Argument to the DRM_VMW_REF_SURFACE Ioctl.
  243.  */
  244.  
  245. union drm_vmw_surface_reference_arg {
  246.         struct drm_vmw_surface_create_req rep;
  247.         struct drm_vmw_surface_arg req;
  248. };
  249.  
  250. /*************************************************************************/
  251. /**
  252.  * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
  253.  *
  254.  * Clear a reference previously put on a host surface.
  255.  * When all references are gone, including the one implicitly placed
  256.  * on creation,
  257.  * a destroy surface command will be queued for the host.
  258.  * Does not wait for completion.
  259.  */
  260.  
  261. /*************************************************************************/
  262. /**
  263.  * DRM_VMW_EXECBUF
  264.  *
  265.  * Submit a command buffer for execution on the host, and return a
  266.  * fence seqno that when signaled, indicates that the command buffer has
  267.  * executed.
  268.  */
  269.  
  270. /**
  271.  * struct drm_vmw_execbuf_arg
  272.  *
  273.  * @commands: User-space address of a command buffer cast to an uint64_t.
  274.  * @command-size: Size in bytes of the command buffer.
  275.  * @throttle-us: Sleep until software is less than @throttle_us
  276.  * microseconds ahead of hardware. The driver may round this value
  277.  * to the nearest kernel tick.
  278.  * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
  279.  * uint64_t.
  280.  * @version: Allows expanding the execbuf ioctl parameters without breaking
  281.  * backwards compatibility, since user-space will always tell the kernel
  282.  * which version it uses.
  283.  * @flags: Execbuf flags. None currently.
  284.  *
  285.  * Argument to the DRM_VMW_EXECBUF Ioctl.
  286.  */
  287.  
  288. #define DRM_VMW_EXECBUF_VERSION 1
  289.  
  290. struct drm_vmw_execbuf_arg {
  291.         uint64_t commands;
  292.         uint32_t command_size;
  293.         uint32_t throttle_us;
  294.         uint64_t fence_rep;
  295.         uint32_t version;
  296.         uint32_t flags;
  297. };
  298.  
  299. /**
  300.  * struct drm_vmw_fence_rep
  301.  *
  302.  * @handle: Fence object handle for fence associated with a command submission.
  303.  * @mask: Fence flags relevant for this fence object.
  304.  * @seqno: Fence sequence number in fifo. A fence object with a lower
  305.  * seqno will signal the EXEC flag before a fence object with a higher
  306.  * seqno. This can be used by user-space to avoid kernel calls to determine
  307.  * whether a fence has signaled the EXEC flag. Note that @seqno will
  308.  * wrap at 32-bit.
  309.  * @passed_seqno: The highest seqno number processed by the hardware
  310.  * so far. This can be used to mark user-space fence objects as signaled, and
  311.  * to determine whether a fence seqno might be stale.
  312.  * @error: This member should've been set to -EFAULT on submission.
  313.  * The following actions should be take on completion:
  314.  * error == -EFAULT: Fence communication failed. The host is synchronized.
  315.  * Use the last fence id read from the FIFO fence register.
  316.  * error != 0 && error != -EFAULT:
  317.  * Fence submission failed. The host is synchronized. Use the fence_seq member.
  318.  * error == 0: All is OK, The host may not be synchronized.
  319.  * Use the fence_seq member.
  320.  *
  321.  * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
  322.  */
  323.  
  324. struct drm_vmw_fence_rep {
  325.         uint32_t handle;
  326.         uint32_t mask;
  327.         uint32_t seqno;
  328.         uint32_t passed_seqno;
  329.         uint32_t pad64;
  330.         int32_t error;
  331. };
  332.  
  333. /*************************************************************************/
  334. /**
  335.  * DRM_VMW_ALLOC_DMABUF
  336.  *
  337.  * Allocate a DMA buffer that is visible also to the host.
  338.  * NOTE: The buffer is
  339.  * identified by a handle and an offset, which are private to the guest, but
  340.  * useable in the command stream. The guest kernel may translate these
  341.  * and patch up the command stream accordingly. In the future, the offset may
  342.  * be zero at all times, or it may disappear from the interface before it is
  343.  * fixed.
  344.  *
  345.  * The DMA buffer may stay user-space mapped in the guest at all times,
  346.  * and is thus suitable for sub-allocation.
  347.  *
  348.  * DMA buffers are mapped using the mmap() syscall on the drm device.
  349.  */
  350.  
  351. /**
  352.  * struct drm_vmw_alloc_dmabuf_req
  353.  *
  354.  * @size: Required minimum size of the buffer.
  355.  *
  356.  * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
  357.  */
  358.  
  359. struct drm_vmw_alloc_dmabuf_req {
  360.         uint32_t size;
  361.         uint32_t pad64;
  362. };
  363.  
  364. /**
  365.  * struct drm_vmw_dmabuf_rep
  366.  *
  367.  * @map_handle: Offset to use in the mmap() call used to map the buffer.
  368.  * @handle: Handle unique to this buffer. Used for unreferencing.
  369.  * @cur_gmr_id: GMR id to use in the command stream when this buffer is
  370.  * referenced. See not above.
  371.  * @cur_gmr_offset: Offset to use in the command stream when this buffer is
  372.  * referenced. See note above.
  373.  *
  374.  * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
  375.  */
  376.  
  377. struct drm_vmw_dmabuf_rep {
  378.         uint64_t map_handle;
  379.         uint32_t handle;
  380.         uint32_t cur_gmr_id;
  381.         uint32_t cur_gmr_offset;
  382.         uint32_t pad64;
  383. };
  384.  
  385. /**
  386.  * union drm_vmw_dmabuf_arg
  387.  *
  388.  * @req: Input data as described above.
  389.  * @rep: Output data as described above.
  390.  *
  391.  * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
  392.  */
  393.  
  394. union drm_vmw_alloc_dmabuf_arg {
  395.         struct drm_vmw_alloc_dmabuf_req req;
  396.         struct drm_vmw_dmabuf_rep rep;
  397. };
  398.  
  399. /*************************************************************************/
  400. /**
  401.  * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
  402.  *
  403.  */
  404.  
  405. /**
  406.  * struct drm_vmw_unref_dmabuf_arg
  407.  *
  408.  * @handle: Handle indicating what buffer to free. Obtained from the
  409.  * DRM_VMW_ALLOC_DMABUF Ioctl.
  410.  *
  411.  * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
  412.  */
  413.  
  414. struct drm_vmw_unref_dmabuf_arg {
  415.         uint32_t handle;
  416.         uint32_t pad64;
  417. };
  418.  
  419. /*************************************************************************/
  420. /**
  421.  * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
  422.  *
  423.  * This IOCTL controls the overlay units of the svga device.
  424.  * The SVGA overlay units does not work like regular hardware units in
  425.  * that they do not automaticaly read back the contents of the given dma
  426.  * buffer. But instead only read back for each call to this ioctl, and
  427.  * at any point between this call being made and a following call that
  428.  * either changes the buffer or disables the stream.
  429.  */
  430.  
  431. /**
  432.  * struct drm_vmw_rect
  433.  *
  434.  * Defines a rectangle. Used in the overlay ioctl to define
  435.  * source and destination rectangle.
  436.  */
  437.  
  438. struct drm_vmw_rect {
  439.         int32_t x;
  440.         int32_t y;
  441.         uint32_t w;
  442.         uint32_t h;
  443. };
  444.  
  445. /**
  446.  * struct drm_vmw_control_stream_arg
  447.  *
  448.  * @stream_id: Stearm to control
  449.  * @enabled: If false all following arguments are ignored.
  450.  * @handle: Handle to buffer for getting data from.
  451.  * @format: Format of the overlay as understood by the host.
  452.  * @width: Width of the overlay.
  453.  * @height: Height of the overlay.
  454.  * @size: Size of the overlay in bytes.
  455.  * @pitch: Array of pitches, the two last are only used for YUV12 formats.
  456.  * @offset: Offset from start of dma buffer to overlay.
  457.  * @src: Source rect, must be within the defined area above.
  458.  * @dst: Destination rect, x and y may be negative.
  459.  *
  460.  * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
  461.  */
  462.  
  463. struct drm_vmw_control_stream_arg {
  464.         uint32_t stream_id;
  465.         uint32_t enabled;
  466.  
  467.         uint32_t flags;
  468.         uint32_t color_key;
  469.  
  470.         uint32_t handle;
  471.         uint32_t offset;
  472.         int32_t format;
  473.         uint32_t size;
  474.         uint32_t width;
  475.         uint32_t height;
  476.         uint32_t pitch[3];
  477.  
  478.         uint32_t pad64;
  479.         struct drm_vmw_rect src;
  480.         struct drm_vmw_rect dst;
  481. };
  482.  
  483. /*************************************************************************/
  484. /**
  485.  * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
  486.  *
  487.  */
  488.  
  489. #define DRM_VMW_CURSOR_BYPASS_ALL    (1 << 0)
  490. #define DRM_VMW_CURSOR_BYPASS_FLAGS       (1)
  491.  
  492. /**
  493.  * struct drm_vmw_cursor_bypass_arg
  494.  *
  495.  * @flags: Flags.
  496.  * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
  497.  * @xpos: X position of cursor.
  498.  * @ypos: Y position of cursor.
  499.  * @xhot: X hotspot.
  500.  * @yhot: Y hotspot.
  501.  *
  502.  * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
  503.  */
  504.  
  505. struct drm_vmw_cursor_bypass_arg {
  506.         uint32_t flags;
  507.         uint32_t crtc_id;
  508.         int32_t xpos;
  509.         int32_t ypos;
  510.         int32_t xhot;
  511.         int32_t yhot;
  512. };
  513.  
  514. /*************************************************************************/
  515. /**
  516.  * DRM_VMW_CLAIM_STREAM - Claim a single stream.
  517.  */
  518.  
  519. /**
  520.  * struct drm_vmw_context_arg
  521.  *
  522.  * @stream_id: Device unique context ID.
  523.  *
  524.  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  525.  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  526.  */
  527.  
  528. struct drm_vmw_stream_arg {
  529.         uint32_t stream_id;
  530.         uint32_t pad64;
  531. };
  532.  
  533. /*************************************************************************/
  534. /**
  535.  * DRM_VMW_UNREF_STREAM - Unclaim a stream.
  536.  *
  537.  * Return a single stream that was claimed by this process. Also makes
  538.  * sure that the stream has been stopped.
  539.  */
  540.  
  541. /*************************************************************************/
  542. /**
  543.  * DRM_VMW_GET_3D_CAP
  544.  *
  545.  * Read 3D capabilities from the FIFO
  546.  *
  547.  */
  548.  
  549. /**
  550.  * struct drm_vmw_get_3d_cap_arg
  551.  *
  552.  * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
  553.  * @size: Max size to copy
  554.  *
  555.  * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
  556.  * ioctls.
  557.  */
  558.  
  559. struct drm_vmw_get_3d_cap_arg {
  560.         uint64_t buffer;
  561.         uint32_t max_size;
  562.         uint32_t pad64;
  563. };
  564.  
  565. /*************************************************************************/
  566. /**
  567.  * DRM_VMW_FENCE_WAIT
  568.  *
  569.  * Waits for a fence object to signal. The wait is interruptible, so that
  570.  * signals may be delivered during the interrupt. The wait may timeout,
  571.  * in which case the calls returns -EBUSY. If the wait is restarted,
  572.  * that is restarting without resetting @cookie_valid to zero,
  573.  * the timeout is computed from the first call.
  574.  *
  575.  * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
  576.  * on:
  577.  * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
  578.  * stream
  579.  * have executed.
  580.  * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
  581.  * commands
  582.  * in the buffer given to the EXECBUF ioctl returning the fence object handle
  583.  * are available to user-space.
  584.  *
  585.  * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
  586.  * fenc wait ioctl returns 0, the fence object has been unreferenced after
  587.  * the wait.
  588.  */
  589.  
  590. #define DRM_VMW_FENCE_FLAG_EXEC   (1 << 0)
  591. #define DRM_VMW_FENCE_FLAG_QUERY  (1 << 1)
  592.  
  593. #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
  594.  
  595. /**
  596.  * struct drm_vmw_fence_wait_arg
  597.  *
  598.  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  599.  * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
  600.  * @kernel_cookie: Set to 0 on first call. Left alone on restart.
  601.  * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
  602.  * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
  603.  * before returning.
  604.  * @flags: Fence flags to wait on.
  605.  * @wait_options: Options that control the behaviour of the wait ioctl.
  606.  *
  607.  * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
  608.  */
  609.  
  610. struct drm_vmw_fence_wait_arg {
  611.         uint32_t handle;
  612.         int32_t  cookie_valid;
  613.         uint64_t kernel_cookie;
  614.         uint64_t timeout_us;
  615.         int32_t lazy;
  616.         int32_t flags;
  617.         int32_t wait_options;
  618.         int32_t pad64;
  619. };
  620.  
  621. /*************************************************************************/
  622. /**
  623.  * DRM_VMW_FENCE_SIGNALED
  624.  *
  625.  * Checks if a fence object is signaled..
  626.  */
  627.  
  628. /**
  629.  * struct drm_vmw_fence_signaled_arg
  630.  *
  631.  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  632.  * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
  633.  * @signaled: Out: Flags signaled.
  634.  * @sequence: Out: Highest sequence passed so far. Can be used to signal the
  635.  * EXEC flag of user-space fence objects.
  636.  *
  637.  * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
  638.  * ioctls.
  639.  */
  640.  
  641. struct drm_vmw_fence_signaled_arg {
  642.          uint32_t handle;
  643.          uint32_t flags;
  644.          int32_t signaled;
  645.          uint32_t passed_seqno;
  646.          uint32_t signaled_flags;
  647.          uint32_t pad64;
  648. };
  649.  
  650. /*************************************************************************/
  651. /**
  652.  * DRM_VMW_FENCE_UNREF
  653.  *
  654.  * Unreferences a fence object, and causes it to be destroyed if there are no
  655.  * other references to it.
  656.  *
  657.  */
  658.  
  659. /**
  660.  * struct drm_vmw_fence_arg
  661.  *
  662.  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  663.  *
  664.  * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
  665.  */
  666.  
  667. struct drm_vmw_fence_arg {
  668.          uint32_t handle;
  669.          uint32_t pad64;
  670. };
  671.  
  672.  
  673. /*************************************************************************/
  674. /**
  675.  * DRM_VMW_FENCE_EVENT
  676.  *
  677.  * Queues an event on a fence to be delivered on the drm character device
  678.  * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
  679.  * Optionally the approximate time when the fence signaled is
  680.  * given by the event.
  681.  */
  682.  
  683. /*
  684.  * The event type
  685.  */
  686. #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
  687.  
  688. struct drm_vmw_event_fence {
  689.         struct drm_event base;
  690.         uint64_t user_data;
  691.         uint32_t tv_sec;
  692.         uint32_t tv_usec;
  693. };
  694.  
  695. /*
  696.  * Flags that may be given to the command.
  697.  */
  698. /* Request fence signaled time on the event. */
  699. #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
  700.  
  701. /**
  702.  * struct drm_vmw_fence_event_arg
  703.  *
  704.  * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
  705.  * the fence is not supposed to be referenced by user-space.
  706.  * @user_info: Info to be delivered with the event.
  707.  * @handle: Attach the event to this fence only.
  708.  * @flags: A set of flags as defined above.
  709.  */
  710. struct drm_vmw_fence_event_arg {
  711.         uint64_t fence_rep;
  712.         uint64_t user_data;
  713.         uint32_t handle;
  714.         uint32_t flags;
  715. };
  716.  
  717.  
  718. /*************************************************************************/
  719. /**
  720.  * DRM_VMW_PRESENT
  721.  *
  722.  * Executes an SVGA present on a given fb for a given surface. The surface
  723.  * is placed on the framebuffer. Cliprects are given relative to the given
  724.  * point (the point disignated by dest_{x|y}).
  725.  *
  726.  */
  727.  
  728. /**
  729.  * struct drm_vmw_present_arg
  730.  * @fb_id: framebuffer id to present / read back from.
  731.  * @sid: Surface id to present from.
  732.  * @dest_x: X placement coordinate for surface.
  733.  * @dest_y: Y placement coordinate for surface.
  734.  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  735.  * @num_clips: Number of cliprects given relative to the framebuffer origin,
  736.  * in the same coordinate space as the frame buffer.
  737.  * @pad64: Unused 64-bit padding.
  738.  *
  739.  * Input argument to the DRM_VMW_PRESENT ioctl.
  740.  */
  741.  
  742. struct drm_vmw_present_arg {
  743.         uint32_t fb_id;
  744.         uint32_t sid;
  745.         int32_t dest_x;
  746.         int32_t dest_y;
  747.         uint64_t clips_ptr;
  748.         uint32_t num_clips;
  749.         uint32_t pad64;
  750. };
  751.  
  752.  
  753. /*************************************************************************/
  754. /**
  755.  * DRM_VMW_PRESENT_READBACK
  756.  *
  757.  * Executes an SVGA present readback from a given fb to the dma buffer
  758.  * currently bound as the fb. If there is no dma buffer bound to the fb,
  759.  * an error will be returned.
  760.  *
  761.  */
  762.  
  763. /**
  764.  * struct drm_vmw_present_arg
  765.  * @fb_id: fb_id to present / read back from.
  766.  * @num_clips: Number of cliprects.
  767.  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  768.  * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
  769.  * If this member is NULL, then the ioctl should not return a fence.
  770.  */
  771.  
  772. struct drm_vmw_present_readback_arg {
  773.          uint32_t fb_id;
  774.          uint32_t num_clips;
  775.          uint64_t clips_ptr;
  776.          uint64_t fence_rep;
  777. };
  778.  
  779. /*************************************************************************/
  780. /**
  781.  * DRM_VMW_UPDATE_LAYOUT - Update layout
  782.  *
  783.  * Updates the preferred modes and connection status for connectors. The
  784.  * command consists of one drm_vmw_update_layout_arg pointing to an array
  785.  * of num_outputs drm_vmw_rect's.
  786.  */
  787.  
  788. /**
  789.  * struct drm_vmw_update_layout_arg
  790.  *
  791.  * @num_outputs: number of active connectors
  792.  * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
  793.  *
  794.  * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
  795.  */
  796. struct drm_vmw_update_layout_arg {
  797.         uint32_t num_outputs;
  798.         uint32_t pad64;
  799.         uint64_t rects;
  800. };
  801.  
  802.  
  803. /*************************************************************************/
  804. /**
  805.  * DRM_VMW_CREATE_SHADER - Create shader
  806.  *
  807.  * Creates a shader and optionally binds it to a dma buffer containing
  808.  * the shader byte-code.
  809.  */
  810.  
  811. /**
  812.  * enum drm_vmw_shader_type - Shader types
  813.  */
  814. enum drm_vmw_shader_type {
  815.         drm_vmw_shader_type_vs = 0,
  816.         drm_vmw_shader_type_ps,
  817.         drm_vmw_shader_type_gs
  818. };
  819.  
  820.  
  821. /**
  822.  * struct drm_vmw_shader_create_arg
  823.  *
  824.  * @shader_type: Shader type of the shader to create.
  825.  * @size: Size of the byte-code in bytes.
  826.  * where the shader byte-code starts
  827.  * @buffer_handle: Buffer handle identifying the buffer containing the
  828.  * shader byte-code
  829.  * @shader_handle: On successful completion contains a handle that
  830.  * can be used to subsequently identify the shader.
  831.  * @offset: Offset in bytes into the buffer given by @buffer_handle,
  832.  *
  833.  * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
  834.  */
  835. struct drm_vmw_shader_create_arg {
  836.         enum drm_vmw_shader_type shader_type;
  837.         uint32_t size;
  838.         uint32_t buffer_handle;
  839.         uint32_t shader_handle;
  840.         uint64_t offset;
  841. };
  842.  
  843. /*************************************************************************/
  844. /**
  845.  * DRM_VMW_UNREF_SHADER - Unreferences a shader
  846.  *
  847.  * Destroys a user-space reference to a shader, optionally destroying
  848.  * it.
  849.  */
  850.  
  851. /**
  852.  * struct drm_vmw_shader_arg
  853.  *
  854.  * @handle: Handle identifying the shader to destroy.
  855.  *
  856.  * Input argument to the DRM_VMW_UNREF_SHADER ioctl.
  857.  */
  858. struct drm_vmw_shader_arg {
  859.         uint32_t handle;
  860.         uint32_t pad64;
  861. };
  862.  
  863. /*************************************************************************/
  864. /**
  865.  * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
  866.  *
  867.  * Allocates a surface handle and queues a create surface command
  868.  * for the host on the first use of the surface. The surface ID can
  869.  * be used as the surface ID in commands referencing the surface.
  870.  */
  871.  
  872. /**
  873.  * enum drm_vmw_surface_flags
  874.  *
  875.  * @drm_vmw_surface_flag_shareable:     Whether the surface is shareable
  876.  * @drm_vmw_surface_flag_scanout:       Whether the surface is a scanout
  877.  *                                      surface.
  878.  * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
  879.  *                                      given.
  880.  */
  881. enum drm_vmw_surface_flags {
  882.         drm_vmw_surface_flag_shareable = (1 << 0),
  883.         drm_vmw_surface_flag_scanout = (1 << 1),
  884.         drm_vmw_surface_flag_create_buffer = (1 << 2)
  885. };
  886.  
  887. /**
  888.  * struct drm_vmw_gb_surface_create_req
  889.  *
  890.  * @svga3d_flags:     SVGA3d surface flags for the device.
  891.  * @format:           SVGA3d format.
  892.  * @mip_level:        Number of mip levels for all faces.
  893.  * @drm_surface_flags Flags as described above.
  894.  * @multisample_count Future use. Set to 0.
  895.  * @autogen_filter    Future use. Set to 0.
  896.  * @buffer_handle     Buffer handle of backup buffer. SVGA3D_INVALID_ID
  897.  *                    if none.
  898.  * @base_size         Size of the base mip level for all faces.
  899.  *
  900.  * Input argument to the  DRM_VMW_GB_SURFACE_CREATE Ioctl.
  901.  * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
  902.  */
  903. struct drm_vmw_gb_surface_create_req {
  904.         uint32_t svga3d_flags;
  905.         uint32_t format;
  906.         uint32_t mip_levels;
  907.         enum drm_vmw_surface_flags drm_surface_flags;
  908.         uint32_t multisample_count;
  909.         uint32_t autogen_filter;
  910.         uint32_t buffer_handle;
  911.         uint32_t pad64;
  912.         struct drm_vmw_size base_size;
  913. };
  914.  
  915. /**
  916.  * struct drm_vmw_gb_surface_create_rep
  917.  *
  918.  * @handle:            Surface handle.
  919.  * @backup_size:       Size of backup buffers for this surface.
  920.  * @buffer_handle:     Handle of backup buffer. SVGA3D_INVALID_ID if none.
  921.  * @buffer_size:       Actual size of the buffer identified by
  922.  *                     @buffer_handle
  923.  * @buffer_map_handle: Offset into device address space for the buffer
  924.  *                     identified by @buffer_handle.
  925.  *
  926.  * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
  927.  * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
  928.  */
  929. struct drm_vmw_gb_surface_create_rep {
  930.         uint32_t handle;
  931.         uint32_t backup_size;
  932.         uint32_t buffer_handle;
  933.         uint32_t buffer_size;
  934.         uint64_t buffer_map_handle;
  935. };
  936.  
  937. /**
  938.  * union drm_vmw_gb_surface_create_arg
  939.  *
  940.  * @req: Input argument as described above.
  941.  * @rep: Output argument as described above.
  942.  *
  943.  * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
  944.  */
  945. union drm_vmw_gb_surface_create_arg {
  946.         struct drm_vmw_gb_surface_create_rep rep;
  947.         struct drm_vmw_gb_surface_create_req req;
  948. };
  949.  
  950. /*************************************************************************/
  951. /**
  952.  * DRM_VMW_GB_SURFACE_REF - Reference a host surface.
  953.  *
  954.  * Puts a reference on a host surface with a given handle, as previously
  955.  * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
  956.  * A reference will make sure the surface isn't destroyed while we hold
  957.  * it and will allow the calling client to use the surface handle in
  958.  * the command stream.
  959.  *
  960.  * On successful return, the Ioctl returns the surface information given
  961.  * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
  962.  */
  963.  
  964. /**
  965.  * struct drm_vmw_gb_surface_reference_arg
  966.  *
  967.  * @creq: The data used as input when the surface was created, as described
  968.  *        above at "struct drm_vmw_gb_surface_create_req"
  969.  * @crep: Additional data output when the surface was created, as described
  970.  *        above at "struct drm_vmw_gb_surface_create_rep"
  971.  *
  972.  * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
  973.  */
  974. struct drm_vmw_gb_surface_ref_rep {
  975.         struct drm_vmw_gb_surface_create_req creq;
  976.         struct drm_vmw_gb_surface_create_rep crep;
  977. };
  978.  
  979. /**
  980.  * union drm_vmw_gb_surface_reference_arg
  981.  *
  982.  * @req: Input data as described above at "struct drm_vmw_surface_arg"
  983.  * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
  984.  *
  985.  * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
  986.  */
  987. union drm_vmw_gb_surface_reference_arg {
  988.         struct drm_vmw_gb_surface_ref_rep rep;
  989.         struct drm_vmw_surface_arg req;
  990. };
  991.  
  992.  
  993. /*************************************************************************/
  994. /**
  995.  * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
  996.  *
  997.  * Idles any previously submitted GPU operations on the buffer and
  998.  * by default blocks command submissions that reference the buffer.
  999.  * If the file descriptor used to grab a blocking CPU sync is closed, the
  1000.  * cpu sync is released.
  1001.  * The flags argument indicates how the grab / release operation should be
  1002.  * performed:
  1003.  */
  1004.  
  1005. /**
  1006.  * enum drm_vmw_synccpu_flags - Synccpu flags:
  1007.  *
  1008.  * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
  1009.  * hint to the kernel to allow command submissions that references the buffer
  1010.  * for read-only.
  1011.  * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
  1012.  * referencing this buffer.
  1013.  * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
  1014.  * -EBUSY should the buffer be busy.
  1015.  * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
  1016.  * while the buffer is synced for CPU. This is similar to the GEM bo idle
  1017.  * behavior.
  1018.  */
  1019. enum drm_vmw_synccpu_flags {
  1020.         drm_vmw_synccpu_read = (1 << 0),
  1021.         drm_vmw_synccpu_write = (1 << 1),
  1022.         drm_vmw_synccpu_dontblock = (1 << 2),
  1023.         drm_vmw_synccpu_allow_cs = (1 << 3)
  1024. };
  1025.  
  1026. /**
  1027.  * enum drm_vmw_synccpu_op - Synccpu operations:
  1028.  *
  1029.  * @drm_vmw_synccpu_grab:    Grab the buffer for CPU operations
  1030.  * @drm_vmw_synccpu_release: Release a previous grab.
  1031.  */
  1032. enum drm_vmw_synccpu_op {
  1033.         drm_vmw_synccpu_grab,
  1034.         drm_vmw_synccpu_release
  1035. };
  1036.  
  1037. /**
  1038.  * struct drm_vmw_synccpu_arg
  1039.  *
  1040.  * @op:                      The synccpu operation as described above.
  1041.  * @handle:                  Handle identifying the buffer object.
  1042.  * @flags:                   Flags as described above.
  1043.  */
  1044. struct drm_vmw_synccpu_arg {
  1045.         enum drm_vmw_synccpu_op op;
  1046.         enum drm_vmw_synccpu_flags flags;
  1047.         uint32_t handle;
  1048.         uint32_t pad64;
  1049. };
  1050.  
  1051. #endif
  1052.