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  1. /* xgate.h -- Freescale XGATE opcode list
  2.    Copyright 2010, 2011, 2012 Free Software Foundation, Inc.
  3.    Written by Sean Keys (skeys@ipdatasys.com)
  4.  
  5.    This file is part of the GNU opcodes library.
  6.  
  7.    This library is free software; you can redistribute it and/or modify
  8.    it under the terms of the GNU General Public License as published by
  9.    the Free Software Foundation; either version 3, or (at your option)
  10.    any later version.
  11.  
  12.    It is distributed in the hope that it will be useful, but WITHOUT
  13.    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14.    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15.    License for more details.
  16.  
  17.    You should have received a copy of the GNU General Public License
  18.    along with this file; see the file COPYING.  If not, write to the
  19.    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20.    MA 02110-1301, USA. */
  21.  
  22. #ifndef _OPCODE_XGATE_H
  23. #define _OPCODE_XGATE_H
  24.  
  25. /* XGATE CCR flag definitions.  */
  26. #define XGATE_N_BIT   0x08      /* XGN - Sign Flag */
  27. #define XGATE_Z_BIT   0x04      /* XGZ - Zero Flag */
  28. #define XGATE_V_BIT   0x02      /* XGV - Overflow Flag */
  29. #define XGATE_C_BIT   0x01      /* XGC - Carry Flag */
  30.  
  31. /* Access Detail Notation
  32.    V — Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
  33.    P — Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
  34.    r — 8-bit data read: lasts for at least one RISC core cycle
  35.    R — 16-bit data read: lasts for at least one RISC core cycle
  36.    w — 8-bit data write: lasts for at least one RISC core cycle
  37.    W — 16-bit data write: lasts for at least one RISC core cycle
  38.    A — Alignment cycle: no read or write, lasts for zero or one RISC core cycles
  39.    f — Free cycle: no read or write, lasts for one RISC core cycles.  */
  40. #define XGATE_CYCLE_V   0x01
  41. #define XGATE_CYCLE_P   0x02
  42. #define XGATE_CYCLE_r   0x04
  43. #define XGATE_CYCLE_R   0x08
  44. #define XGATE_CYCLE_w   0x10
  45. #define XGATE_CYCLE_W   0x20
  46. #define XGATE_CYCLE_A   0x40
  47. #define XGATE_CYCLE_f   0x80
  48.  
  49. /* Opcode format abbreviations.  */
  50. #define XG_INH          0x0001  /* Inherent.  */
  51. #define XG_I            0x0002  /* 3-bit immediate address.  */
  52. #define XG_R_I          0x0004  /* Register followed by 4/8-bit immediate value.  */
  53. #define XG_R_R          0x0008  /* Register followed by a register.  */
  54. #define XG_R_R_R        0x0010  /* Register followed by two registers.  */
  55. #define XG_R            0x0020  /* Single register.  */
  56. #define XG_PC           0x0040  /* PC relative 10 or 11 bit.  */
  57. #define XG_R_C          0x0080  /* General register followed by ccr register.  */
  58. #define XG_C_R          0x0100  /* CCR register followed by a general register.  */
  59. #define XG_R_P          0x0200  /* General register followed by pc register.  */
  60. #define XG_R_R_I        0x0400  /* Two general registers followed by an immediate value.  */
  61. #define XG_PCREL        0x0800  /* Immediate value that is relative to the current pc.  */
  62.  
  63. /* XGATE operand formats as stored in the XGATE_opcode table.
  64.    They are only used by GAS to recognize operands.  */
  65. #define XGATE_OP_INH            ""
  66. #define XGATE_OP_TRI            "r,r,r"
  67. #define XGATE_OP_DYA            "r,r"
  68. #define XGATE_OP_IMM16          "r,if"
  69. #define XGATE_OP_IMM8           "r,i8"
  70. #define XGATE_OP_IMM4           "r,i4"
  71. #define XGATE_OP_IMM3           "i3"
  72. #define XGATE_OP_MON            "r"
  73. #define XGATE_OP_MON_R_C        "r,c"
  74. #define XGATE_OP_MON_C_R        "c,r"
  75. #define XGATE_OP_MON_R_P        "r,p"
  76. #define XGATE_OP_IDR            "r,r,+"
  77. #define XGATE_OP_IDO5           "r,r,i5"
  78. #define XGATE_OP_REL9           "b9"
  79. #define XGATE_OP_REL10          "ba"
  80. #define XGATE_OP_DYA_MON        "=r"
  81. /* Macro definitions.  */
  82. #define XGATE_OP_IMM16mADD    "r,if; addl addh"
  83. #define XGATE_OP_IMM16mAND    "r,if; andl andh"
  84. #define XGATE_OP_IMM16mCPC    "r,if; cmpl cpch"
  85. #define XGATE_OP_IMM16mSUB    "r,if; subl subh"
  86. #define XGATE_OP_IMM16mLDW    "r,if; ldl ldh"
  87.  
  88. /* CPU variant identification.  */
  89. #define XGATE_V1 0x1
  90. #define XGATE_V2 0x2
  91. #define XGATE_V3 0x4
  92.  
  93. /* Max opcodes per opcode handle.  */
  94. #define MAX_OPCODES     0x05
  95.  
  96. #define MAX_DETECT_CHARS 0x10
  97.  
  98. /* The opcode table definitions.  */
  99. struct xgate_opcode
  100. {
  101.   char * name;                  /* Op-code name.  */
  102.   char * constraints;           /* Constraint chars.  */
  103.   char * format;                /* Bit definitions.  */
  104.   unsigned int sh_format;       /* Shorthand format mask.  */
  105.   unsigned int size;            /* Opcode size in bytes.  */
  106.   unsigned int bin_opcode;      /* Binary opcode with operands masked off.  */
  107.   unsigned char cycles_min;     /* Minimum cpu cycles needed.  */
  108.   unsigned char cycles_max;     /* Maximum cpu cycles needed.  */
  109.   unsigned char set_flags_mask; /* CCR flags set.  */
  110.   unsigned char clr_flags_mask; /* CCR flags cleared.  */
  111.   unsigned char chg_flags_mask; /* CCR flags changed.  */
  112.   unsigned char arch;           /* CPU variant.  */
  113. };
  114.  
  115. /* The opcode table.  The table contains all the opcodes (all pages).
  116.    You can't rely on the order.  */
  117. extern const struct xgate_opcode xgate_opcodes[];
  118. extern const int xgate_num_opcodes;
  119.  
  120. #endif /* _OPCODE_XGATE_H */
  121.