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  1. /*
  2.  * All Video Processing kernels
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40.  
  41. #define DI_ENABLE
  42.  
  43.     #include "DNDI.inc"
  44.    
  45.     #undef  nY_NUM_OF_ROWS
  46.     #define nY_NUM_OF_ROWS      8       // Number of Y rows per block (4 rows for each frame)
  47.     #undef  nUV_NUM_OF_ROWS
  48.     #define nUV_NUM_OF_ROWS     8       // Number of U/V rows per block
  49.  
  50.     #undef  nSMPL_RESP_LEN
  51.     #define nSMPL_RESP_LEN          nSMPL_RESP_LEN_DNDI               // set the number of GRF
  52.     #undef  nDPW_BLOCK_SIZE_HIST
  53.     #define nDPW_BLOCK_SIZE_HIST    nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1    // HIST Block Size for Write is 4x2
  54.     #undef  nDPW_BLOCK_SIZE_DN
  55.     #define nDPW_BLOCK_SIZE_DN      nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4   // DN Block Size for Write is 16x4
  56.    
  57. ////////////////////////////////////// Run the DN Algorithm ///////////////////////////////////////
  58.     #include "DNDI_Command.asm"
  59.  
  60. ////////////////////////////////////// Rearrange for Internal Planar //////////////////////////////
  61.     // move the previous frame Y component to internal planar format
  62.     $for (0; <nY_NUM_OF_ROWS/2; 1) {
  63.         mov (16) uwDEST_Y(%1,0)<1>    ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16)
  64.     }
  65.     // move the previous frame U,V components to internal planar format
  66.     $for (0; <nUV_NUM_OF_ROWS/2; 1) {
  67.         mov (8) uwDEST_U(0,%1*8)<1>   ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2>  //U pixels
  68.         mov (8) uwDEST_V(0,%1*8)<1>   ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2>    //V pixels
  69.     }
  70.     // move the current frame Y component to internal planar format
  71.     $for (0; <nY_NUM_OF_ROWS/2; 1) {
  72.         mov (16) uwDEST_Y(%1+4,0)<1>  ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16)
  73.     }
  74.     // move the current frame U,V components to internal planar format
  75.     $for (0; <nUV_NUM_OF_ROWS/2; 1) {
  76.         mov (8) uwDEST_U(2,%1*8)<1>   ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2>  //U pixels
  77.         mov (8) uwDEST_V(2,%1*8)<1>   ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2>    //V pixels
  78.     }
  79.  
  80. ////////////////////////////////////// Save the STMM Data for Next Run /////////////////////////
  81.     // Write STMM to memory
  82.     shr (1)     rMSGSRC.0<1>:ud        wORIX<0;1,0>:w            1:w     // X origin / 2
  83.     mov (1)     rMSGSRC.1<1>:ud        wORIY<0;1,0>:w                    // Y origin
  84.     mov (1)     rMSGSRC.2<1>:ud        nDPW_BLOCK_SIZE_STMM:ud           // block width and height (8x4)
  85.     mov (8)     mudMSGHDR_STMM(0)<1>   rMSGSRC.0<8;8,1>:ud               // message header  
  86.     mov (8)     mudMSGHDR_STMM(1)<1>   udRESP(nDI_STMM_OFFSET,0)         // Move STMM to MRF
  87.     send (8)    dNULLREG               mMSGHDR_STMM              udDUMMY_NULL    nDATAPORT_WRITE     nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud      
  88.  
  89. ////////////////////////////////////// Save the History Data for Next Run /////////////////////////
  90.     #include "DI_Hist_Save.asm"
  91.  
  92. ////////////////////////////////////// Save the DN Curr Frame for Next Run ////////////////////////
  93.     add (4)     pCF_Y_OFFSET<1>:uw          ubSRC_CF_OFFSET<4;4,1>:ub  npDN_YUV:w
  94.     // check top/bottom field first
  95.     cmp.e.f0.0 (1)  null<1>:w               ubTFLD_FIRST<0;1,0>:ub     1:w
  96.     (f0.0) jmpi (1) TOP_FIELD_FIRST
  97.  
  98. BOTTOM_FIELD_FIRST:
  99.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  100.         mov (4)     mudMSGHDR_DN(1,%1*4)<1>     udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2)
  101.         mov (4)     mudMSGHDR_DN(1,%1*4+4)<1>   udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3)
  102.     }
  103.     jmpi (1) SAVE_DN_CURR
  104.    
  105. TOP_FIELD_FIRST:
  106.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  107.         mov (4)     mudMSGHDR_DN(1,%1*4)<1>     udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2)
  108.         mov (4)     mudMSGHDR_DN(1,%1*4+4)<1>   udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3)
  109.     }
  110. SAVE_DN_CURR:
  111.     mov (2)     rMSGSRC.0<1>:ud        wORIX<2;2,1>:w               // X origin and Y origin
  112.     mov (1)     rMSGSRC.2<1>:ud        nDPW_BLOCK_SIZE_DN:ud        // block width and height (16x4)
  113.     mov (8)     mudMSGHDR_DN(0)<1>     rMSGSRC.0<8;8,1>:ud
  114.     send (8)    dNULLREG    mMSGHDR_DN   udDUMMY_NULL    nDATAPORT_WRITE    nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud
  115.  
  116.  
  117. /////////////////////////////P208 UV Copy 422/////////////////////////////////////////////////////
  118.                 //Read UV through DATAPORT    
  119.     add  (2) rMSGSRC.0<1>:d     wORIX<2;2,1>:w    wSRC_H_ORI_OFFSET<2;2,1>:w       // Source Y Block origin
  120.     mov  (1) rMSGSRC.2<1>:ud    nDPW_BLOCK_SIZE_DN:ud                                                   // Y Block width and height (16x4) (U/V block size is the same)
  121.     mov  (8) mudMSGHDR_DN<1>     rMSGSRC<8;8,1>:ud
  122.     send (8) udBOT_U_IO(0)<1>     mMSGHDR_DN    udDUMMY_NULL    nDATAPORT_READ    nDPMR_MSGDSC+nRESLEN_2+nBI_CURRENT_SRC_UV:ud
  123.  
  124.                 //Write UV through DATAPORT
  125.                 mov (2)     rMSGSRC.0<1>:ud        wORIX<2;2,1>:w               // X origin and Y origin
  126.     mov (1)     rMSGSRC.2<1>:ud        nDPW_BLOCK_SIZE_DN:ud        // block width and height (16x4)
  127.     mov (8)     mudMSGHDR_DN(0)<1>     rMSGSRC.0<8;8,1>:ud
  128.     mov (8)                     mudMSGHDR_DN(1)<1>               udBOT_U_IO(0)<8;8,1>
  129.     mov (8)                     mudMSGHDR_DN(2)<1>               udBOT_U_IO(1)<8;8,1>
  130.     send (8)    dNULLREG    mMSGHDR_DN   udDUMMY_NULL    nDATAPORT_WRITE    nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_UV:ud
  131.