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  1. /*
  2.  * Common header file for all AVC MC kernels
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40. #if !defined(__HEADER__)        // Make sure this file is only included once
  41. #define __HEADER__
  42.  
  43. // Module name: header.inc
  44. //
  45. // Common header file for all AVC MC kernels
  46. //
  47.  
  48. #ifndef COMBINED_KERNEL
  49. #ifdef DEV_CTG
  50.   #define SW_SCOREBOARD         // SW Scoreboard should be enabled for CTG and earlier
  51.   #undef HW_SCOREBOARD          // HW Scoreboard should be disabled for CTG and earlier
  52. #else
  53.   #define HW_SCOREBOARD         // HW Scoreboard should be enabled for ILK and beyond
  54.   #undef SW_SCOREBOARD          // SW Scoreboard should be disabled for ILK and beyond
  55. #endif  // DEV_CTG
  56. #endif  // COMBINED_KERNEL
  57.  
  58. //#define MONO                          // Build Monochrome kernels
  59.  
  60. //  Surface state definition
  61. //
  62. #define DESTY           0
  63. #define DESTUV          1
  64. #define REFYFM0         2
  65. #define REFYFM1         3
  66. #define REFYFM2         4
  67. #define REFYFM3         5
  68. #define REFYFM4         6
  69. #define REFYFM5         7
  70. #define REFYFM6         8
  71. #define REFYFM7         9
  72. #define REFYFM8         10
  73. #define REFYFM9         11
  74. #define REFYFM10        12
  75. #define REFYFM11        13
  76. #define REFYFM12        14
  77. #define REFYFM13        15
  78. #define REFYFM14        16
  79. #define REFYFM15        17
  80. #define REFUVFM0        18
  81. #define REFUVFM1        19
  82. #define REFUVFM2        20
  83. #define REFUVFM3        21
  84. #define REFUVFM4        22
  85. #define REFUVFM5        23
  86. #define REFUVFM6        24
  87. #define REFUVFM7        25
  88. #define REFUVFM8        26
  89. #define REFUVFM9        27
  90. #define REFUVFM10       28
  91. #define REFUVFM11       29
  92. #define REFUVFM12       30
  93. #define REFUVFM13       31
  94. #define REFUVFM14       32
  95. #define REFUVFM15       33
  96.  
  97. .default_execution_size (16)
  98. .default_register_type  :ub
  99.  
  100. //  ----------- Common constant definitions ------------
  101. //
  102. //  Bit position constants
  103. //
  104. #define BIT0    0x01
  105. #define BIT1    0x02
  106. #define BIT2    0x04
  107. #define BIT3    0x08
  108. #define BIT4    0x10
  109. #define BIT5    0x20
  110. #define BIT6    0x40
  111. #define BIT7    0x80
  112. #define BIT8    0x0100
  113. #define BIT9    0x0200
  114. #define BIT10   0x0400
  115. #define BIT11   0x0800
  116. #define BIT12   0x1000
  117. #define BIT13   0x2000
  118. #define BIT14   0x4000
  119. #define BIT15   0x8000
  120. #define BIT16   0x00010000
  121. #define BIT17   0x00020000
  122. #define BIT18   0x00040000
  123. #define BIT19   0x00080000
  124. #define BIT20   0x00100000
  125. #define BIT21   0x00200000
  126. #define BIT22   0x00400000
  127. #define BIT23   0x00800000
  128. #define BIT24   0x01000000
  129. #define BIT25   0x02000000
  130. #define BIT26   0x04000000
  131. #define BIT27   0x08000000
  132. #define BIT28   0x10000000
  133. #define BIT29   0x20000000
  134. #define BIT30   0x40000000
  135. #define BIT31   0x80000000
  136.  
  137. #define GRFWIB  32              // GRF register width in byte
  138. #define GRFWIW  16              // GRF register width in word
  139. #define GRFWID  8               // GRF register width in dword
  140.  
  141. #define INST_SIZE   16          // Instruction size = 128b = 16 Bytes
  142.  
  143. #define REGION(Width,HStride) <Width*HStride;Width,HStride>
  144.  
  145. #define NULLREG         null<1>:ud
  146. #define NULLREGW        null<1>:w
  147.  
  148. #define TOP_FIELD               0
  149. #define BOTTOM_FIELD    1
  150.  
  151. //  M2 - M9 for date writing message payload
  152. .declare    MSGPAYLOAD  Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
  153. .declare    MSGPAYLOADB Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
  154. .declare    MSGPAYLOADW Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
  155. .declare    MSGPAYLOADD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
  156.  
  157. //  ----------- Common Message Descriptor ------------
  158. //
  159. #ifdef DEV_ILK
  160. #define MSG_GW          0x03            // Message Gateway Extended Message Descriptor,
  161. #define DAPREAD         0x04            // Data Port Read Extended Message Descriptor,
  162. #define DAPWRITE        0x05            // Data Port Write Extended Message Descriptor,
  163. #define TS                      0x07            // Thread Spawner Extended Message Descriptor
  164. #define TS_EOT          0x27            // End of Thread Extended Message Descriptor
  165.  
  166. #define EOTMSGDSC       0x02000010      // End of Thread Message Descriptor, don't deference URB handle
  167.  
  168. // Data Port Message Descriptor
  169. #define DWBRMSGDSC_RC    0x02086000     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  170. #define DWBRMSGDSC_RC_TF 0x02086600     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  171. #define DWBRMSGDSC_RC_BF 0x02086700     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  172. #define DWBRMSGDSC_SC    0x0208A000     // DWORD Block Read Message Descriptor, reading from sampler cache = A.
  173. #define DWBRMSGDSC_SC_TF 0x0208E600     // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
  174. #define DWBRMSGDSC_SC_BF 0x0208E700     // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
  175.  
  176. #define DWBWMSGDSC               0x02082000     // DWORD Block Write Message Descriptor
  177. #define DWBWMSGDSC_WC    0x0218A000     // DWORD Block Write Message Descriptor + write commit
  178.  
  179. // Enable Write Commit writeback mesage
  180. #define ENWRCOM         0x00108000      // Enable "write commit" and set response length = 1
  181.  
  182. // Thread Spawner Message Descriptor
  183. #define TSMSGDSC        0x02000011
  184.  
  185. // Message Gateway Message Descriptors
  186. #define OGWMSGDSC       0x02000000      // OpenGateway Message Descriptor
  187. #define CGWMSGDSC       0x02000001      // CloseGateway Message Descriptor
  188. #define FWDMSGDSC       0x02000002      // ForwardMsg Message Descriptor
  189.  
  190. #define NOTIFYMSG       0x00008000      // Send notification with ForwardMsg message
  191.  
  192. #define RESP_LEN(len)   0x100000*len
  193. #define MSG_LEN(len)    0x2000000*len
  194.  
  195. #else   // Pre DEV_ILK
  196.  
  197. #define MSG_GW
  198. #define DAPREAD
  199. #define DAPWRITE
  200. #define TS
  201. #define TS_EOT
  202.  
  203. #define EOTMSGDSC       0x87100010      // End of Thread Message Descriptor, don't deference URB handle
  204.  
  205. // Data Port Message Descriptor
  206. #define DWBRMSGDSC_RC    0x04106000     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  207. #define DWBRMSGDSC_RC_TF 0x04106600     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  208. #define DWBRMSGDSC_RC_BF 0x04106700     // DWORD Block Read Message Descriptor, reading from render cache = 6.
  209. #define DWBRMSGDSC_SC    0x0410A000     // DWORD Block Read Message Descriptor, reading from sampler cache = A.
  210. #define DWBRMSGDSC_SC_TF 0x0410A600     // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
  211. #define DWBRMSGDSC_SC_BF 0x0410A700     // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
  212.  
  213. #define DWBWMSGDSC               0x05102000     // DWORD Block Write Message Descriptor
  214. #define DWBWMSGDSC_WC    0x0511A000     // DWORD Block Write Message Descriptor + write commit
  215.  
  216. // Enable Write Commit writeback mesage
  217. #define ENWRCOM         0x00018000      // Enable "write commit" and set response length = 1
  218.  
  219. // Thread Spawner Message Descriptor
  220. #define TSMSGDSC        0x07100011
  221.  
  222. // Message Gateway Message Descriptors
  223. #define OGWMSGDSC       0x03100000      // OpenGateway Message Descriptor
  224. #define CGWMSGDSC       0x03100001      // CloseGateway Message Descriptor
  225. #define FWDMSGDSC       0x03100002      // ForwardMsg Message Descriptor
  226.  
  227. #define NOTIFYMSG       0x00008000      // Send notification with ForwardMsg message
  228. #define ACKREQMSG       0x00014000      // Acknowledgement required so response length should be 1
  229.  
  230. #define RESP_LEN(len)   0x10000*len
  231. #define MSG_LEN(len)    0x100000*len
  232.  
  233. #endif  // DEV_ILK
  234.  
  235. // Enable frame/field selection in message descriptor
  236. #define ENMSGDSCFM      0x400           // Enable MSGDSC to select frame surface
  237. #define ENMSGDSCTF      0x600           // Enable MSGDSC to select top field surface
  238. #define ENMSGDSCBF      0x700           // Enable MSGDSC to select bottom field surface
  239.  
  240. //  ----------- Message related register ------------
  241. //
  242. #define MSGHDR          m1              // Message Payload Header
  243. #define MSGHDRY         m1              // Message Payload Header register for Y data
  244. #define MSGHDRY0        m1              // Message Payload Header register for Y data
  245. #define MSGHDRY1        m2              // Message Payload Header register for Y data
  246. #define MSGHDRY2        m3              // Message Payload Header register for Y data
  247. #define MSGHDRY3        m4              // Message Payload Header register for Y data
  248. #define MSGHDRUV        m5              // Message Payload Header register for U/V data
  249. #define MSGSRC          r62             // Message source register, should never be used for other purposes
  250. #define MSGDSC          a0.0:ud // Message Descriptor register (type DWORD)
  251.  
  252. #define MH_ORI          MSGSRC.0        // DWORD block R/W message header block offset
  253. #define MH_ORIX         MSGSRC.0        // DWORD block R/W message header X offset
  254. #define MH_ORIY         MSGSRC.1        // DWORD block R/W message header Y offset
  255. #define MH_SIZE         MSGSRC.2        // DWORD block R/W message header block width & height
  256.  
  257. // Data necessary for kernel operations
  258. //
  259. //  Address registers used as pointers
  260. //
  261. //  Note: Please keep the register order as is since they are used in compressed instructions
  262. //
  263. #define     PPREDBUF_Y          a0.4    // Pointer to predicted Y picture
  264. #define     PPREDBUF_Y1         a0.5    // Pointer to predicted Y picture for extended instruction
  265.  
  266. #define     PPREDBUF_UV         a0.4    // Pointer to predicted U/V picture
  267. #define     PPREDBUF_UV1        a0.5    // Pointer to predicted U/V picture for extended instruction
  268.  
  269. #define     PDECBUF             a0.4    // Pointer to decoded picture data
  270. #define     PDECBUF_UD  a0.2    // Pointer to decoded picture data in DWORD unit
  271.  
  272. //  ----------- R63 is reserved for global variables ------------
  273. //
  274. //  Note: Don't program it with values other than what are defined here.
  275.  
  276. #define G_REG           r63
  277.  
  278. #define RETURN_REG      G_REG.0         // Return pointer for all sub-routine calls (type DWORD)
  279. #define RETURN_REG1     G_REG.1         // Return pointer for second-level calls
  280.  
  281. #define I_ORIX          G_REG.13        // :uw, H. origin of the macroblock in pixel unit, don't overwrite in-line data
  282. #define I_ORIY          G_REG.14        // :uw, V. origin of the macroblock in pixel unit, don't overwrite in-line data
  283.  
  284. //  Macros
  285. //
  286. //  Note: For macros that require multiple line expansion, insert "\n" at the end of each line.
  287. //
  288. #define GRF(reg)        r##reg
  289. #ifdef DEV_ILK
  290. #define END_THREAD                      send (8) NULLREG MSGHDR r0:ud TS_EOT    EOTMSGDSC
  291. #else
  292. #define END_THREAD                      send (8) NULLREG MSGHDR r0:ud EOTMSGDSC
  293. #endif  // DEV_ILK
  294.  
  295. #define CALL(subFunc, skipInst) add (1) RETURN_REG<1>:ud   ip:ud        (1+skipInst)*INST_SIZE \n\
  296.                                 jmpi (1) subFunc
  297.  
  298. #define CALL_1(subFunc, skipInst)       add (1) RETURN_REG1<1>:ud   ip:ud       (1+skipInst)*INST_SIZE \n\
  299.                                 jmpi (1) subFunc
  300.  
  301. #define RETURN          mov (1) ip:ud   RETURN_REG<0;1,0>:ud            // Return to calling module
  302. #define RETURN_1        mov (1) ip:ud   RETURN_REG1<0;1,0>:ud           // Return to second-level calling module
  303.                                                                                                                                 // To support iterative calling
  304. #ifdef SW_SCOREBOARD    
  305.  
  306. #ifdef DEV_CTG_A
  307.   #define LEADING_THREAD        1               // For CTG A, no SRT is needed. Only PRT is necessary
  308. #else
  309.   #define LEADING_THREAD        0               // For CTG B0 and beyond, PRT doesn't take into debug count
  310.   #define DOUBLE_SB                                     // Scoreboard size needs to be doubled
  311. #endif
  312.  
  313. #ifdef  DOUBLE_SB                                       // Scoreboard size needs to be doubled
  314.   #define SB_MASK               0x1ff           // Scoreboard wrap-around mask (for 512 entries)
  315. #else
  316.   #define SB_MASK               0xff            // Scoreboard wrap-around mask (for 256 entries)
  317. #endif  // defined(DOUBLE_SB)
  318.  
  319. // Scoreboard related definitions
  320.  
  321. #define TEMPX           r50
  322. #define TEMPY           r51
  323. #define DELTA           r52
  324.  
  325. #define M05_STORE       r0.13           // :uw, reuse r0.6:ud upper-word to store M0.5 header information for scoreboard
  326.  
  327.  
  328. #endif  // SW_SCOREBOARD
  329.  
  330. // End of header.inc
  331.  
  332. #endif  // !defined(__HEADER__)
  333.  
  334.