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  1. /*
  2.  * Copyright © <2010>, Intel Corporation.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * This file was originally licensed under the following license
  25.  *
  26.  *  Licensed under the Apache License, Version 2.0 (the "License");
  27.  *  you may not use this file except in compliance with the License.
  28.  *  You may obtain a copy of the License at
  29.  *
  30.  *      http://www.apache.org/licenses/LICENSE-2.0
  31.  *
  32.  *  Unless required by applicable law or agreed to in writing, software
  33.  *  distributed under the License is distributed on an "AS IS" BASIS,
  34.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  35.  *  See the License for the specific language governing permissions and
  36.  *  limitations under the License.
  37.  *
  38.  */
  39. ////////// AVC LDB filter vertical UV ///////////////////////////////////////////////////////
  40. //
  41. //      This filter code prepares the src data and control data for ILDB filtering on all vertical edges of UV.
  42. //
  43. //      It sssumes the data for vertical de-blocking is already transposed.  
  44. //
  45. //              Chroma:
  46. //
  47. //              +-------+-------+
  48. //              |               |               |
  49. //              |               |               |
  50. //              |               |               |
  51. //              +-------+-------+
  52. //              |               |               |
  53. //              |               |               |
  54. //              |               |               |
  55. //              +-------+-------+
  56. //
  57. //              V0              V1             
  58. //              Edge    Edge   
  59. //
  60. /////////////////////////////////////////////////////////////////////////////
  61.  
  62. #if defined(_DEBUG)
  63.         mov             (1)             EntrySignatureC:w                       0xBBBC:w
  64. #endif 
  65.  
  66. //=============== Chroma deblocking ================
  67.  
  68.         and.z.f0.0  (1) null:w          r[ECM_AddrReg, BitFlags]:ub             FilterLeftMbEdgeFlag:w          // Check for FilterLeftMbEdgeFlag
  69. //    (f0.0)    jmpi    BYPASS_EXT_LEFT_EDGE_UV
  70.  
  71.         // Get vertical border edge control data.  
  72.        
  73.         // Get Luma maskA and maskB    
  74.         shr (16)        TempRow0(0)<1>          r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<0;1,0>:uw            RRampW(0)
  75.         shr (16)        TempRow1(0)<1>          r[ECM_AddrReg, wEdgeCntlMapB_ExtLeftVert0]<0;1,0>:uw            RRampW(0)
  76.        
  77.     (f0.0)      jmpi    ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_UV)
  78.  
  79.         // Extract UV MaskA and MaskB from every other bit of Y masks
  80.         and.nz.f0.0 (8) null:w                  TempRow0(0)<16;8,2>             1:w
  81.         and.nz.f0.1 (8) null:w                  TempRow1(0)<16;8,2>             1:w
  82.  
  83. //---------- Deblock U external edge ----------
  84.         //      p1 = Prev MB U row 0
  85.         //      p0 = Prev MB U row 1
  86.         //      q0 = Cur MB U row 0
  87.         //      q1 = Cur MB U row 1
  88.         mov (1) P_AddrReg:w             PREV_MB_U_BASE:w                                                                        { NoDDClr }
  89.         mov (1) Q_AddrReg:w             SRC_MB_U_BASE:w                                                                         { NoDDChk }
  90.  
  91.         // alpha = bAlphaLeft0_Cb, beta = bBetaLeft0_Cb
  92.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaLeft0_Cb]<2;2,1>:ub                                { NoDDClr }
  93.         // tc0 has bTc0_v30_0_Cb + bTc0_v20_0_Cb + bTc0_v10_0_Cb + bTc0_v00_0_Cb
  94.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_v00_0_Cb]<4;4,1>:ub                                 { NoDDChk }
  95.        
  96.         // UV MaskA and MaskB
  97.         mov (2)         MaskA<1>:uw                     f0.0<2;2,1>:uw
  98.  
  99.         CALL(FILTER_UV, 1)     
  100.  
  101. //---------- Deblock V external edge ----------
  102.         //      p1 = Prev MB V row 0
  103.         //      p0 = Prev MB V row 1
  104.         //      q0 = Cur MB V row 0
  105.         //      q1 = Cur MB V row 1
  106.         mov (1) P_AddrReg:w             PREV_MB_V_BASE:w                                                                        { NoDDClr }            
  107.         mov (1) Q_AddrReg:w             SRC_MB_V_BASE:w                                                                         { NoDDChk }
  108.  
  109.         // for vert edge: alpha = bAlphaLeft0_Cr, beta = bBetaLeft0_Cr
  110.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaLeft0_Cr]<2;2,1>:ub                                { NoDDClr }
  111.        
  112.         // tc0 has bTc0_v30_0_Cr + bTc0_v20_0_Cr + bTc0_v10_0_Cr + bTc0_v00_0_Cr
  113.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_v00_0_Cr]<4;4,1>:ub                                 { NoDDChk }
  114.  
  115.         // UV MaskA and MaskB
  116.         mov (2)         f0.0<1>:uw              MaskA<2;2,1>:uw
  117.  
  118.         CALL(FILTER_UV, 1)     
  119.  
  120.  
  121. ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_UV):
  122.         // Set EdgeCntlMap2 = 0, so it always uses bS < 4 algorithm.
  123.         // Same alpha and beta for all internal vert and horiz edges
  124.  
  125.  
  126.         //***** Need to take every other bit to form U or V maskA
  127.         // Get Luma maskA and maskB    
  128.         shr (16)        TempRow0(0)<1>          r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]<0;1,0>:uw               RRampW(0)
  129.  
  130. //---------- Deblock U internal edge ----------
  131.         //      p1 = Cur MB U row 2
  132.         //      p0 = Cur MB U row 3
  133.         //      q0 = Cur MB U row 4
  134.         //      q1 = Cur MB U row 5
  135.         mov (1) P_AddrReg:w             4*UV_ROW_WIDTH+SRC_MB_U_BASE:w                                  { NoDDClr }
  136.         mov (1) Q_AddrReg:w             8*UV_ROW_WIDTH+SRC_MB_U_BASE:w                                  { NoDDChk }
  137.  
  138.         // alpha = bAlphaInternal_Cb, beta = bBetaInternal_Cb
  139.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaInternal_Cb]<2;2,1>:ub             { NoDDClr }
  140.  
  141.         // tc0 has bTc0_v32_Cb + bTc0_v22_Cb + bTc0_v12_Cb + bTc0_v02_Cb       
  142.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_v02_Cb]<4;4,1>:ub                           { NoDDChk }
  143.  
  144.         // Extract UV MaskA and MaskB from every other bit of Y masks
  145.         and.nz.f0.0 (8) null:w                  TempRow0(0)<16;8,2>             1:w
  146.  
  147.         // UV MaskA and MaskB
  148.         mov (1) f0.1:uw         0:w
  149.         mov (1) MaskB:uw        0:w                                                                                                     { NoDDClr }
  150.         mov (1) MaskA:uw        f0.0:uw                                                                                         { NoDDChk }
  151.        
  152.         CALL(FILTER_UV, 1)     
  153.  
  154.  
  155. //---------- Deblock V internal edge ----------
  156.         //      P1 = Cur MB V row 2
  157.         //      P0 = Cur MB V row 3
  158.         //      Q0 = Cur MB V row 4
  159.         //      Q1 = Cur MB V row 5
  160.         mov (1) P_AddrReg:w             4*UV_ROW_WIDTH+SRC_MB_V_BASE:w                                  { NoDDClr }
  161.         mov (1) Q_AddrReg:w             8*UV_ROW_WIDTH+SRC_MB_V_BASE:w                                  { NoDDChk }
  162.  
  163.         // alpha = bAlphaInternal_Cr, beta = bBetaInternal_Cr
  164.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaInternal_Cr]<2;2,1>:ub             { NoDDClr }    
  165.  
  166.         // tc0 has bTc0_v32_Cr + bTc0_v22_Cr + bTc0_v12_Cr + bTc0_v02_Cr       
  167.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_v02_Cr]<4;4,1>:ub                           { NoDDChk }
  168.  
  169.         // UV MaskA and MaskB
  170.         mov (2)         f0.0<1>:uw              MaskA<2;2,1>:uw
  171.  
  172.         CALL(FILTER_UV, 1)     
  173.  
  174.  
  175. //BYPASS_4x4_DEBLOCK_V:
  176.