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  1. /*
  2.  * Copyright © <2010>, Intel Corporation.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * This file was originally licensed under the following license
  25.  *
  26.  *  Licensed under the Apache License, Version 2.0 (the "License");
  27.  *  you may not use this file except in compliance with the License.
  28.  *  You may obtain a copy of the License at
  29.  *
  30.  *      http://www.apache.org/licenses/LICENSE-2.0
  31.  *
  32.  *  Unless required by applicable law or agreed to in writing, software
  33.  *  distributed under the License is distributed on an "AS IS" BASIS,
  34.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  35.  *  See the License for the specific language governing permissions and
  36.  *  limitations under the License.
  37.  *
  38.  */
  39. //////////////////////////////////////////////////////////////////////////////////////////////////////////////
  40. // AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB UV comp)
  41. //
  42. // First de-block vertical edges from left to right.
  43. // Second de-block horizontal edge from top to bottom.
  44. //
  45. // For 4:2:0, chroma is always de-blocked at 8x8.
  46. // NV12 format allows to filter U and V together.
  47. //
  48. //////////////////////////////////////////////////////////////////////////////////////////////////////////////
  49. #define AVC_ILDB
  50.  
  51. .kernel AVC_ILDB_CHILD_MBAFF_UV
  52. #if defined(COMBINED_KERNEL)
  53. ILDB_LABEL(AVC_ILDB_CHILD_UV):
  54. #endif
  55.  
  56. #include "SetupVPKernel.asm"
  57. #include "AVC_ILDB.inc"
  58.  
  59. #if defined(_DEBUG)
  60.         mov             (1)             EntrySignatureC:w                       0xE997:w
  61. #endif
  62.  
  63.         // Setup temp buf used by load and save code
  64.         #define BUF_B           RTempB
  65.         #define BUF_W           RTempW
  66.         #define BUF_D           RTempD
  67.  
  68.         // Init local variables
  69.         mul (4)         ORIX_CUR<2>:w           ORIX<0;1,0>:w           16:w    { NoDDClr }             // Expand X addr to bytes, repeat 4 times
  70.         mul (4)         ORIY_CUR<2>:w           ORIY<0;1,0>:w           32:w    { NoDDChk }             // Expand Y addr to bytes, repeat 4 times
  71.  
  72.         mov (2)         f0.0<1>:w               0:w
  73.  
  74.         mov     (1)             GateWayOffsetC:uw       ORIY:uw                                         // Use row # as Gateway offset
  75.  
  76.         //=== Null Kernel ===============================================================
  77. //      jmpi ILDB_LABEL(POST_ILDB_UV)
  78.         //===============================================================================
  79.  
  80.         //====================================================================================
  81.         // Assuming the MB control data is laid out in scan line order in a rectangle with width = 16 bytes.
  82.         // Control data has dimension of X x Y = 16 x N bytes, where N = W x H / 16
  83.         // Each MB has 256 bytes of control data
  84.  
  85.         // For CRESTLINE, 256 bytes are stored in memory and fetched into GRF.
  86.         // MB_offset = MBsCntX * CurRow + CurCol
  87.         // Byte_offset = MB_offset * (256 << Mbaff_flag),       Mbaff_flag = 0 or 1.
  88.         // Base address of a control data block = (x, y) = (0, y'=y/x), region width is 16 bytes
  89.         // where y' = Byte_offset / 16 = MB_offset * (16 << Mbaff_flag)
  90.         // MBCntrlDataOffsetY holds y'.
  91.  
  92.         // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes.  Need to use a special read command on BL-C.
  93.         // MB_offset = MBsCntX * CurRow + CurCol
  94.         // Byte_offset = MB_offset * (64 << Mbaff_flag),        Mbaff_flag = 0 or 1.
  95.         // MBCntrlDataOffsetY holds globel byte offset.
  96.        
  97. #if !defined(DEV_CL)
  98.         mul (1) CntrlDataOffsetY:ud             MBsCntX:w                               ORIY:w
  99.         add (1) CntrlDataOffsetY:ud             CntrlDataOffsetY:ud             ORIX:w
  100.         mul (1) CntrlDataOffsetY:ud             CntrlDataOffsetY:ud             128:uw
  101. #endif
  102.         //====================================================================================
  103.  
  104.         add (1)         ORIX_LEFT:w                     ORIX_LEFT:w                     -4:w
  105.         add (1)         ORIY_TOP:w                      ORIY_TOP:w                      -4:w
  106.  
  107.         //=========== Process Top MB ============
  108.     and (1)     BitFields:w             BitFields:w             TopFieldFlag:w          // Reset BotFieldFlag
  109.  
  110.         // Build a ramp from 0 to 15
  111.         mov     (16)    RRampW(0)<1>            RampConstC<0;8,1>:ub
  112.         add (8)         RRampW(0,8)<1>          RRampW(0,8)                     8:w                             // RRampW = ramp 15-0
  113.  
  114. ILDB_LABEL(RE_ENTRY_UV):        // for bootom field
  115.  
  116.         // Load current MB control data
  117. #if defined(DEV_CL)
  118.         #include "Load_ILDB_Cntrl_Data_64DW.asm"        // Crestline
  119. #else
  120.         #include "Load_ILDB_Cntrl_Data_16DW.asm"        // Cantiga and beyond
  121. #endif
  122.  
  123.         // Init addr register for vertical control data
  124.         mov (1)         ECM_AddrReg<1>:w                CNTRL_DATA_BASE:w               // Init ECM_AddrReg
  125.  
  126.         // Use free cycles here
  127.         // Check loaded control data
  128.         and.z.f0.1  (16) null<1>:uw     r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw    0xFFFF:uw               // Skip ILDB?          
  129.         and.nz.f0.0  (1) null:w         r[ECM_AddrReg, ExtBitFlags]:ub          DISABLE_ILDB_FLAG:w             // Skip ILDB?
  130.  
  131.         // Set DualFieldMode for all data read, write and deblocking
  132.         and     (1)     CTemp1_W:uw             r[ECM_AddrReg, BitFlags]:ub             FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
  133.  
  134.         // Get Vert Edge Pattern (frame vs. field MBs)
  135.         and     (1)     VertEdgePattern:uw              r[ECM_AddrReg, BitFlags]:ub             FieldModeLeftMbFlag+FieldModeCurrentMbFlag:uw
  136.  
  137.         (f0.1.all16h)   jmpi    ILDB_LABEL(SKIP_ILDB_UV)                                                // Skip ILDB
  138.         (f0.0)                  jmpi    ILDB_LABEL(SKIP_ILDB_UV)                                                // Skip ILDB
  139.  
  140.         // Set DualFieldMode for all data read, write and deblocking
  141. //      and     (1)     CTemp1_W:uw             r[ECM_AddrReg, BitFlags]:ub             FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
  142.         cmp.z.f0.0      (1)     null:w  CTemp1_W:uw             ABOVE_FIELD_CUR_FRAME:w
  143.         and (1)         DualFieldMode:w         f0.0:w          0x0001:w
  144.  
  145.         #include "load_Cur_UV_8x8T_Mbaff.asm"           // Load transposed data 8x8
  146.         #include "load_Left_UV_2x8T_Mbaff.asm"                          // Load left MB (2x8) UV data from memory if exists
  147.  
  148.         #include "Transpose_Cur_UV_8x8.asm"
  149.         #include "Transpose_Left_UV_2x8.asm"
  150.        
  151.  
  152.         //---------- Perform vertical ILDB filting on UV ----------
  153.         #include "AVC_ILDB_Filter_Mbaff_UV_v.asm"      
  154.         //---------------------------------------------------------
  155.  
  156.         #include "save_Left_UV_8x2T_Mbaff.asm"                          // Write left MB (2x8) Y data to memory if exists
  157.         #include "load_Top_UV_8x2_Mbaff.asm"                            // Load top MB (8x2) Y data from memory if exists
  158.  
  159.         #include "Transpose_Cur_UV_8x8.asm"                                     // Transpose a MB for horizontal edge de-blocking
  160.  
  161.         //---------- Perform horizontal ILDB filting on UV ----------
  162.         #include "AVC_ILDB_Filter_Mbaff_UV_h.asm"      
  163.         //-----------------------------------------------------------
  164.  
  165.         #include "save_Cur_UV_8x8_Mbaff.asm"                            // Write 8x8
  166.         #include "save_Top_UV_8x2_Mbaff.asm"                            // Write top MB (8x2) if not the top row
  167.  
  168.         //-----------------------------------------------------------
  169. ILDB_LABEL(SKIP_ILDB_UV):
  170.        
  171.         and.z.f0.0 (1)  null:w          BitFields:w             BotFieldFlag:w
  172.  
  173.         //=========== Process Bottom MB ============
  174.     or (1)      BitFields:w     BitFields:w             BotFieldFlag:w  // Set BotFieldFlag to 1
  175.         (f0.0) jmpi             ILDB_LABEL(RE_ENTRY_UV)                                                 // Loop back for bottom deblocking
  176.  
  177.         // Fall through to finish
  178.  
  179.         //=========== Check write commit of the last write ============
  180.     mov (8)     WritebackResponse(0)<1>         WritebackResponse(0)   
  181.  
  182. ILDB_LABEL(POST_ILDB_UV):      
  183.        
  184.         // Send notification thru Gateway to root thread, update chroma Status[CurRow]
  185.         #include "AVC_ILDB_ForwardMsg.asm"
  186.  
  187. #if !defined(GW_DCN)            // For non-ILK chipsets
  188.         //child send EOT : Request type = 1
  189.         END_CHILD_THREAD
  190. #endif  // !defined(DEV_ILK)
  191.        
  192.         // The thread finishs here
  193.         //------------------------------------------------------------------------------
  194.        
  195.         ////////////////////////////////////////////////////////////////////////////////
  196.         // Include other subrutines being called
  197.         #include "AVC_ILDB_Chroma_Core_Mbaff.asm"
  198.        
  199. #if !defined(COMBINED_KERNEL)           // For standalone kernel only
  200. .end_code
  201.  
  202. .end_kernel
  203. #endif
  204.