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  1. /*
  2.  * Copyright © 2010 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *    Xiang Haihao <haihao.xiang@intel.com>
  26.  *
  27.  */
  28.  
  29. #ifndef _GEN6_MFD_H_
  30. #define _GEN6_MFD_H_
  31.  
  32. #include <xf86drm.h>
  33. #include <drm.h>
  34. #include <i915_drm.h>
  35. #include <intel_bufmgr.h>
  36. #include "i965_decoder.h"
  37.  
  38. #define GEN6_VC1_I_PICTURE              0
  39. #define GEN6_VC1_P_PICTURE              1
  40. #define GEN6_VC1_B_PICTURE              2
  41. #define GEN6_VC1_BI_PICTURE             3
  42. #define GEN6_VC1_SKIPPED_PICTURE        4
  43.  
  44. #define GEN6_VC1_SIMPLE_PROFILE         0
  45. #define GEN6_VC1_MAIN_PROFILE           1
  46. #define GEN6_VC1_ADVANCED_PROFILE       2
  47. #define GEN6_VC1_RESERVED_PROFILE       3
  48.  
  49. struct gen6_vc1_surface
  50. {
  51.     dri_bo *dmv;
  52.     int picture_type;
  53. };
  54.  
  55. struct hw_context;
  56.  
  57. struct gen6_mfd_context
  58. {
  59.     struct hw_context base;
  60.  
  61.     union {
  62.         VAIQMatrixBufferMPEG2 mpeg2;
  63.     } iq_matrix;
  64.  
  65.     GenFrameStoreContext fs_ctx;
  66.     GenFrameStore       reference_surface[MAX_GEN_REFERENCE_FRAMES];
  67.     GenBuffer           post_deblocking_output;
  68.     GenBuffer           pre_deblocking_output;
  69.     GenBuffer           intra_row_store_scratch_buffer;
  70.     GenBuffer           deblocking_filter_row_store_scratch_buffer;
  71.     GenBuffer           bsd_mpc_row_store_scratch_buffer;
  72.     GenBuffer           mpr_row_store_scratch_buffer;
  73.     GenBuffer           bitplane_read_buffer;
  74.  
  75.     int                 wa_mpeg2_slice_vertical_position;
  76. };
  77.  
  78. #endif /* _GEN6_MFD_H_ */
  79.