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  1. /**********************************************************
  2.  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person
  5.  * obtaining a copy of this software and associated documentation
  6.  * files (the "Software"), to deal in the Software without
  7.  * restriction, including without limitation the rights to use, copy,
  8.  * modify, merge, publish, distribute, sublicense, and/or sell copies
  9.  * of the Software, and to permit persons to whom the Software is
  10.  * furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice shall be
  13.  * included in all copies or substantial portions of the Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18.  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19.  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20.  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21.  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22.  * SOFTWARE.
  23.  *
  24.  **********************************************************/
  25.  
  26. #ifndef SVGA_TGSI_EMIT_H
  27. #define SVGA_TGSI_EMIT_H
  28.  
  29. #include "tgsi/tgsi_scan.h"
  30. #include "svga_hw_reg.h"
  31. #include "svga_tgsi.h"
  32. #include "svga3d_shaderdefs.h"
  33.  
  34. struct src_register
  35. {
  36.    SVGA3dShaderSrcToken base;
  37.    SVGA3dShaderSrcToken indirect;
  38. };
  39.  
  40.  
  41. struct svga_arl_consts
  42. {
  43.    int number;
  44.    int idx;
  45.    int swizzle;
  46.    int arl_num;
  47. };
  48.  
  49.  
  50. /**
  51.  * This is the context/state used during TGSI->SVGA shader translation.
  52.  */
  53. struct svga_shader_emitter
  54. {
  55.    unsigned size;
  56.    char *buf;
  57.    char *ptr;
  58.  
  59.    struct svga_compile_key key;
  60.    struct tgsi_shader_info info;
  61.    int unit;
  62.  
  63.    int imm_start;
  64.  
  65.    int nr_hw_float_const;
  66.    int nr_hw_int_const;
  67.    int nr_hw_temp;
  68.  
  69.    int insn_offset;
  70.  
  71.    int internal_temp_count;
  72.    int internal_imm_count;
  73.  
  74.    int internal_color_idx[2]; /* diffuse, specular */
  75.    int internal_color_count;
  76.  
  77.    boolean emitted_vface;
  78.    boolean emit_frontface;
  79.    int internal_frontface_idx;
  80.  
  81.    int ps30_input_count;
  82.    int vs30_output_count;
  83.  
  84.    int dynamic_branching_level;
  85.  
  86.    boolean in_main_func;
  87.  
  88.    boolean created_zero_immediate;
  89.    int zero_immediate_idx;
  90.  
  91.    boolean created_loop_const;
  92.    int loop_const_idx;
  93.  
  94.    unsigned inverted_texcoords;  /**< bitmask of which texcoords are flipped */
  95.    struct src_register ps_true_texcoord[PIPE_MAX_ATTRIBS];
  96.    struct src_register ps_inverted_texcoord[PIPE_MAX_ATTRIBS];
  97.    unsigned ps_inverted_texcoord_input[PIPE_MAX_ATTRIBS];
  98.  
  99.    unsigned label[32];
  100.    unsigned nr_labels;
  101.  
  102.    struct src_register input_map[PIPE_MAX_ATTRIBS];
  103.    SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
  104.  
  105.    boolean ps_reads_pos;
  106.    boolean emitted_depth_fog;
  107.    struct src_register ps_true_pos;
  108.    struct src_register ps_depth_pos;
  109.    SVGA3dShaderDestToken ps_temp_pos;
  110.  
  111.    /* shared input for depth and fog */
  112.    struct src_register ps_depth_fog;
  113.  
  114.    struct src_register imm_0055;
  115.    SVGA3dShaderDestToken temp_pos;
  116.    SVGA3dShaderDestToken true_pos;
  117.    SVGA3dShaderDestToken depth_pos;
  118.  
  119.    /* shared output for depth and fog */
  120.    SVGA3dShaderDestToken vs_depth_fog;
  121.  
  122.    SVGA3dShaderDestToken temp_col[PIPE_MAX_COLOR_BUFS];
  123.    SVGA3dShaderDestToken true_col[PIPE_MAX_COLOR_BUFS];
  124.  
  125.    SVGA3dShaderDestToken temp_psiz;
  126.    SVGA3dShaderDestToken true_psiz;
  127.  
  128.    struct svga_arl_consts arl_consts[12];
  129.    int num_arl_consts;
  130.    int current_arl;
  131. };
  132.  
  133.  
  134. boolean
  135. svga_shader_emit_dword(struct svga_shader_emitter *emit, unsigned dword);
  136.  
  137. boolean
  138. svga_shader_emit_dwords(struct svga_shader_emitter *emit,
  139.                         const unsigned *dwords, unsigned nr);
  140.  
  141. boolean
  142. svga_shader_emit_opcode(struct svga_shader_emitter *emit,
  143.                         unsigned opcode);
  144.  
  145. boolean
  146. svga_shader_emit_instructions(struct svga_shader_emitter *emit,
  147.                               const struct tgsi_token *tokens);
  148.  
  149. boolean
  150. svga_translate_decl_sm30(struct svga_shader_emitter *emit,
  151.                          const struct tgsi_full_declaration *decl);
  152.  
  153.  
  154. #define TRANSLATE_SWIZZLE(x,y,z,w)  ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
  155. #define SWIZZLE_XYZW  \
  156.  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
  157. #define SWIZZLE_XXXX  \
  158.  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
  159. #define SWIZZLE_YYYY  \
  160.  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
  161. #define SWIZZLE_ZZZZ  \
  162.  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
  163. #define SWIZZLE_WWWW  \
  164.  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
  165.  
  166.  
  167. /** Emit the given SVGA3dShaderInstToken opcode */
  168. static INLINE boolean
  169. emit_instruction(struct svga_shader_emitter *emit,
  170.                  SVGA3dShaderInstToken opcode)
  171. {
  172.    return svga_shader_emit_opcode(emit, opcode.value);
  173. }
  174.  
  175.  
  176. /** Generate a SVGA3dShaderInstToken for the given SVGA3D shader opcode */
  177. static INLINE SVGA3dShaderInstToken
  178. inst_token(unsigned opcode)
  179. {
  180.    SVGA3dShaderInstToken inst;
  181.  
  182.    inst.value = 0;
  183.    inst.op = opcode;
  184.  
  185.    return inst;
  186. }
  187.  
  188.  
  189. /**
  190.  * Create an instance of a SVGA3dShaderDestToken.
  191.  * Note that this function is used to create tokens for output registers,
  192.  * temp registers AND constants (see emit_def_const()).
  193.  */
  194. static INLINE SVGA3dShaderDestToken
  195. dst_register(unsigned file, int number)
  196. {
  197.    SVGA3dShaderDestToken dest;
  198.  
  199.    /* check values against bitfield sizes */
  200.    assert(number < (1 << 11));
  201.    assert(file <= SVGA3DREG_PREDICATE);
  202.  
  203.    dest.value = 0;
  204.    dest.num = number;
  205.    dest.type_upper = file >> 3;
  206.    dest.relAddr = 0;
  207.    dest.reserved1 = 0;
  208.    dest.mask = 0xf;
  209.    dest.dstMod = 0;
  210.    dest.shfScale = 0;
  211.    dest.type_lower = file & 0x7;
  212.    dest.reserved0 = 1;          /* is_reg */
  213.  
  214.    return dest;
  215. }
  216.  
  217.  
  218. /**
  219.  * Apply a writemask to the given SVGA3dShaderDestToken, returning a
  220.  * new SVGA3dShaderDestToken.
  221.  */
  222. static INLINE SVGA3dShaderDestToken
  223. writemask(SVGA3dShaderDestToken dest, unsigned mask)
  224. {
  225.    assert(dest.mask & mask);
  226.    dest.mask &= mask;
  227.    return dest;
  228. }
  229.  
  230.  
  231. /** Create a SVGA3dShaderSrcToken given a register file and number */
  232. static INLINE SVGA3dShaderSrcToken
  233. src_token(unsigned file, int number)
  234. {
  235.    SVGA3dShaderSrcToken src;
  236.  
  237.    /* check values against bitfield sizes */
  238.    assert(number < (1 << 11));
  239.    assert(file <= SVGA3DREG_PREDICATE);
  240.  
  241.    src.value = 0;
  242.    src.num = number;
  243.    src.type_upper = file >> 3;
  244.    src.relAddr = 0;
  245.    src.reserved1 = 0;
  246.    src.swizzle = SWIZZLE_XYZW;
  247.    src.srcMod = 0;
  248.    src.type_lower = file & 0x7;
  249.    src.reserved0 = 1;           /* is_reg */
  250.  
  251.    return src;
  252. }
  253.  
  254.  
  255. /** Create a src_register given a register file and register number */
  256. static INLINE struct src_register
  257. src_register(unsigned file, int number)
  258. {
  259.    struct src_register src;
  260.  
  261.    src.base = src_token(file, number);
  262.    src.indirect.value = 0;
  263.  
  264.    return src;
  265. }
  266.  
  267. /** Translate src_register into SVGA3dShaderDestToken */
  268. static INLINE SVGA3dShaderDestToken
  269. dst(struct src_register src)
  270. {
  271.    return dst_register(SVGA3dShaderGetRegType(src.base.value), src.base.num);
  272. }
  273.  
  274.  
  275. /** Translate SVGA3dShaderDestToken to a src_register */
  276. static INLINE struct src_register
  277. src(SVGA3dShaderDestToken dst)
  278. {
  279.    return src_register(SVGA3dShaderGetRegType(dst.value), dst.num);
  280. }
  281.  
  282. #endif
  283.