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  1. /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
  2.  
  3. /*
  4.  * Copyright (C) 2012-2013 Rob Clark <robclark@freedesktop.org>
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the next
  14.  * paragraph) shall be included in all copies or substantial portions of the
  15.  * Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22.  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23.  * SOFTWARE.
  24.  *
  25.  * Authors:
  26.  *    Rob Clark <robclark@freedesktop.org>
  27.  */
  28.  
  29. #include "pipe/p_state.h"
  30. #include "util/u_string.h"
  31. #include "util/u_memory.h"
  32. #include "util/u_helpers.h"
  33.  
  34. #include "freedreno_resource.h"
  35.  
  36. #include "fd2_emit.h"
  37. #include "fd2_blend.h"
  38. #include "fd2_context.h"
  39. #include "fd2_program.h"
  40. #include "fd2_rasterizer.h"
  41. #include "fd2_texture.h"
  42. #include "fd2_util.h"
  43. #include "fd2_zsa.h"
  44.  
  45. /* NOTE: just define the position for const regs statically.. the blob
  46.  * driver doesn't seem to change these dynamically, and I can't really
  47.  * think of a good reason to so..
  48.  */
  49. #define VS_CONST_BASE 0x20
  50. #define PS_CONST_BASE 0x120
  51.  
  52. static void
  53. emit_constants(struct fd_ringbuffer *ring, uint32_t base,
  54.                 struct fd_constbuf_stateobj *constbuf,
  55.                 struct fd2_shader_stateobj *shader)
  56. {
  57.         uint32_t enabled_mask = constbuf->enabled_mask;
  58.         uint32_t start_base = base;
  59.         unsigned i;
  60.  
  61.         // XXX TODO only emit dirty consts.. but we need to keep track if
  62.         // they are clobbered by a clear, gmem2mem, or mem2gmem..
  63.         constbuf->dirty_mask = enabled_mask;
  64.  
  65.         /* emit user constants: */
  66.         while (enabled_mask) {
  67.                 unsigned index = ffs(enabled_mask) - 1;
  68.                 struct pipe_constant_buffer *cb = &constbuf->cb[index];
  69.                 unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */
  70.  
  71.                 // I expect that size should be a multiple of vec4's:
  72.                 assert(size == align(size, 4));
  73.  
  74.                 /* hmm, sometimes we still seem to end up with consts bound,
  75.                  * even if shader isn't using them, which ends up overwriting
  76.                  * const reg's used for immediates.. this is a hack to work
  77.                  * around that:
  78.                  */
  79.                 if (shader && ((base - start_base) >= (shader->first_immediate * 4)))
  80.                         break;
  81.  
  82.                 if (constbuf->dirty_mask & (1 << index)) {
  83.                         const uint32_t *dwords;
  84.  
  85.                         if (cb->user_buffer) {
  86.                                 dwords = cb->user_buffer;
  87.                         } else {
  88.                                 struct fd_resource *rsc = fd_resource(cb->buffer);
  89.                                 dwords = fd_bo_map(rsc->bo);
  90.                         }
  91.  
  92.                         dwords = (uint32_t *)(((uint8_t *)dwords) + cb->buffer_offset);
  93.  
  94.                         OUT_PKT3(ring, CP_SET_CONSTANT, size + 1);
  95.                         OUT_RING(ring, base);
  96.                         for (i = 0; i < size; i++)
  97.                                 OUT_RING(ring, *(dwords++));
  98.  
  99.                         constbuf->dirty_mask &= ~(1 << index);
  100.                 }
  101.  
  102.                 base += size;
  103.                 enabled_mask &= ~(1 << index);
  104.         }
  105.  
  106.         /* emit shader immediates: */
  107.         if (shader) {
  108.                 for (i = 0; i < shader->num_immediates; i++) {
  109.                         OUT_PKT3(ring, CP_SET_CONSTANT, 5);
  110.                         OUT_RING(ring, start_base + (4 * (shader->first_immediate + i)));
  111.                         OUT_RING(ring, shader->immediates[i].val[0]);
  112.                         OUT_RING(ring, shader->immediates[i].val[1]);
  113.                         OUT_RING(ring, shader->immediates[i].val[2]);
  114.                         OUT_RING(ring, shader->immediates[i].val[3]);
  115.                         base += 4;
  116.                 }
  117.         }
  118. }
  119.  
  120. typedef uint32_t texmask;
  121.  
  122. static texmask
  123. emit_texture(struct fd_ringbuffer *ring, struct fd_context *ctx,
  124.                 struct fd_texture_stateobj *tex, unsigned samp_id, texmask emitted)
  125. {
  126.         unsigned const_idx = fd2_get_const_idx(ctx, tex, samp_id);
  127.         struct fd2_sampler_stateobj *sampler;
  128.         struct fd2_pipe_sampler_view *view;
  129.  
  130.         if (emitted & (1 << const_idx))
  131.                 return 0;
  132.  
  133.         sampler = fd2_sampler_stateobj(tex->samplers[samp_id]);
  134.         view = fd2_pipe_sampler_view(tex->textures[samp_id]);
  135.  
  136.         OUT_PKT3(ring, CP_SET_CONSTANT, 7);
  137.         OUT_RING(ring, 0x00010000 + (0x6 * const_idx));
  138.  
  139.         OUT_RING(ring, sampler->tex0 | view->tex0);
  140.         OUT_RELOC(ring, view->tex_resource->bo, 0, view->fmt);
  141.         OUT_RING(ring, view->tex2);
  142.         OUT_RING(ring, sampler->tex3 | view->tex3);
  143.         OUT_RING(ring, sampler->tex4);
  144.         OUT_RING(ring, sampler->tex5);
  145.  
  146.         return (1 << const_idx);
  147. }
  148.  
  149. static void
  150. emit_textures(struct fd_ringbuffer *ring, struct fd_context *ctx)
  151. {
  152.         texmask emitted = 0;
  153.         unsigned i;
  154.  
  155.         for (i = 0; i < ctx->verttex.num_samplers; i++)
  156.                 if (ctx->verttex.samplers[i])
  157.                         emitted |= emit_texture(ring, ctx, &ctx->verttex, i, emitted);
  158.  
  159.         for (i = 0; i < ctx->fragtex.num_samplers; i++)
  160.                 if (ctx->fragtex.samplers[i])
  161.                         emitted |= emit_texture(ring, ctx, &ctx->fragtex, i, emitted);
  162. }
  163.  
  164. void
  165. fd2_emit_vertex_bufs(struct fd_ringbuffer *ring, uint32_t val,
  166.                 struct fd2_vertex_buf *vbufs, uint32_t n)
  167. {
  168.         unsigned i;
  169.  
  170.         OUT_PKT3(ring, CP_SET_CONSTANT, 1 + (2 * n));
  171.         OUT_RING(ring, (0x1 << 16) | (val & 0xffff));
  172.         for (i = 0; i < n; i++) {
  173.                 struct fd_resource *rsc = fd_resource(vbufs[i].prsc);
  174.                 OUT_RELOC(ring, rsc->bo, vbufs[i].offset, 3);
  175.                 OUT_RING (ring, vbufs[i].size);
  176.         }
  177. }
  178.  
  179. void
  180. fd2_emit_state(struct fd_context *ctx, uint32_t dirty)
  181. {
  182.         struct fd2_blend_stateobj *blend = fd2_blend_stateobj(ctx->blend);
  183.         struct fd2_zsa_stateobj *zsa = fd2_zsa_stateobj(ctx->zsa);
  184.         struct fd_ringbuffer *ring = ctx->ring;
  185.  
  186.         /* NOTE: we probably want to eventually refactor this so each state
  187.          * object handles emitting it's own state..  although the mapping of
  188.          * state to registers is not always orthogonal, sometimes a single
  189.          * register contains bitfields coming from multiple state objects,
  190.          * so not sure the best way to deal with that yet.
  191.          */
  192.  
  193.         if (dirty & FD_DIRTY_SAMPLE_MASK) {
  194.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  195.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK));
  196.                 OUT_RING(ring, ctx->sample_mask);
  197.         }
  198.  
  199.         if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF)) {
  200.                 struct pipe_stencil_ref *sr = &ctx->stencil_ref;
  201.  
  202.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  203.                 OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL));
  204.                 OUT_RING(ring, zsa->rb_depthcontrol);
  205.  
  206.                 OUT_PKT3(ring, CP_SET_CONSTANT, 4);
  207.                 OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF));
  208.                 OUT_RING(ring, zsa->rb_stencilrefmask_bf |
  209.                                 A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[1]));
  210.                 OUT_RING(ring, zsa->rb_stencilrefmask |
  211.                                 A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0]));
  212.                 OUT_RING(ring, zsa->rb_alpha_ref);
  213.         }
  214.  
  215.         if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_FRAMEBUFFER)) {
  216.                 struct fd2_rasterizer_stateobj *rasterizer =
  217.                                 fd2_rasterizer_stateobj(ctx->rasterizer);
  218.                 OUT_PKT3(ring, CP_SET_CONSTANT, 3);
  219.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL));
  220.                 OUT_RING(ring, rasterizer->pa_cl_clip_cntl);
  221.                 OUT_RING(ring, rasterizer->pa_su_sc_mode_cntl |
  222.                                 A2XX_PA_SU_SC_MODE_CNTL_VTX_WINDOW_OFFSET_ENABLE);
  223.  
  224.                 OUT_PKT3(ring, CP_SET_CONSTANT, 5);
  225.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_POINT_SIZE));
  226.                 OUT_RING(ring, rasterizer->pa_su_point_size);
  227.                 OUT_RING(ring, rasterizer->pa_su_point_minmax);
  228.                 OUT_RING(ring, rasterizer->pa_su_line_cntl);
  229.                 OUT_RING(ring, rasterizer->pa_sc_line_stipple);
  230.  
  231.                 OUT_PKT3(ring, CP_SET_CONSTANT, 6);
  232.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_VTX_CNTL));
  233.                 OUT_RING(ring, rasterizer->pa_su_vtx_cntl);
  234.                 OUT_RING(ring, fui(1.0));                /* PA_CL_GB_VERT_CLIP_ADJ */
  235.                 OUT_RING(ring, fui(1.0));                /* PA_CL_GB_VERT_DISC_ADJ */
  236.                 OUT_RING(ring, fui(1.0));                /* PA_CL_GB_HORZ_CLIP_ADJ */
  237.                 OUT_RING(ring, fui(1.0));                /* PA_CL_GB_HORZ_DISC_ADJ */
  238.         }
  239.  
  240.         if (dirty & FD_DIRTY_SCISSOR) {
  241.                 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
  242.  
  243.                 OUT_PKT3(ring, CP_SET_CONSTANT, 3);
  244.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL));
  245.                 OUT_RING(ring, xy2d(scissor->minx,       /* PA_SC_WINDOW_SCISSOR_TL */
  246.                                 scissor->miny));
  247.                 OUT_RING(ring, xy2d(scissor->maxx,       /* PA_SC_WINDOW_SCISSOR_BR */
  248.                                 scissor->maxy));
  249.  
  250.                 ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, scissor->minx);
  251.                 ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, scissor->miny);
  252.                 ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, scissor->maxx);
  253.                 ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, scissor->maxy);
  254.         }
  255.  
  256.         if (dirty & FD_DIRTY_VIEWPORT) {
  257.                 OUT_PKT3(ring, CP_SET_CONSTANT, 7);
  258.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_XSCALE));
  259.                 OUT_RING(ring, fui(ctx->viewport.scale[0]));       /* PA_CL_VPORT_XSCALE */
  260.                 OUT_RING(ring, fui(ctx->viewport.translate[0]));   /* PA_CL_VPORT_XOFFSET */
  261.                 OUT_RING(ring, fui(ctx->viewport.scale[1]));       /* PA_CL_VPORT_YSCALE */
  262.                 OUT_RING(ring, fui(ctx->viewport.translate[1]));   /* PA_CL_VPORT_YOFFSET */
  263.                 OUT_RING(ring, fui(ctx->viewport.scale[2]));       /* PA_CL_VPORT_ZSCALE */
  264.                 OUT_RING(ring, fui(ctx->viewport.translate[2]));   /* PA_CL_VPORT_ZOFFSET */
  265.  
  266.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  267.                 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
  268.                 OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
  269.                                 A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
  270.                                 A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
  271.                                 A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
  272.                                 A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
  273.                                 A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
  274.                                 A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
  275.         }
  276.  
  277.         if (dirty & (FD_DIRTY_PROG | FD_DIRTY_VTXSTATE | FD_DIRTY_TEXSTATE)) {
  278.                 fd2_program_validate(ctx);
  279.                 fd2_program_emit(ring, &ctx->prog);
  280.         }
  281.  
  282.         if (dirty & (FD_DIRTY_PROG | FD_DIRTY_CONSTBUF)) {
  283.                 emit_constants(ring,  VS_CONST_BASE * 4,
  284.                                 &ctx->constbuf[PIPE_SHADER_VERTEX],
  285.                                 (dirty & FD_DIRTY_PROG) ? ctx->prog.vp : NULL);
  286.                 emit_constants(ring, PS_CONST_BASE * 4,
  287.                                 &ctx->constbuf[PIPE_SHADER_FRAGMENT],
  288.                                 (dirty & FD_DIRTY_PROG) ? ctx->prog.fp : NULL);
  289.         }
  290.  
  291.         if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_ZSA)) {
  292.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  293.                 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL));
  294.                 OUT_RING(ring, zsa->rb_colorcontrol | blend->rb_colorcontrol);
  295.         }
  296.  
  297.         if (dirty & FD_DIRTY_BLEND) {
  298.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  299.                 OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
  300.                 OUT_RING(ring, blend->rb_blendcontrol);
  301.  
  302.                 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  303.                 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
  304.                 OUT_RING(ring, blend->rb_colormask);
  305.         }
  306.  
  307.         if (dirty & (FD_DIRTY_VERTTEX | FD_DIRTY_FRAGTEX | FD_DIRTY_PROG))
  308.                 emit_textures(ring, ctx);
  309.  
  310.         ctx->dirty &= ~dirty;
  311. }
  312.  
  313. /* emit per-context initialization:
  314.  */
  315. void
  316. fd2_emit_setup(struct fd_context *ctx)
  317. {
  318.         struct fd_ringbuffer *ring = ctx->ring;
  319.  
  320.         OUT_PKT0(ring, REG_A2XX_TP0_CHICKEN, 1);
  321.         OUT_RING(ring, 0x00000002);
  322.  
  323.         OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
  324.         OUT_RING(ring, 0x00007fff);
  325.  
  326.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  327.         OUT_RING(ring, CP_REG(REG_A2XX_SQ_VS_CONST));
  328.         OUT_RING(ring, A2XX_SQ_VS_CONST_BASE(VS_CONST_BASE) |
  329.                         A2XX_SQ_VS_CONST_SIZE(0x100));
  330.  
  331.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  332.         OUT_RING(ring, CP_REG(REG_A2XX_SQ_PS_CONST));
  333.         OUT_RING(ring, A2XX_SQ_PS_CONST_BASE(PS_CONST_BASE) |
  334.                         A2XX_SQ_PS_CONST_SIZE(0xe0));
  335.  
  336.         OUT_PKT3(ring, CP_SET_CONSTANT, 3);
  337.         OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX));
  338.         OUT_RING(ring, 0xffffffff);        /* VGT_MAX_VTX_INDX */
  339.         OUT_RING(ring, 0x00000000);        /* VGT_MIN_VTX_INDX */
  340.  
  341.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  342.         OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
  343.         OUT_RING(ring, 0x00000000);
  344.  
  345.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  346.         OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
  347.         OUT_RING(ring, 0x0000003b);
  348.  
  349.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  350.         OUT_RING(ring, CP_REG(REG_A2XX_SQ_CONTEXT_MISC));
  351.         OUT_RING(ring, A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(CENTERS_ONLY));
  352.  
  353.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  354.         OUT_RING(ring, CP_REG(REG_A2XX_SQ_INTERPOLATOR_CNTL));
  355.         OUT_RING(ring, 0xffffffff);
  356.  
  357.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  358.         OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_CONFIG));
  359.         OUT_RING(ring, 0x00000000);
  360.  
  361.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  362.         OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_LINE_CNTL));
  363.         OUT_RING(ring, 0x00000000);
  364.  
  365.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  366.         OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET));
  367.         OUT_RING(ring, 0x00000000);
  368.  
  369.         // XXX we change this dynamically for draw/clear.. vs gmem<->mem..
  370.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  371.         OUT_RING(ring, CP_REG(REG_A2XX_RB_MODECONTROL));
  372.         OUT_RING(ring, A2XX_RB_MODECONTROL_EDRAM_MODE(COLOR_DEPTH));
  373.  
  374.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  375.         OUT_RING(ring, CP_REG(REG_A2XX_RB_SAMPLE_POS));
  376.         OUT_RING(ring, 0x88888888);
  377.  
  378.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  379.         OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_DEST_MASK));
  380.         OUT_RING(ring, 0xffffffff);
  381.  
  382.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  383.         OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_DEST_INFO));
  384.         OUT_RING(ring, A2XX_RB_COPY_DEST_INFO_FORMAT(COLORX_4_4_4_4) |
  385.                         A2XX_RB_COPY_DEST_INFO_WRITE_RED |
  386.                         A2XX_RB_COPY_DEST_INFO_WRITE_GREEN |
  387.                         A2XX_RB_COPY_DEST_INFO_WRITE_BLUE |
  388.                         A2XX_RB_COPY_DEST_INFO_WRITE_ALPHA);
  389.  
  390.         OUT_PKT3(ring, CP_SET_CONSTANT, 3);
  391.         OUT_RING(ring, CP_REG(REG_A2XX_SQ_WRAPPING_0));
  392.         OUT_RING(ring, 0x00000000);        /* SQ_WRAPPING_0 */
  393.         OUT_RING(ring, 0x00000000);        /* SQ_WRAPPING_1 */
  394.  
  395.         OUT_PKT3(ring, CP_SET_DRAW_INIT_FLAGS, 1);
  396.         OUT_RING(ring, 0x00000000);
  397.  
  398.         OUT_PKT3(ring, CP_WAIT_REG_EQ, 4);
  399.         OUT_RING(ring, 0x000005d0);
  400.         OUT_RING(ring, 0x00000000);
  401.         OUT_RING(ring, 0x5f601000);
  402.         OUT_RING(ring, 0x00000001);
  403.  
  404.         OUT_PKT0(ring, REG_A2XX_SQ_INST_STORE_MANAGMENT, 1);
  405.         OUT_RING(ring, 0x00000180);
  406.  
  407.         OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
  408.         OUT_RING(ring, 0x00000300);
  409.  
  410.         OUT_PKT3(ring, CP_SET_SHADER_BASES, 1);
  411.         OUT_RING(ring, 0x80000180);
  412.  
  413.         /* not sure what this form of CP_SET_CONSTANT is.. */
  414.         OUT_PKT3(ring, CP_SET_CONSTANT, 13);
  415.         OUT_RING(ring, 0x00000000);
  416.         OUT_RING(ring, 0x00000000);
  417.         OUT_RING(ring, 0x00000000);
  418.         OUT_RING(ring, 0x00000000);
  419.         OUT_RING(ring, 0x00000000);
  420.         OUT_RING(ring, 0x469c4000);
  421.         OUT_RING(ring, 0x3f800000);
  422.         OUT_RING(ring, 0x3f000000);
  423.         OUT_RING(ring, 0x00000000);
  424.         OUT_RING(ring, 0x40000000);
  425.         OUT_RING(ring, 0x3f400000);
  426.         OUT_RING(ring, 0x3ec00000);
  427.         OUT_RING(ring, 0x3e800000);
  428.  
  429.         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  430.         OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
  431.         OUT_RING(ring, A2XX_RB_COLOR_MASK_WRITE_RED |
  432.                         A2XX_RB_COLOR_MASK_WRITE_GREEN |
  433.                         A2XX_RB_COLOR_MASK_WRITE_BLUE |
  434.                         A2XX_RB_COLOR_MASK_WRITE_ALPHA);
  435.  
  436.         OUT_PKT3(ring, CP_SET_CONSTANT, 5);
  437.         OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_RED));
  438.         OUT_RING(ring, 0x00000000);        /* RB_BLEND_RED */
  439.         OUT_RING(ring, 0x00000000);        /* RB_BLEND_GREEN */
  440.         OUT_RING(ring, 0x00000000);        /* RB_BLEND_BLUE */
  441.         OUT_RING(ring, 0x000000ff);        /* RB_BLEND_ALPHA */
  442.  
  443.         fd_ringbuffer_flush(ring);
  444.         fd_ringmarker_mark(ctx->draw_start);
  445. }
  446.