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  1. /*
  2.  * Copyright 2003 VMware, Inc.
  3.  * Copyright © 2007 Intel Corporation
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22.  * IN THE SOFTWARE.
  23.  */
  24.  
  25. /**
  26.  * @file intel_upload.c
  27.  *
  28.  * Batched upload via BOs.
  29.  */
  30.  
  31. #include "main/imports.h"
  32. #include "main/mtypes.h"
  33. #include "main/macros.h"
  34. #include "main/bufferobj.h"
  35.  
  36. #include "brw_context.h"
  37. #include "intel_blit.h"
  38. #include "intel_buffer_objects.h"
  39. #include "intel_batchbuffer.h"
  40. #include "intel_fbo.h"
  41. #include "intel_mipmap_tree.h"
  42.  
  43. #include "brw_context.h"
  44.  
  45. #define INTEL_UPLOAD_SIZE (64*1024)
  46.  
  47. /**
  48.  * Like ALIGN(), but works with a non-power-of-two alignment.
  49.  */
  50. #define ALIGN_NPOT(value, alignment) \
  51.    (((value) + (alignment) - 1) / (alignment) * (alignment))
  52.  
  53. void
  54. intel_upload_finish(struct brw_context *brw)
  55. {
  56.    if (!brw->upload.bo)
  57.       return;
  58.  
  59.    drm_intel_bo_unmap(brw->upload.bo);
  60.    drm_intel_bo_unreference(brw->upload.bo);
  61.    brw->upload.bo = NULL;
  62.    brw->upload.next_offset = 0;
  63. }
  64.  
  65. /**
  66.  * Interface for getting memory for uploading streamed data to the GPU
  67.  *
  68.  * In most cases, streamed data (for GPU state structures, for example) is
  69.  * uploaded through brw_state_batch(), since that interface allows relocations
  70.  * from the streamed space returned to other BOs.  However, that interface has
  71.  * the restriction that the amount of space allocated has to be "small" (see
  72.  * estimated_max_prim_size in brw_draw.c).
  73.  *
  74.  * This interface, on the other hand, is able to handle arbitrary sized
  75.  * allocation requests, though it will batch small allocations into the same
  76.  * BO for efficiency and reduced memory footprint.
  77.  *
  78.  * \note The returned pointer is valid only until intel_upload_finish(), which
  79.  * will happen at batch flush or the next
  80.  * intel_upload_space()/intel_upload_data().
  81.  *
  82.  * \param out_bo Pointer to a BO, which must point to a valid BO or NULL on
  83.  * entry, and will have a reference to the new BO containing the state on
  84.  * return.
  85.  *
  86.  * \param out_offset Offset within the buffer object that the data will land.
  87.  */
  88. void *
  89. intel_upload_space(struct brw_context *brw,
  90.                    uint32_t size,
  91.                    uint32_t alignment,
  92.                    drm_intel_bo **out_bo,
  93.                    uint32_t *out_offset)
  94. {
  95.    uint32_t offset;
  96.  
  97.    offset = ALIGN_NPOT(brw->upload.next_offset, alignment);
  98.    if (brw->upload.bo && offset + size > brw->upload.bo->size) {
  99.       intel_upload_finish(brw);
  100.       offset = 0;
  101.    }
  102.  
  103.    if (!brw->upload.bo) {
  104.       brw->upload.bo = drm_intel_bo_alloc(brw->bufmgr, "streamed data",
  105.                                           MAX2(INTEL_UPLOAD_SIZE, size), 4096);
  106.       if (brw->has_llc)
  107.          drm_intel_bo_map(brw->upload.bo, true);
  108.       else
  109.          drm_intel_gem_bo_map_gtt(brw->upload.bo);
  110.    }
  111.  
  112.    brw->upload.next_offset = offset + size;
  113.  
  114.    *out_offset = offset;
  115.    if (*out_bo != brw->upload.bo) {
  116.       drm_intel_bo_unreference(*out_bo);
  117.       *out_bo = brw->upload.bo;
  118.       drm_intel_bo_reference(brw->upload.bo);
  119.    }
  120.  
  121.    return brw->upload.bo->virtual + offset;
  122. }
  123.  
  124. /**
  125.  * Handy interface to upload some data to temporary GPU memory quickly.
  126.  *
  127.  * References to this memory should not be retained across batch flushes.
  128.  */
  129. void
  130. intel_upload_data(struct brw_context *brw,
  131.                   const void *data,
  132.                   uint32_t size,
  133.                   uint32_t alignment,
  134.                   drm_intel_bo **out_bo,
  135.                   uint32_t *out_offset)
  136. {
  137.    void *dst = intel_upload_space(brw, size, alignment, out_bo, out_offset);
  138.    memcpy(dst, data, size);
  139. }
  140.