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  1. /*
  2.  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
  3.  Intel funded Tungsten Graphics to
  4.  develop this 3D driver.
  5.  
  6.  Permission is hereby granted, free of charge, to any person obtaining
  7.  a copy of this software and associated documentation files (the
  8.  "Software"), to deal in the Software without restriction, including
  9.  without limitation the rights to use, copy, modify, merge, publish,
  10.  distribute, sublicense, and/or sell copies of the Software, and to
  11.  permit persons to whom the Software is furnished to do so, subject to
  12.  the following conditions:
  13.  
  14.  The above copyright notice and this permission notice (including the
  15.  next paragraph) shall be included in all copies or substantial
  16.  portions of the Software.
  17.  
  18.  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19.  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20.  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21.  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22.  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23.  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24.  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25.  
  26.  **********************************************************************/
  27.  /*
  28.   * Authors:
  29.   *   Keith Whitwell <keithw@vmware.com>
  30.   */
  31.  
  32.  
  33.  
  34. #include "brw_context.h"
  35. #include "brw_state.h"
  36. #include "drivers/common/meta.h"
  37. #include "intel_batchbuffer.h"
  38. #include "intel_buffers.h"
  39. #include "brw_vs.h"
  40. #include "brw_ff_gs.h"
  41. #include "brw_gs.h"
  42. #include "brw_wm.h"
  43. #include "brw_cs.h"
  44.  
  45. static const struct brw_tracked_state *gen4_atoms[] =
  46. {
  47.    &brw_interpolation_map,
  48.  
  49.    &brw_clip_prog, /* must do before state base address */
  50.    &brw_sf_prog, /* must do before state base address */
  51.  
  52.    /* Once all the programs are done, we know how large urb entry
  53.     * sizes need to be and can decide if we need to change the urb
  54.     * layout.
  55.     */
  56.    &brw_curbe_offsets,
  57.    &brw_recalculate_urb_fence,
  58.  
  59.    &brw_cc_vp,
  60.    &brw_cc_unit,
  61.  
  62.    /* Surface state setup.  Must come before the VS/WM unit.  The binding
  63.     * table upload must be last.
  64.     */
  65.    &brw_vs_pull_constants,
  66.    &brw_wm_pull_constants,
  67.    &brw_renderbuffer_surfaces,
  68.    &brw_texture_surfaces,
  69.    &brw_vs_binding_table,
  70.    &brw_wm_binding_table,
  71.  
  72.    &brw_fs_samplers,
  73.    &brw_vs_samplers,
  74.  
  75.    /* These set up state for brw_psp_urb_cbs */
  76.    &brw_wm_unit,
  77.    &brw_sf_vp,
  78.    &brw_sf_unit,
  79.    &brw_vs_unit,                /* always required, enabled or not */
  80.    &brw_clip_unit,
  81.    &brw_gs_unit,
  82.  
  83.    /* Command packets:
  84.     */
  85.    &brw_invariant_state,
  86.    &brw_state_base_address,
  87.  
  88.    &brw_binding_table_pointers,
  89.    &brw_blend_constant_color,
  90.  
  91.    &brw_depthbuffer,
  92.  
  93.    &brw_polygon_stipple,
  94.    &brw_polygon_stipple_offset,
  95.  
  96.    &brw_line_stipple,
  97.    &brw_aa_line_parameters,
  98.  
  99.    &brw_psp_urb_cbs,
  100.  
  101.    &brw_drawing_rect,
  102.    &brw_indices, /* must come before brw_vertices */
  103.    &brw_index_buffer,
  104.    &brw_vertices,
  105.  
  106.    &brw_constant_buffer
  107. };
  108.  
  109. static const struct brw_tracked_state *gen6_atoms[] =
  110. {
  111.    &gen6_clip_vp,
  112.    &gen6_sf_vp,
  113.  
  114.    /* Command packets: */
  115.  
  116.    /* must do before binding table pointers, cc state ptrs */
  117.    &brw_state_base_address,
  118.  
  119.    &brw_cc_vp,
  120.    &gen6_viewport_state,        /* must do after *_vp stages */
  121.  
  122.    &gen6_urb,
  123.    &gen6_blend_state,           /* must do before cc unit */
  124.    &gen6_color_calc_state,      /* must do before cc unit */
  125.    &gen6_depth_stencil_state,   /* must do before cc unit */
  126.  
  127.    &gen6_vs_push_constants, /* Before vs_state */
  128.    &gen6_gs_push_constants, /* Before gs_state */
  129.    &gen6_wm_push_constants, /* Before wm_state */
  130.  
  131.    /* Surface state setup.  Must come before the VS/WM unit.  The binding
  132.     * table upload must be last.
  133.     */
  134.    &brw_vs_pull_constants,
  135.    &brw_vs_ubo_surfaces,
  136.    &brw_gs_pull_constants,
  137.    &brw_gs_ubo_surfaces,
  138.    &brw_wm_pull_constants,
  139.    &brw_wm_ubo_surfaces,
  140.    &gen6_renderbuffer_surfaces,
  141.    &brw_texture_surfaces,
  142.    &gen6_sol_surface,
  143.    &brw_vs_binding_table,
  144.    &gen6_gs_binding_table,
  145.    &brw_wm_binding_table,
  146.  
  147.    &brw_fs_samplers,
  148.    &brw_vs_samplers,
  149.    &brw_gs_samplers,
  150.    &gen6_sampler_state,
  151.    &gen6_multisample_state,
  152.  
  153.    &gen6_vs_state,
  154.    &gen6_gs_state,
  155.    &gen6_clip_state,
  156.    &gen6_sf_state,
  157.    &gen6_wm_state,
  158.  
  159.    &gen6_scissor_state,
  160.  
  161.    &gen6_binding_table_pointers,
  162.  
  163.    &brw_depthbuffer,
  164.  
  165.    &brw_polygon_stipple,
  166.    &brw_polygon_stipple_offset,
  167.  
  168.    &brw_line_stipple,
  169.    &brw_aa_line_parameters,
  170.  
  171.    &brw_drawing_rect,
  172.  
  173.    &brw_indices, /* must come before brw_vertices */
  174.    &brw_index_buffer,
  175.    &brw_vertices,
  176. };
  177.  
  178. static const struct brw_tracked_state *gen7_render_atoms[] =
  179. {
  180.    /* Command packets: */
  181.  
  182.    /* must do before binding table pointers, cc state ptrs */
  183.    &brw_state_base_address,
  184.  
  185.    &brw_cc_vp,
  186.    &gen7_sf_clip_viewport,
  187.  
  188.    &gen7_push_constant_space,
  189.    &gen7_urb,
  190.    &gen6_blend_state,           /* must do before cc unit */
  191.    &gen6_color_calc_state,      /* must do before cc unit */
  192.    &gen6_depth_stencil_state,   /* must do before cc unit */
  193.  
  194.    &gen6_vs_push_constants, /* Before vs_state */
  195.    &gen6_gs_push_constants, /* Before gs_state */
  196.    &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
  197.  
  198.    /* Surface state setup.  Must come before the VS/WM unit.  The binding
  199.     * table upload must be last.
  200.     */
  201.    &brw_vs_pull_constants,
  202.    &brw_vs_ubo_surfaces,
  203.    &brw_vs_abo_surfaces,
  204.    &brw_gs_pull_constants,
  205.    &brw_gs_ubo_surfaces,
  206.    &brw_gs_abo_surfaces,
  207.    &brw_wm_pull_constants,
  208.    &brw_wm_ubo_surfaces,
  209.    &brw_wm_abo_surfaces,
  210.    &gen6_renderbuffer_surfaces,
  211.    &brw_texture_surfaces,
  212.    &brw_vs_binding_table,
  213.    &brw_gs_binding_table,
  214.    &brw_wm_binding_table,
  215.  
  216.    &brw_fs_samplers,
  217.    &brw_vs_samplers,
  218.    &brw_gs_samplers,
  219.    &gen6_multisample_state,
  220.  
  221.    &gen7_disable_stages,
  222.    &gen7_vs_state,
  223.    &gen7_gs_state,
  224.    &gen7_sol_state,
  225.    &gen7_clip_state,
  226.    &gen7_sbe_state,
  227.    &gen7_sf_state,
  228.    &gen7_wm_state,
  229.    &gen7_ps_state,
  230.  
  231.    &gen6_scissor_state,
  232.  
  233.    &gen7_depthbuffer,
  234.  
  235.    &brw_polygon_stipple,
  236.    &brw_polygon_stipple_offset,
  237.  
  238.    &brw_line_stipple,
  239.    &brw_aa_line_parameters,
  240.  
  241.    &brw_drawing_rect,
  242.  
  243.    &brw_indices, /* must come before brw_vertices */
  244.    &brw_index_buffer,
  245.    &brw_vertices,
  246.  
  247.    &haswell_cut_index,
  248. };
  249.  
  250. static const struct brw_tracked_state *gen7_compute_atoms[] =
  251. {
  252.    &brw_state_base_address,
  253.    &brw_cs_abo_surfaces,
  254.    &brw_cs_state,
  255. };
  256.  
  257. static const struct brw_tracked_state *gen8_render_atoms[] =
  258. {
  259.    /* Command packets: */
  260.    &gen8_state_base_address,
  261.  
  262.    &brw_cc_vp,
  263.    &gen8_sf_clip_viewport,
  264.  
  265.    &gen7_push_constant_space,
  266.    &gen7_urb,
  267.    &gen8_blend_state,
  268.    &gen6_color_calc_state,
  269.  
  270.    &gen6_vs_push_constants, /* Before vs_state */
  271.    &gen6_gs_push_constants, /* Before gs_state */
  272.    &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
  273.  
  274.    /* Surface state setup.  Must come before the VS/WM unit.  The binding
  275.     * table upload must be last.
  276.     */
  277.    &brw_vs_pull_constants,
  278.    &brw_vs_ubo_surfaces,
  279.    &brw_vs_abo_surfaces,
  280.    &brw_gs_pull_constants,
  281.    &brw_gs_ubo_surfaces,
  282.    &brw_gs_abo_surfaces,
  283.    &brw_wm_pull_constants,
  284.    &brw_wm_ubo_surfaces,
  285.    &brw_wm_abo_surfaces,
  286.    &gen6_renderbuffer_surfaces,
  287.    &brw_texture_surfaces,
  288.    &brw_vs_binding_table,
  289.    &brw_gs_binding_table,
  290.    &brw_wm_binding_table,
  291.  
  292.    &brw_fs_samplers,
  293.    &brw_vs_samplers,
  294.    &brw_gs_samplers,
  295.    &gen8_multisample_state,
  296.  
  297.    &gen8_disable_stages,
  298.    &gen8_vs_state,
  299.    &gen8_gs_state,
  300.    &gen8_sol_state,
  301.    &gen6_clip_state,
  302.    &gen8_raster_state,
  303.    &gen8_sbe_state,
  304.    &gen8_sf_state,
  305.    &gen8_ps_blend,
  306.    &gen8_ps_extra,
  307.    &gen8_ps_state,
  308.    &gen8_wm_depth_stencil,
  309.    &gen8_wm_state,
  310.  
  311.    &gen6_scissor_state,
  312.  
  313.    &gen7_depthbuffer,
  314.  
  315.    &brw_polygon_stipple,
  316.    &brw_polygon_stipple_offset,
  317.  
  318.    &brw_line_stipple,
  319.    &brw_aa_line_parameters,
  320.  
  321.    &brw_drawing_rect,
  322.  
  323.    &gen8_vf_topology,
  324.  
  325.    &brw_indices,
  326.    &gen8_index_buffer,
  327.    &gen8_vertices,
  328.  
  329.    &haswell_cut_index,
  330.    &gen8_pma_fix,
  331. };
  332.  
  333. static const struct brw_tracked_state *gen8_compute_atoms[] =
  334. {
  335.    &gen8_state_base_address,
  336.    &brw_cs_abo_surfaces,
  337.    &brw_cs_state,
  338. };
  339.  
  340. static void
  341. brw_upload_initial_gpu_state(struct brw_context *brw)
  342. {
  343.    /* On platforms with hardware contexts, we can set our initial GPU state
  344.     * right away rather than doing it via state atoms.  This saves a small
  345.     * amount of overhead on every draw call.
  346.     */
  347.    if (!brw->hw_ctx)
  348.       return;
  349.  
  350.    if (brw->gen == 6)
  351.       intel_emit_post_sync_nonzero_flush(brw);
  352.  
  353.    brw_upload_invariant_state(brw);
  354.  
  355.    /* Recommended optimization for Victim Cache eviction in pixel backend. */
  356.    if (brw->gen >= 9) {
  357.       BEGIN_BATCH(3);
  358.       OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
  359.       OUT_BATCH(GEN7_CACHE_MODE_1);
  360.       OUT_BATCH((GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC << 16) |
  361.                 GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC);
  362.       ADVANCE_BATCH();
  363.    }
  364.  
  365.    if (brw->gen >= 8) {
  366.       gen8_emit_3dstate_sample_pattern(brw);
  367.    }
  368. }
  369.  
  370. static inline const struct brw_tracked_state *
  371. brw_get_pipeline_atoms(struct brw_context *brw,
  372.                        enum brw_pipeline pipeline)
  373. {
  374.    switch (pipeline) {
  375.    case BRW_RENDER_PIPELINE:
  376.       return brw->render_atoms;
  377.    case BRW_COMPUTE_PIPELINE:
  378.       return brw->compute_atoms;
  379.    default:
  380.       STATIC_ASSERT(BRW_NUM_PIPELINES == 2);
  381.       unreachable("Unsupported pipeline");
  382.       return NULL;
  383.    }
  384. }
  385.  
  386. static void
  387. brw_copy_pipeline_atoms(struct brw_context *brw,
  388.                         enum brw_pipeline pipeline,
  389.                         const struct brw_tracked_state **atoms,
  390.                         int num_atoms)
  391. {
  392.    /* This is to work around brw_context::atoms being declared const.  We want
  393.     * it to be const, but it needs to be initialized somehow!
  394.     */
  395.    struct brw_tracked_state *context_atoms =
  396.       (struct brw_tracked_state *) brw_get_pipeline_atoms(brw, pipeline);
  397.  
  398.    for (int i = 0; i < num_atoms; i++) {
  399.       context_atoms[i] = *atoms[i];
  400.       assert(context_atoms[i].dirty.mesa | context_atoms[i].dirty.brw);
  401.       assert(context_atoms[i].emit);
  402.    }
  403.  
  404.    brw->num_atoms[pipeline] = num_atoms;
  405. }
  406.  
  407. void brw_init_state( struct brw_context *brw )
  408. {
  409.    struct gl_context *ctx = &brw->ctx;
  410.  
  411.    /* Force the first brw_select_pipeline to emit pipeline select */
  412.    brw->last_pipeline = BRW_NUM_PIPELINES;
  413.  
  414.    STATIC_ASSERT(ARRAY_SIZE(gen4_atoms) <= ARRAY_SIZE(brw->render_atoms));
  415.    STATIC_ASSERT(ARRAY_SIZE(gen6_atoms) <= ARRAY_SIZE(brw->render_atoms));
  416.    STATIC_ASSERT(ARRAY_SIZE(gen7_render_atoms) <=
  417.                  ARRAY_SIZE(brw->render_atoms));
  418.    STATIC_ASSERT(ARRAY_SIZE(gen8_render_atoms) <=
  419.                  ARRAY_SIZE(brw->render_atoms));
  420.    STATIC_ASSERT(ARRAY_SIZE(gen7_compute_atoms) <=
  421.                  ARRAY_SIZE(brw->compute_atoms));
  422.    STATIC_ASSERT(ARRAY_SIZE(gen8_compute_atoms) <=
  423.                  ARRAY_SIZE(brw->compute_atoms));
  424.  
  425.    brw_init_caches(brw);
  426.  
  427.    if (brw->gen >= 8) {
  428.       brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
  429.                               gen8_render_atoms,
  430.                               ARRAY_SIZE(gen8_render_atoms));
  431.       brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
  432.                               gen8_compute_atoms,
  433.                               ARRAY_SIZE(gen8_compute_atoms));
  434.    } else if (brw->gen == 7) {
  435.       brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
  436.                               gen7_render_atoms,
  437.                               ARRAY_SIZE(gen7_render_atoms));
  438.       brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
  439.                               gen7_compute_atoms,
  440.                               ARRAY_SIZE(gen7_compute_atoms));
  441.    } else if (brw->gen == 6) {
  442.       brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
  443.                               gen6_atoms, ARRAY_SIZE(gen6_atoms));
  444.    } else {
  445.       brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
  446.                               gen4_atoms, ARRAY_SIZE(gen4_atoms));
  447.    }
  448.  
  449.    brw_upload_initial_gpu_state(brw);
  450.  
  451.    brw->NewGLState = ~0;
  452.    brw->ctx.NewDriverState = ~0ull;
  453.  
  454.    /* ~0 is a nonsensical value which won't match anything we program, so
  455.     * the programming will take effect on the first time around.
  456.     */
  457.    brw->pma_stall_bits = ~0;
  458.  
  459.    /* Make sure that brw->ctx.NewDriverState has enough bits to hold all possible
  460.     * dirty flags.
  461.     */
  462.    STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->ctx.NewDriverState));
  463.  
  464.    ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
  465.    ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK;
  466.    ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
  467.    ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
  468.    ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
  469.    ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
  470. }
  471.  
  472.  
  473. void brw_destroy_state( struct brw_context *brw )
  474. {
  475.    brw_destroy_caches(brw);
  476. }
  477.  
  478. /***********************************************************************
  479.  */
  480.  
  481. static bool
  482. check_state(const struct brw_state_flags *a, const struct brw_state_flags *b)
  483. {
  484.    return ((a->mesa & b->mesa) | (a->brw & b->brw)) != 0;
  485. }
  486.  
  487. static void accumulate_state( struct brw_state_flags *a,
  488.                               const struct brw_state_flags *b )
  489. {
  490.    a->mesa |= b->mesa;
  491.    a->brw |= b->brw;
  492. }
  493.  
  494.  
  495. static void xor_states( struct brw_state_flags *result,
  496.                              const struct brw_state_flags *a,
  497.                               const struct brw_state_flags *b )
  498. {
  499.    result->mesa = a->mesa ^ b->mesa;
  500.    result->brw = a->brw ^ b->brw;
  501. }
  502.  
  503. struct dirty_bit_map {
  504.    uint64_t bit;
  505.    char *name;
  506.    uint32_t count;
  507. };
  508.  
  509. #define DEFINE_BIT(name) {name, #name, 0}
  510.  
  511. static struct dirty_bit_map mesa_bits[] = {
  512.    DEFINE_BIT(_NEW_MODELVIEW),
  513.    DEFINE_BIT(_NEW_PROJECTION),
  514.    DEFINE_BIT(_NEW_TEXTURE_MATRIX),
  515.    DEFINE_BIT(_NEW_COLOR),
  516.    DEFINE_BIT(_NEW_DEPTH),
  517.    DEFINE_BIT(_NEW_EVAL),
  518.    DEFINE_BIT(_NEW_FOG),
  519.    DEFINE_BIT(_NEW_HINT),
  520.    DEFINE_BIT(_NEW_LIGHT),
  521.    DEFINE_BIT(_NEW_LINE),
  522.    DEFINE_BIT(_NEW_PIXEL),
  523.    DEFINE_BIT(_NEW_POINT),
  524.    DEFINE_BIT(_NEW_POLYGON),
  525.    DEFINE_BIT(_NEW_POLYGONSTIPPLE),
  526.    DEFINE_BIT(_NEW_SCISSOR),
  527.    DEFINE_BIT(_NEW_STENCIL),
  528.    DEFINE_BIT(_NEW_TEXTURE),
  529.    DEFINE_BIT(_NEW_TRANSFORM),
  530.    DEFINE_BIT(_NEW_VIEWPORT),
  531.    DEFINE_BIT(_NEW_ARRAY),
  532.    DEFINE_BIT(_NEW_RENDERMODE),
  533.    DEFINE_BIT(_NEW_BUFFERS),
  534.    DEFINE_BIT(_NEW_CURRENT_ATTRIB),
  535.    DEFINE_BIT(_NEW_MULTISAMPLE),
  536.    DEFINE_BIT(_NEW_TRACK_MATRIX),
  537.    DEFINE_BIT(_NEW_PROGRAM),
  538.    DEFINE_BIT(_NEW_PROGRAM_CONSTANTS),
  539.    DEFINE_BIT(_NEW_BUFFER_OBJECT),
  540.    DEFINE_BIT(_NEW_FRAG_CLAMP),
  541.    /* Avoid sign extension problems. */
  542.    {(unsigned) _NEW_VARYING_VP_INPUTS, "_NEW_VARYING_VP_INPUTS", 0},
  543.    {0, 0, 0}
  544. };
  545.  
  546. static struct dirty_bit_map brw_bits[] = {
  547.    DEFINE_BIT(BRW_NEW_FS_PROG_DATA),
  548.    DEFINE_BIT(BRW_NEW_BLORP_BLIT_PROG_DATA),
  549.    DEFINE_BIT(BRW_NEW_SF_PROG_DATA),
  550.    DEFINE_BIT(BRW_NEW_VS_PROG_DATA),
  551.    DEFINE_BIT(BRW_NEW_FF_GS_PROG_DATA),
  552.    DEFINE_BIT(BRW_NEW_GS_PROG_DATA),
  553.    DEFINE_BIT(BRW_NEW_CLIP_PROG_DATA),
  554.    DEFINE_BIT(BRW_NEW_CS_PROG_DATA),
  555.    DEFINE_BIT(BRW_NEW_URB_FENCE),
  556.    DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
  557.    DEFINE_BIT(BRW_NEW_GEOMETRY_PROGRAM),
  558.    DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
  559.    DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
  560.    DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
  561.    DEFINE_BIT(BRW_NEW_PRIMITIVE),
  562.    DEFINE_BIT(BRW_NEW_CONTEXT),
  563.    DEFINE_BIT(BRW_NEW_PSP),
  564.    DEFINE_BIT(BRW_NEW_SURFACES),
  565.    DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
  566.    DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
  567.    DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
  568.    DEFINE_BIT(BRW_NEW_INDICES),
  569.    DEFINE_BIT(BRW_NEW_VERTICES),
  570.    DEFINE_BIT(BRW_NEW_BATCH),
  571.    DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
  572.    DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
  573.    DEFINE_BIT(BRW_NEW_GS_CONSTBUF),
  574.    DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
  575.    DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
  576.    DEFINE_BIT(BRW_NEW_VUE_MAP_VS),
  577.    DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT),
  578.    DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK),
  579.    DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD),
  580.    DEFINE_BIT(BRW_NEW_STATS_WM),
  581.    DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
  582.    DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER),
  583.    DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
  584.    DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP),
  585.    DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION),
  586.    DEFINE_BIT(BRW_NEW_NUM_SAMPLES),
  587.    DEFINE_BIT(BRW_NEW_TEXTURE_BUFFER),
  588.    DEFINE_BIT(BRW_NEW_GEN4_UNIT_STATE),
  589.    DEFINE_BIT(BRW_NEW_CC_VP),
  590.    DEFINE_BIT(BRW_NEW_SF_VP),
  591.    DEFINE_BIT(BRW_NEW_CLIP_VP),
  592.    DEFINE_BIT(BRW_NEW_SAMPLER_STATE_TABLE),
  593.    DEFINE_BIT(BRW_NEW_VS_ATTRIB_WORKAROUNDS),
  594.    DEFINE_BIT(BRW_NEW_COMPUTE_PROGRAM),
  595.    {0, 0, 0}
  596. };
  597.  
  598. static void
  599. brw_update_dirty_count(struct dirty_bit_map *bit_map, uint64_t bits)
  600. {
  601.    for (int i = 0; bit_map[i].bit != 0; i++) {
  602.       if (bit_map[i].bit & bits)
  603.          bit_map[i].count++;
  604.    }
  605. }
  606.  
  607. static void
  608. brw_print_dirty_count(struct dirty_bit_map *bit_map)
  609. {
  610.    for (int i = 0; bit_map[i].bit != 0; i++) {
  611.       if (bit_map[i].count > 1) {
  612.          fprintf(stderr, "0x%016lx: %12d (%s)\n",
  613.                  bit_map[i].bit, bit_map[i].count, bit_map[i].name);
  614.       }
  615.    }
  616. }
  617.  
  618. static inline void
  619. brw_upload_programs(struct brw_context *brw,
  620.                     enum brw_pipeline pipeline)
  621. {
  622.    if (pipeline == BRW_RENDER_PIPELINE) {
  623.       brw_upload_vs_prog(brw);
  624.  
  625.       if (brw->gen < 6)
  626.          brw_upload_ff_gs_prog(brw);
  627.       else
  628.          brw_upload_gs_prog(brw);
  629.  
  630.       brw_upload_wm_prog(brw);
  631.    } else if (pipeline == BRW_COMPUTE_PIPELINE) {
  632.       brw_upload_cs_prog(brw);
  633.    }
  634. }
  635.  
  636. static inline void
  637. merge_ctx_state(struct brw_context *brw,
  638.                 struct brw_state_flags *state)
  639. {
  640.    state->mesa |= brw->NewGLState;
  641.    state->brw |= brw->ctx.NewDriverState;
  642. }
  643.  
  644. static inline void
  645. check_and_emit_atom(struct brw_context *brw,
  646.                     struct brw_state_flags *state,
  647.                     const struct brw_tracked_state *atom)
  648. {
  649.    if (check_state(state, &atom->dirty)) {
  650.       atom->emit(brw);
  651.       merge_ctx_state(brw, state);
  652.    }
  653. }
  654.  
  655. static inline void
  656. brw_upload_pipeline_state(struct brw_context *brw,
  657.                           enum brw_pipeline pipeline)
  658. {
  659.    struct gl_context *ctx = &brw->ctx;
  660.    int i;
  661.    static int dirty_count = 0;
  662.    struct brw_state_flags state = brw->state.pipelines[pipeline];
  663.  
  664.    brw_select_pipeline(brw, pipeline);
  665.  
  666.    if (0) {
  667.       /* Always re-emit all state. */
  668.       brw->NewGLState = ~0;
  669.       ctx->NewDriverState = ~0ull;
  670.    }
  671.  
  672.    if (pipeline == BRW_RENDER_PIPELINE) {
  673.       if (brw->fragment_program != ctx->FragmentProgram._Current) {
  674.          brw->fragment_program = ctx->FragmentProgram._Current;
  675.          brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM;
  676.       }
  677.  
  678.       if (brw->geometry_program != ctx->GeometryProgram._Current) {
  679.          brw->geometry_program = ctx->GeometryProgram._Current;
  680.          brw->ctx.NewDriverState |= BRW_NEW_GEOMETRY_PROGRAM;
  681.       }
  682.  
  683.       if (brw->vertex_program != ctx->VertexProgram._Current) {
  684.          brw->vertex_program = ctx->VertexProgram._Current;
  685.          brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM;
  686.       }
  687.    }
  688.  
  689.    if (brw->compute_program != ctx->ComputeProgram._Current) {
  690.       brw->compute_program = ctx->ComputeProgram._Current;
  691.       brw->ctx.NewDriverState |= BRW_NEW_COMPUTE_PROGRAM;
  692.    }
  693.  
  694.    if (brw->meta_in_progress != _mesa_meta_in_progress(ctx)) {
  695.       brw->meta_in_progress = _mesa_meta_in_progress(ctx);
  696.       brw->ctx.NewDriverState |= BRW_NEW_META_IN_PROGRESS;
  697.    }
  698.  
  699.    if (brw->num_samples != ctx->DrawBuffer->Visual.samples) {
  700.       brw->num_samples = ctx->DrawBuffer->Visual.samples;
  701.       brw->ctx.NewDriverState |= BRW_NEW_NUM_SAMPLES;
  702.    }
  703.  
  704.    /* Exit early if no state is flagged as dirty */
  705.    merge_ctx_state(brw, &state);
  706.    if ((state.mesa | state.brw) == 0)
  707.       return;
  708.  
  709.    /* Emit Sandybridge workaround flushes on every primitive, for safety. */
  710.    if (brw->gen == 6)
  711.       intel_emit_post_sync_nonzero_flush(brw);
  712.  
  713.    brw_upload_programs(brw, pipeline);
  714.    merge_ctx_state(brw, &state);
  715.  
  716.    const struct brw_tracked_state *atoms =
  717.       brw_get_pipeline_atoms(brw, pipeline);
  718.    const int num_atoms = brw->num_atoms[pipeline];
  719.  
  720.    if (unlikely(INTEL_DEBUG)) {
  721.       /* Debug version which enforces various sanity checks on the
  722.        * state flags which are generated and checked to help ensure
  723.        * state atoms are ordered correctly in the list.
  724.        */
  725.       struct brw_state_flags examined, prev;
  726.       memset(&examined, 0, sizeof(examined));
  727.       prev = state;
  728.  
  729.       for (i = 0; i < num_atoms; i++) {
  730.          const struct brw_tracked_state *atom = &atoms[i];
  731.          struct brw_state_flags generated;
  732.  
  733.          check_and_emit_atom(brw, &state, atom);
  734.  
  735.          accumulate_state(&examined, &atom->dirty);
  736.  
  737.          /* generated = (prev ^ state)
  738.           * if (examined & generated)
  739.           *     fail;
  740.           */
  741.          xor_states(&generated, &prev, &state);
  742.          assert(!check_state(&examined, &generated));
  743.          prev = state;
  744.       }
  745.    }
  746.    else {
  747.       for (i = 0; i < num_atoms; i++) {
  748.          const struct brw_tracked_state *atom = &atoms[i];
  749.  
  750.          check_and_emit_atom(brw, &state, atom);
  751.       }
  752.    }
  753.  
  754.    if (unlikely(INTEL_DEBUG & DEBUG_STATE)) {
  755.       STATIC_ASSERT(ARRAY_SIZE(brw_bits) == BRW_NUM_STATE_BITS + 1);
  756.  
  757.       brw_update_dirty_count(mesa_bits, state.mesa);
  758.       brw_update_dirty_count(brw_bits, state.brw);
  759.       if (dirty_count++ % 1000 == 0) {
  760.          brw_print_dirty_count(mesa_bits);
  761.          brw_print_dirty_count(brw_bits);
  762.          fprintf(stderr, "\n");
  763.       }
  764.    }
  765. }
  766.  
  767. /***********************************************************************
  768.  * Emit all state:
  769.  */
  770. void brw_upload_render_state(struct brw_context *brw)
  771. {
  772.    brw_upload_pipeline_state(brw, BRW_RENDER_PIPELINE);
  773. }
  774.  
  775. static inline void
  776. brw_pipeline_state_finished(struct brw_context *brw,
  777.                             enum brw_pipeline pipeline)
  778. {
  779.    /* Save all dirty state into the other pipelines */
  780.    for (int i = 0; i < BRW_NUM_PIPELINES; i++) {
  781.       if (i != pipeline) {
  782.          brw->state.pipelines[i].mesa |= brw->NewGLState;
  783.          brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
  784.       } else {
  785.          memset(&brw->state.pipelines[i], 0, sizeof(struct brw_state_flags));
  786.       }
  787.    }
  788.  
  789.    brw->NewGLState = 0;
  790.    brw->ctx.NewDriverState = 0ull;
  791. }
  792.  
  793. /**
  794.  * Clear dirty bits to account for the fact that the state emitted by
  795.  * brw_upload_render_state() has been committed to the hardware. This is a
  796.  * separate call from brw_upload_render_state() because it's possible that
  797.  * after the call to brw_upload_render_state(), we will discover that we've
  798.  * run out of aperture space, and need to rewind the batch buffer to the state
  799.  * it had before the brw_upload_render_state() call.
  800.  */
  801. void
  802. brw_render_state_finished(struct brw_context *brw)
  803. {
  804.    brw_pipeline_state_finished(brw, BRW_RENDER_PIPELINE);
  805. }
  806.  
  807. void
  808. brw_upload_compute_state(struct brw_context *brw)
  809. {
  810.    brw_upload_pipeline_state(brw, BRW_COMPUTE_PIPELINE);
  811. }
  812.  
  813. void
  814. brw_compute_state_finished(struct brw_context *brw)
  815. {
  816.    brw_pipeline_state_finished(brw, BRW_COMPUTE_PIPELINE);
  817. }
  818.