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  1. /*
  2.  * Copyright © 2014 Advanced Micro Devices, Inc.
  3.  * All Rights Reserved.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining
  6.  * a copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15.  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16.  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17.  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19.  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20.  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21.  *
  22.  * The above copyright notice and this permission notice (including the
  23.  * next paragraph) shall be included in all copies or substantial portions
  24.  * of the Software.
  25.  *
  26.  * Authors:
  27.  *   Marek Olšák <maraeo@gmail.com>
  28.  */
  29.  
  30. #include "radeon_drm_winsys.h"
  31.  
  32. #include <radeon_surface.h>
  33.  
  34. static void surf_level_winsys_to_drm(struct radeon_surface_level *level_drm,
  35.                                      const struct radeon_surf_level *level_ws)
  36. {
  37.     level_drm->offset = level_ws->offset;
  38.     level_drm->slice_size = level_ws->slice_size;
  39.     level_drm->npix_x = level_ws->npix_x;
  40.     level_drm->npix_y = level_ws->npix_y;
  41.     level_drm->npix_z = level_ws->npix_z;
  42.     level_drm->nblk_x = level_ws->nblk_x;
  43.     level_drm->nblk_y = level_ws->nblk_y;
  44.     level_drm->nblk_z = level_ws->nblk_z;
  45.     level_drm->pitch_bytes = level_ws->pitch_bytes;
  46.     level_drm->mode = level_ws->mode;
  47. }
  48.  
  49. static void surf_level_drm_to_winsys(struct radeon_surf_level *level_ws,
  50.                                      const struct radeon_surface_level *level_drm)
  51. {
  52.     level_ws->offset = level_drm->offset;
  53.     level_ws->slice_size = level_drm->slice_size;
  54.     level_ws->npix_x = level_drm->npix_x;
  55.     level_ws->npix_y = level_drm->npix_y;
  56.     level_ws->npix_z = level_drm->npix_z;
  57.     level_ws->nblk_x = level_drm->nblk_x;
  58.     level_ws->nblk_y = level_drm->nblk_y;
  59.     level_ws->nblk_z = level_drm->nblk_z;
  60.     level_ws->pitch_bytes = level_drm->pitch_bytes;
  61.     level_ws->mode = level_drm->mode;
  62. }
  63.  
  64. static void surf_winsys_to_drm(struct radeon_surface *surf_drm,
  65.                                const struct radeon_surf *surf_ws)
  66. {
  67.     int i;
  68.  
  69.     memset(surf_drm, 0, sizeof(*surf_drm));
  70.  
  71.     surf_drm->npix_x = surf_ws->npix_x;
  72.     surf_drm->npix_y = surf_ws->npix_y;
  73.     surf_drm->npix_z = surf_ws->npix_z;
  74.     surf_drm->blk_w = surf_ws->blk_w;
  75.     surf_drm->blk_h = surf_ws->blk_h;
  76.     surf_drm->blk_d = surf_ws->blk_d;
  77.     surf_drm->array_size = surf_ws->array_size;
  78.     surf_drm->last_level = surf_ws->last_level;
  79.     surf_drm->bpe = surf_ws->bpe;
  80.     surf_drm->nsamples = surf_ws->nsamples;
  81.     surf_drm->flags = surf_ws->flags;
  82.  
  83.     surf_drm->bo_size = surf_ws->bo_size;
  84.     surf_drm->bo_alignment = surf_ws->bo_alignment;
  85.  
  86.     surf_drm->bankw = surf_ws->bankw;
  87.     surf_drm->bankh = surf_ws->bankh;
  88.     surf_drm->mtilea = surf_ws->mtilea;
  89.     surf_drm->tile_split = surf_ws->tile_split;
  90.     surf_drm->stencil_tile_split = surf_ws->stencil_tile_split;
  91.     surf_drm->stencil_offset = surf_ws->stencil_offset;
  92.  
  93.     for (i = 0; i < RADEON_SURF_MAX_LEVEL; i++) {
  94.         surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i]);
  95.         surf_level_winsys_to_drm(&surf_drm->stencil_level[i],
  96.                                  &surf_ws->stencil_level[i]);
  97.  
  98.         surf_drm->tiling_index[i] = surf_ws->tiling_index[i];
  99.         surf_drm->stencil_tiling_index[i] = surf_ws->stencil_tiling_index[i];
  100.     }
  101. }
  102.  
  103. static void surf_drm_to_winsys(struct radeon_surf *surf_ws,
  104.                                const struct radeon_surface *surf_drm)
  105. {
  106.     int i;
  107.  
  108.     memset(surf_ws, 0, sizeof(*surf_ws));
  109.  
  110.     surf_ws->npix_x = surf_drm->npix_x;
  111.     surf_ws->npix_y = surf_drm->npix_y;
  112.     surf_ws->npix_z = surf_drm->npix_z;
  113.     surf_ws->blk_w = surf_drm->blk_w;
  114.     surf_ws->blk_h = surf_drm->blk_h;
  115.     surf_ws->blk_d = surf_drm->blk_d;
  116.     surf_ws->array_size = surf_drm->array_size;
  117.     surf_ws->last_level = surf_drm->last_level;
  118.     surf_ws->bpe = surf_drm->bpe;
  119.     surf_ws->nsamples = surf_drm->nsamples;
  120.     surf_ws->flags = surf_drm->flags;
  121.  
  122.     surf_ws->bo_size = surf_drm->bo_size;
  123.     surf_ws->bo_alignment = surf_drm->bo_alignment;
  124.  
  125.     surf_ws->bankw = surf_drm->bankw;
  126.     surf_ws->bankh = surf_drm->bankh;
  127.     surf_ws->mtilea = surf_drm->mtilea;
  128.     surf_ws->tile_split = surf_drm->tile_split;
  129.     surf_ws->stencil_tile_split = surf_drm->stencil_tile_split;
  130.     surf_ws->stencil_offset = surf_drm->stencil_offset;
  131.  
  132.     for (i = 0; i < RADEON_SURF_MAX_LEVEL; i++) {
  133.         surf_level_drm_to_winsys(&surf_ws->level[i], &surf_drm->level[i]);
  134.         surf_level_drm_to_winsys(&surf_ws->stencil_level[i],
  135.                                  &surf_drm->stencil_level[i]);
  136.  
  137.         surf_ws->tiling_index[i] = surf_drm->tiling_index[i];
  138.         surf_ws->stencil_tiling_index[i] = surf_drm->stencil_tiling_index[i];
  139.     }
  140. }
  141.  
  142. static int radeon_winsys_surface_init(struct radeon_winsys *rws,
  143.                                       struct radeon_surf *surf_ws)
  144. {
  145.     struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
  146.     struct radeon_surface surf_drm;
  147.     int r;
  148.  
  149.     surf_winsys_to_drm(&surf_drm, surf_ws);
  150.  
  151.     r = radeon_surface_init(ws->surf_man, &surf_drm);
  152.     if (r)
  153.         return r;
  154.  
  155.     surf_drm_to_winsys(surf_ws, &surf_drm);
  156.     return 0;
  157. }
  158.  
  159. static int radeon_winsys_surface_best(struct radeon_winsys *rws,
  160.                                       struct radeon_surf *surf_ws)
  161. {
  162.     struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
  163.     struct radeon_surface surf_drm;
  164.     int r;
  165.  
  166.     surf_winsys_to_drm(&surf_drm, surf_ws);
  167.  
  168.     r = radeon_surface_best(ws->surf_man, &surf_drm);
  169.     if (r)
  170.         return r;
  171.  
  172.     surf_drm_to_winsys(surf_ws, &surf_drm);
  173.     return 0;
  174. }
  175.  
  176. void radeon_surface_init_functions(struct radeon_drm_winsys *ws)
  177. {
  178.     ws->base.surface_init = radeon_winsys_surface_init;
  179.     ws->base.surface_best = radeon_winsys_surface_best;
  180. }
  181.