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  1. /*
  2.  * Copyright 2011 Jerome Glisse <glisse@freedesktop.org>
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * on the rights to use, copy, modify, merge, publish, distribute, sub
  8.  * license, and/or sell copies of the Software, and to permit persons to whom
  9.  * the Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18.  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19.  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20.  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21.  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22.  *
  23.  * Authors:
  24.  *      Jérôme Glisse
  25.  */
  26. #ifndef RADEON_CTX_H
  27. #define RADEON_CTX_H
  28.  
  29. #define _FILE_OFFSET_BITS 64
  30. #include <sys/mman.h>
  31.  
  32. #include <errno.h>
  33. #include <stdio.h>
  34. #include <stdlib.h>
  35. #include <stdint.h>
  36. #include <string.h>
  37. #include "xf86drm.h"
  38. #include "radeon_drm.h"
  39.  
  40. struct ctx {
  41.     int                         fd;
  42. };
  43.  
  44. struct bo {
  45.     uint32_t                    handle;
  46.     uint32_t                    alignment;
  47.     uint64_t                    size;
  48.     uint64_t                    va;
  49.     void                        *ptr;
  50. };
  51.  
  52. static void ctx_init(struct ctx *ctx)
  53. {
  54.     ctx->fd = drmOpen("radeon", NULL);
  55.     if (ctx->fd < 0) {
  56.         fprintf(stderr, "failed to open radeon drm device file\n");
  57.         exit(-1);
  58.     }
  59. }
  60.  
  61. static void bo_wait(struct ctx *ctx, struct bo *bo)
  62. {
  63.     struct drm_radeon_gem_wait_idle args;
  64.     void *ptr;
  65.     int r;
  66.  
  67.     /* Zero out args to make valgrind happy */
  68.     memset(&args, 0, sizeof(args));
  69.     args.handle = bo->handle;
  70.     do {
  71.         r = drmCommandWrite(ctx->fd, DRM_RADEON_GEM_WAIT_IDLE, &args, sizeof(args));
  72.     } while (r == -EBUSY);
  73. }
  74.  
  75.  
  76. static void ctx_cs(struct ctx *ctx, uint32_t *cs, uint32_t cs_flags[2], unsigned ndw,
  77.                    struct bo **bo, uint32_t *bo_relocs, unsigned nbo)
  78. {
  79.     struct drm_radeon_cs args;
  80.     struct drm_radeon_cs_chunk chunks[3];
  81.     uint64_t chunk_array[3];
  82.     unsigned i;
  83.     int r;
  84.  
  85.     /* update handle */
  86.     for (i = 0; i < nbo; i++) {
  87.         bo_relocs[i*4+0] = bo[i]->handle;
  88.     }
  89.  
  90.     args.num_chunks = 2;
  91.     if (cs_flags[0] || cs_flags[1]) {
  92.         /* enable RADEON_CHUNK_ID_FLAGS */
  93.         args.num_chunks = 3;
  94.     }
  95.     args.chunks = (uint64_t)(uintptr_t)chunk_array;
  96.     chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
  97.     chunks[0].length_dw = ndw;
  98.     chunks[0].chunk_data = (uintptr_t)cs;
  99.     chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
  100.     chunks[1].length_dw = nbo * 4;
  101.     chunks[1].chunk_data = (uintptr_t)bo_relocs;
  102.     chunks[2].chunk_id = RADEON_CHUNK_ID_FLAGS;
  103.     chunks[2].length_dw = 2;
  104.     chunks[2].chunk_data = (uintptr_t)cs_flags;
  105.     chunk_array[0] = (uintptr_t)&chunks[0];
  106.     chunk_array[1] = (uintptr_t)&chunks[1];
  107.     chunk_array[2] = (uintptr_t)&chunks[2];
  108.  
  109.     fprintf(stderr, "emiting cs %ddw with %d bo\n", ndw, nbo);
  110.     r = drmCommandWriteRead(ctx->fd, DRM_RADEON_CS, &args, sizeof(args));
  111.     if (r) {
  112.         fprintf(stderr, "cs submission failed with %d\n", r);
  113.         return;
  114.     }
  115. }
  116.  
  117. static void bo_map(struct ctx *ctx, struct bo *bo)
  118. {
  119.     struct drm_radeon_gem_mmap args;
  120.     void *ptr;
  121.     int r;
  122.  
  123.     /* Zero out args to make valgrind happy */
  124.     memset(&args, 0, sizeof(args));
  125.     args.handle = bo->handle;
  126.     args.offset = 0;
  127.     args.size = (uint64_t)bo->size;
  128.     r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_MMAP, &args, sizeof(args));
  129.     if (r) {
  130.         fprintf(stderr, "error mapping %p 0x%08X (error = %d)\n", bo, bo->handle, r);
  131.         exit(-1);
  132.     }
  133.     ptr = mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, ctx->fd, args.addr_ptr);
  134.     if (ptr == MAP_FAILED) {
  135.         fprintf(stderr, "%s failed to map bo\n", __func__);
  136.         exit(-1);
  137.     }
  138.     bo->ptr = ptr;
  139. }
  140.  
  141. static void bo_va(struct ctx *ctx, struct bo *bo)
  142. {
  143.     struct drm_radeon_gem_va args;
  144.     int r;
  145.  
  146.     args.handle = bo->handle;
  147.     args.vm_id = 0;
  148.     args.operation = RADEON_VA_MAP;
  149.     args.flags = RADEON_VM_PAGE_READABLE | RADEON_VM_PAGE_WRITEABLE | RADEON_VM_PAGE_SNOOPED;
  150.     args.offset = bo->va;
  151.     r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_VA, &args, sizeof(args));
  152.     if (r && args.operation == RADEON_VA_RESULT_ERROR) {
  153.         fprintf(stderr, "radeon: Failed to allocate virtual address for buffer:\n");
  154.         fprintf(stderr, "radeon:    size      : %d bytes\n", bo->size);
  155.         fprintf(stderr, "radeon:    alignment : %d bytes\n", bo->alignment);
  156.         fprintf(stderr, "radeon:    va        : 0x%016llx\n", (unsigned long long)bo->va);
  157.         exit(-1);
  158.     }
  159. }
  160.  
  161. static struct bo *bo_new(struct ctx *ctx, unsigned ndw, uint32_t *data, uint64_t va, uint32_t alignment)
  162. {
  163.     struct drm_radeon_gem_create args;
  164.     struct bo *bo;
  165.     int r;
  166.  
  167.     bo = calloc(1, sizeof(*bo));
  168.     if (bo == NULL) {
  169.         fprintf(stderr, "failed to malloc bo struct\n");
  170.         exit(-1);
  171.     }
  172.     bo->size = ndw * 4ULL;
  173.     bo->va = va;
  174.     bo->alignment = alignment;
  175.  
  176.     args.size = bo->size;
  177.     args.alignment = bo->alignment;
  178.     args.initial_domain = RADEON_GEM_DOMAIN_GTT;
  179.     args.flags = 0;
  180.     args.handle = 0;
  181.  
  182.     r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_CREATE, &args, sizeof(args));
  183.     bo->handle = args.handle;
  184.     if (r) {
  185.         fprintf(stderr, "Failed to allocate :\n");
  186.         fprintf(stderr, "   size      : %d bytes\n", bo->size);
  187.         fprintf(stderr, "   alignment : %d bytes\n", bo->alignment);
  188.         free(bo);
  189.         exit(-1);
  190.     }
  191.  
  192.     if (data) {
  193.         bo_map(ctx, bo);
  194.         memcpy(bo->ptr, data, bo->size);
  195.     }
  196.  
  197.     if (va) {
  198.         bo_va(ctx, bo);
  199.     }
  200.  
  201.     return bo;
  202. }
  203.  
  204.  
  205. #endif
  206.