#ifndef GEN_RENDER_XML
#define GEN_RENDER_XML
/* Autogenerated file, DO NOT EDIT manually!
This file was generated by the rules-ng-ng headergen tool in this git repository:
https://github.com/olvaffe/envytools/
git clone https://github.com/olvaffe/envytools.git
Copyright (C) 2014-2015 by the following authors:
- Chia-I Wu <olvaffe@gmail.com> (olv)
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define GEN6_RENDER_TYPE__MASK 0xe0000000
#define GEN6_RENDER_TYPE__SHIFT 29
#define GEN6_RENDER_TYPE_RENDER (0x3 << 29)
#define GEN6_RENDER_SUBTYPE__MASK 0x18000000
#define GEN6_RENDER_SUBTYPE__SHIFT 27
#define GEN6_RENDER_SUBTYPE_COMMON (0x0 << 27)
#define GEN6_RENDER_SUBTYPE_SINGLE_DW (0x1 << 27)
#define GEN6_RENDER_SUBTYPE_MEDIA (0x2 << 27)
#define GEN6_RENDER_SUBTYPE_3D (0x3 << 27)
#define GEN6_RENDER_OPCODE__MASK 0x07ff0000
#define GEN6_RENDER_OPCODE__SHIFT 16
#define GEN6_RENDER_OPCODE_STATE_BASE_ADDRESS (0x101 << 16)
#define GEN6_RENDER_OPCODE_STATE_SIP (0x102 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VF_STATISTICS (0xb << 16)
#define GEN6_RENDER_OPCODE_PIPELINE_SELECT (0x104 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_VFE_STATE (0x0 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_CURBE_LOAD (0x1 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD (0x2 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_STATE_FLUSH (0x4 << 16)
#define GEN7_RENDER_OPCODE_GPGPU_WALKER (0x105 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS (0x1 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS (0x2 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS (0x4 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_URB (0x5 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER (0x5 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER (0x6 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER (0x7 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_BUFFERS (0x8 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_ELEMENTS (0x9 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_INDEX_BUFFER (0xa << 16)
#define GEN75_RENDER_OPCODE_3DSTATE_VF (0xc << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS (0xd << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_MULTISAMPLE (0xd << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS (0xe << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SCISSOR_STATE_POINTERS (0xf << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VS (0x10 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_GS (0x11 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CLIP (0x12 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SF (0x13 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_WM (0x14 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS (0x15 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS (0x16 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS (0x17 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SAMPLE_MASK (0x18 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_HS (0x19 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS (0x1a << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_HS (0x1b << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_TE (0x1c << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DS (0x1d << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_STREAMOUT (0x1e << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SBE (0x1f << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PS (0x20 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP (0x21 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC (0x23 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS (0x24 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS (0x25 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_VS (0x26 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_HS (0x27 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_DS (0x28 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_GS (0x29 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS (0x2a << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_VS (0x2b << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_HS (0x2c << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_DS (0x2d << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_GS (0x2e << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS (0x2f << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_VS (0x30 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_HS (0x31 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_DS (0x32 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_GS (0x33 << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_VF_INSTANCING (0x49 << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_VF_SGVS (0x4a << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_VF_TOPOLOGY (0x4b << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_WM_CHROMAKEY (0x4c << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_PS_BLEND (0x4d << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_WM_DEPTH_STENCIL (0x4e << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_PS_EXTRA (0x4f << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_RASTER (0x50 << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_SBE_SWIZ (0x51 << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_WM_HZ_OP (0x52 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_DRAWING_RECTANGLE (0x100 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER (0x105 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_OFFSET (0x106 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_PATTERN (0x107 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_LINE_STIPPLE (0x108 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_AA_LINE_PARAMETERS (0x10a << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_GS_SVB_INDEX (0x10b << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_MULTISAMPLE (0x10d << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER (0x10e << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER (0x10f << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS (0x110 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_VS (0x112 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_HS (0x113 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_DS (0x114 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_GS (0x115 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_PS (0x116 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SO_DECL_LIST (0x117 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SO_BUFFER (0x118 << 16)
#define GEN8_RENDER_OPCODE_3DSTATE_SAMPLE_PATTERN (0x11c << 16)
#define GEN6_RENDER_OPCODE_PIPE_CONTROL (0x200 << 16)
#define GEN6_RENDER_OPCODE_3DPRIMITIVE (0x300 << 16)
#define GEN6_RENDER_LENGTH__MASK 0x000000ff
#define GEN6_RENDER_LENGTH__SHIFT 0
#define GEN6_MOCS_LLC__MASK 0x00000003
#define GEN6_MOCS_LLC__SHIFT 0
#define GEN6_MOCS_LLC_PTE 0x0
#define GEN6_MOCS_LLC_UC 0x1
#define GEN6_MOCS_LLC_WB 0x2
#define GEN7_MOCS_LLC__MASK 0x00000002
#define GEN7_MOCS_LLC__SHIFT 1
#define GEN7_MOCS_LLC_PTE (0x0 << 1)
#define GEN7_MOCS_LLC_WB (0x1 << 1)
#define GEN75_MOCS_LLC__MASK 0x00000006
#define GEN75_MOCS_LLC__SHIFT 1
#define GEN75_MOCS_LLC_PTE (0x0 << 1)
#define GEN75_MOCS_LLC_UC (0x1 << 1)
#define GEN75_MOCS_LLC_WB (0x2 << 1)
#define GEN75_MOCS_LLC_ELLC (0x3 << 1)
#define GEN7_MOCS_L3__MASK 0x00000001
#define GEN7_MOCS_L3__SHIFT 0
#define GEN7_MOCS_L3_UC 0x0
#define GEN7_MOCS_L3_WB 0x1
#define GEN8_MOCS_MT__MASK 0x00000060
#define GEN8_MOCS_MT__SHIFT 5
#define GEN8_MOCS_MT_PTE (0x0 << 5)
#define GEN8_MOCS_MT_UC (0x1 << 5)
#define GEN8_MOCS_MT_WT (0x2 << 5)
#define GEN8_MOCS_MT_WB (0x3 << 5)
#define GEN8_MOCS_CT__MASK 0x00000018
#define GEN8_MOCS_CT__SHIFT 3
#define GEN8_MOCS_CT_ELLC (0x0 << 3)
#define GEN8_MOCS_CT_LLC_ONLY (0x1 << 3)
#define GEN8_MOCS_CT_LLC (0x2 << 3)
#define GEN8_MOCS_CT_L3 (0x3 << 3)
#define GEN9_MOCS__MASK 0x0000007f
#define GEN9_MOCS__SHIFT 0
#define GEN9_MOCS_MT_WT_CT_L3 0x5
#define GEN9_MOCS_MT_WB_CT_L3 0x9
#define GEN6_SBA_ADDR__MASK 0xfffff000
#define GEN6_SBA_ADDR__SHIFT 12
#define GEN6_SBA_ADDR__SHR 12
#define GEN6_SBA_MOCS__MASK 0x00000f00
#define GEN6_SBA_MOCS__SHIFT 8
#define GEN8_SBA_MOCS__MASK 0x000007f0
#define GEN8_SBA_MOCS__SHIFT 4
#define GEN6_SBA_ADDR_MODIFIED (0x1 << 0)
#define GEN6_BINDING_TABLE_ADDR__MASK 0x0000ffe0
#define GEN6_BINDING_TABLE_ADDR__SHIFT 5
#define GEN6_BINDING_TABLE_ADDR__SHR 5
#define GEN6_STATE_BASE_ADDRESS__SIZE 19
#define GEN6_SBA_DW1_GENERAL_STATELESS_MOCS__MASK 0x000000f0
#define GEN6_SBA_DW1_GENERAL_STATELESS_MOCS__SHIFT 4
#define GEN6_SBA_DW1_GENERAL_STATELESS_FORCE_WRITE_THRU (0x1 << 3)
#define GEN8_SBA_DW3_STATELESS_MOCS__MASK 0x007f0000
#define GEN8_SBA_DW3_STATELESS_MOCS__SHIFT 16
#define GEN6_STATE_SIP__SIZE 3
#define GEN6_SIP_DW1_KERNEL_ADDR__MASK 0xfffffff0
#define GEN6_SIP_DW1_KERNEL_ADDR__SHIFT 4
#define GEN6_SIP_DW1_KERNEL_ADDR__SHR 4
#define GEN6_PIPELINE_SELECT__SIZE 1
#define GEN6_PIPELINE_SELECT_DW0_SELECT__MASK 0x00000003
#define GEN6_PIPELINE_SELECT_DW0_SELECT__SHIFT 0
#define GEN6_PIPELINE_SELECT_DW0_SELECT_3D 0x0
#define GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA 0x1
#define GEN7_PIPELINE_SELECT_DW0_SELECT_GPGPU 0x2
#define GEN9_PIPELINE_SELECT_DW0_SELECT__MASK 0x00000700
#define GEN9_PIPELINE_SELECT_DW0_SELECT__SHIFT 8
#define GEN9_PIPELINE_SELECT_DW0_SELECT_3D (0x3 << 8)
#define GEN6_PIPE_CONTROL__SIZE 6
#define GEN7_PIPE_CONTROL_USE_GGTT (0x1 << 24)
#define GEN7_PIPE_CONTROL_LRI_WRITE__MASK 0x00800000
#define GEN7_PIPE_CONTROL_LRI_WRITE__SHIFT 23
#define GEN7_PIPE_CONTROL_LRI_WRITE_NONE (0x0 << 23)
#define GEN7_PIPE_CONTROL_LRI_WRITE_IMM (0x1 << 23)
#define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_ENABLE (0x1 << 22)
#define GEN6_PIPE_CONTROL_STORE_DATA_INDEX (0x1 << 21)
#define GEN6_PIPE_CONTROL_CS_STALL (0x1 << 20)
#define GEN6_PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET (0x1 << 19)
#define GEN6_PIPE_CONTROL_TLB_INVALIDATE (0x1 << 18)
#define GEN6_PIPE_CONTROL_SYNC_GFDT_SURFACE (0x1 << 17)
#define GEN6_PIPE_CONTROL_GENERIC_MEDIA_STATE_CLEAR (0x1 << 16)
#define GEN6_PIPE_CONTROL_WRITE__MASK 0x0000c000
#define GEN6_PIPE_CONTROL_WRITE__SHIFT 14
#define GEN6_PIPE_CONTROL_WRITE_NONE (0x0 << 14)
#define GEN6_PIPE_CONTROL_WRITE_IMM (0x1 << 14)
#define GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT (0x2 << 14)
#define GEN6_PIPE_CONTROL_WRITE_TIMESTAMP (0x3 << 14)
#define GEN6_PIPE_CONTROL_DEPTH_STALL (0x1 << 13)
#define GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH (0x1 << 12)
#define GEN6_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (0x1 << 11)
#define GEN6_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (0x1 << 10)
#define GEN6_PIPE_CONTROL_INDIRECT_STATE_POINTERS_DISABLE (0x1 << 9)
#define GEN6_PIPE_CONTROL_NOTIFY_ENABLE (0x1 << 8)
#define GEN7_PIPE_CONTROL_WRITE_IMM_FLUSH (0x1 << 7)
#define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_APP_ID__MASK 0x00000040
#define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_APP_ID__SHIFT 6
#define GEN7_PIPE_CONTROL_DC_FLUSH (0x1 << 5)
#define GEN6_PIPE_CONTROL_VF_CACHE_INVALIDATE (0x1 << 4)
#define GEN6_PIPE_CONTROL_CONSTANT_CACHE_INVALIDATE (0x1 << 3)
#define GEN6_PIPE_CONTROL_STATE_CACHE_INVALIDATE (0x1 << 2)
#define GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL (0x1 << 1)
#define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH (0x1 << 0)
#define GEN6_PIPE_CONTROL_DW2_USE_GGTT (0x1 << 2)
#define GEN6_PIPE_CONTROL_DW2_ADDR__MASK 0xfffffff8
#define GEN6_PIPE_CONTROL_DW2_ADDR__SHIFT 3
#define GEN6_PIPE_CONTROL_DW2_ADDR__SHR 3
#define GEN7_PIPE_CONTROL_DW2_ADDR__MASK 0xfffffffc
#define GEN7_PIPE_CONTROL_DW2_ADDR__SHIFT 2
#define GEN7_PIPE_CONTROL_DW2_ADDR__SHR 2
#define GEN8_PIPE_CONTROL_DW2_ADDR__MASK 0xfffffffc
#define GEN8_PIPE_CONTROL_DW2_ADDR__SHIFT 2
#define GEN8_PIPE_CONTROL_DW2_ADDR__SHR 2
#endif /* GEN_RENDER_XML */