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  1. .. _screen:
  2.  
  3. Screen
  4. ======
  5.  
  6. A screen is an object representing the context-independent part of a device.
  7.  
  8. Flags and enumerations
  9. ----------------------
  10.  
  11. XXX some of these don't belong in this section.
  12.  
  13.  
  14. .. _pipe_cap:
  15.  
  16. PIPE_CAP_*
  17. ^^^^^^^^^^
  18.  
  19. Capability queries return information about the features and limits of the
  20. driver/GPU.  For floating-point values, use :ref:`get_paramf`, and for boolean
  21. or integer values, use :ref:`get_param`.
  22.  
  23. The integer capabilities:
  24.  
  25. * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
  26.   normalized coordinates, and mipmaps.
  27. * ``PIPE_CAP_TWO_SIDED_STENCIL``: Whether the stencil test can also affect back-facing
  28.   polygons.
  29. * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
  30.   :ref:`Blend` for more information.
  31. * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
  32. * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
  33. * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
  34.   bound.
  35. * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
  36. * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
  37. * ``PIPE_CAP_TEXTURE_SHADOW_MAP``: indicates whether the fragment shader hardware
  38.   can do the depth texture / Z comparison operation in TEX instructions
  39.   for shadow testing.
  40. * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
  41.   supported.
  42. * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
  43.   for a 2D texture.
  44. * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
  45.   for a 3D texture.
  46. * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
  47.   for a cubemap.
  48. * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates with clamp
  49.   are supported.
  50. * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
  51.   from color blend equations, in :ref:`Blend` state.
  52. * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
  53.   opcodes to the Shader Model 3 specification. XXX oh god this is horrible
  54. * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
  55. * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
  56. * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
  57.   masks are supported. If 0, then the first rendertarget's blend mask is
  58.   replicated across all MRTs.
  59. * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
  60.   available. If 0, then the first rendertarget's blend functions affect all
  61.   MRTs.
  62. * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
  63.   layers supported. If 0, the array textures are not supported at all and
  64.   the ARRAY texture targets are invalid.
  65. * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
  66.   FS_COORD_ORIGIN with value UPPER_LEFT is supported.
  67. * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
  68.   FS_COORD_ORIGIN with value LOWER_LEFT is supported.
  69. * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
  70.   property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
  71. * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
  72.   property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
  73. * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
  74.   depth clipping (through pipe_rasterizer_state)
  75. * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
  76.   written from a fragment shader.
  77. * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
  78.   in the vertex shader.
  79. * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
  80.   per-instance vertex attribs.
  81. * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
  82.   supported.  That is, is the pipe_rasterizer_state::clamp_fragment_color
  83.   flag supported by the driver?  If not, the state tracker will insert
  84.   clamping code into the fragment shaders when needed.
  85.  
  86. * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
  87.   supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
  88. * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
  89.   outputting unclamped vertex colors from a vertex shader. If unsupported,
  90.   the vertex colors are always clamped. This is the default for DX9 hardware.
  91. * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
  92.   clamping vertex colors when they come out of a vertex shader, as specified
  93.   by the pipe_rasterizer_state::clamp_vertex_color flag.  If unsupported,
  94.   the vertex colors are never clamped. This is the default for DX10 hardware.
  95.   If both clamped and unclamped CAPs are supported, the clamping can be
  96.   controlled through pipe_rasterizer_state.  If the driver cannot do vertex
  97.   color clamping, the state tracker may insert clamping code into the vertex
  98.   shader.
  99. * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
  100.   equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
  101. * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
  102.   the flatshade_first setting in ``pipe_rasterizer_state``.
  103. * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
  104.   buffers.  If not, the state tracker must upload all data which is not in hw
  105.   resources.  If user-space buffers are supported, the driver must also still
  106.   accept HW resource buffers.
  107. * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
  108.   limitation.  If true, pipe_vertex_buffer::buffer_offset must always be aligned
  109.   to 4.  If false, there are no restrictions on the offset.
  110. * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
  111.   limitation.  If true, pipe_vertex_buffer::stride must always be aligned to 4.
  112.   If false, there are no restrictions on the stride.
  113. * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
  114.   a hw limitation.  If true, pipe_vertex_element::src_offset must always be
  115.   aligned to 4.  If false, there are no restrictions on src_offset.
  116. * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
  117.   compute entry points defined in pipe_context and pipe_screen.
  118. * ``PIPE_CAP_USER_INDEX_BUFFERS``: Whether user index buffers are supported.
  119.   If not, the state tracker must upload all indices which are not in hw
  120.   resources.  If user-space buffers are supported, the driver must also still
  121.   accept HW resource buffers.
  122. * ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user-space constant buffers
  123.   are supported.  If not, the state tracker must put constants into HW
  124.   resources/buffers.  If user-space constant buffers are supported, the
  125.   driver must still accept HW constant buffers also.
  126. * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
  127.   alignment of pipe_constant_buffer::buffer_offset.
  128. * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
  129.   pipe_draw_info::start_instance.
  130. * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
  131.   the pipe_screen::get_timestamp hook are implemented.
  132. * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
  133.   for rendering are also supported for texturing.
  134. * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
  135.   expected for a pointer returned by transfer_map if the resource is
  136.   PIPE_BUFFER. In other words, the pointer returned by transfer_map is
  137.   always aligned to this value.
  138. * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
  139.   alignment for pipe_sampler_view::u.buf.first_element, in bytes.
  140.   If a driver does not support first/last_element, it should return 0.
  141. * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
  142.   If true, the hardware cannot replace arbitrary shader inputs with sprite
  143.   coordinates and hence the inputs that are desired to be replaceable must
  144.   be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
  145.   The rasterizer's sprite_coord_enable state therefore also applies to the
  146.   TEXCOORD semantic.
  147.   Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
  148.   input that will always be replaced with sprite coordinates.
  149. * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
  150.   to use a blit to implement a texture transfer which needs format conversions
  151.   and swizzling in state trackers. Generally, all hardware drivers with
  152.   dedicated memory should return 1 and all software rasterizers should return 0.
  153. * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
  154.   is supported.
  155. * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
  156.   considerations have to be given to the interaction between the border color
  157.   in the sampler object and the sampler view used with it.
  158.   If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
  159.   may be affected in undefined ways for any kind of permutational swizzle
  160.   (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
  161.   in the sampler view.
  162.   If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
  163.   state should be swizzled manually according to the swizzle in the sampler
  164.   view it is intended to be used with, or herein undefined results may occur
  165.   for permutational swizzles.
  166. * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
  167.   a buffer sampler view, in bytes.
  168. * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
  169.   since they are linked) a driver can support. Returning 0 is equivalent
  170.   to returning 1 because every driver has to support at least a single
  171.   viewport/scissor combination.
  172. * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device.  Either
  173.   PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
  174. * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
  175.   different sizes for fb color/zs attachments. This controls whether
  176.   ARB_framebuffer_object is provided.
  177. * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
  178.   ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
  179.   outputs. Note that the viewport will only be used if multiple viewports are
  180.   exposed.
  181. * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
  182.   output by a single invocation of a geometry shader.
  183. * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
  184.   vertex components output by a single invocation of a geometry shader.
  185.   This is the product of the number of attribute components per vertex and
  186.   the number of output vertices.
  187. * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
  188.   in format that texture gather can operate on. 1 == RED, ALPHA etc,
  189.   4 == All formats.
  190. * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
  191.   hardware implements the SM5 features, component selection,
  192.   shadow comparison, and run-time offsets.
  193. * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
  194.   PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
  195.   for buffers.
  196. * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
  197.   supported.
  198. * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
  199.   in conjunction with a texture gather opcode.
  200. * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
  201.   in conjunction with a texture gather opcode.
  202. * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
  203.   shading. The context->set_min_samples function will be expected to be
  204.   implemented.
  205. * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
  206.   accept 4 offsets.
  207. * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
  208.   TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
  209.   and viewport transformation.
  210. * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
  211.   supported by the geometry shader. If stream-out is supported, this should be
  212.   at least 1. If stream-out is not supported, this should be 0.
  213. * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
  214.   { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
  215.   See pipe_draw_info.
  216. * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
  217.   the FINE versions of DDX/DDY.
  218. * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
  219.   not available one should return 0xFFFFFFFF.
  220. * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
  221.   0xFFFFFFFF if not available.
  222. * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
  223. * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
  224. * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
  225.   memory and GART.
  226. * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
  227.   condition for conditional rendering.
  228. * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
  229. * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
  230.   different than the underlying resource's, as permitted by
  231.   ARB_texture_view. For example a 2d array texture may be reinterpreted as a
  232.   cube (array) texture and vice-versa.
  233. * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
  234.   pipe_rasterizer_state::clip_halfz being set to true. This is required
  235.   for enabling ARB_clip_control.
  236. * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
  237.   TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
  238.   state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
  239.   will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
  240.   and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
  241.   semantics. Only relevant if geometry shaders are supported.
  242.   (Currently not possible to query availability of these two semantics outside
  243.   this, at least BASEVERTEX should be exposed separately too).
  244. * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
  245.   for ``pipe_rasterizer_state::offset_clamp``.
  246. * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
  247.   a multisampled depth buffer into a single-sampled texture (or depth buffer).
  248.   Only the first sampled should be copied.
  249. * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
  250.   a pipe_resource where an already-existing piece of (malloc'd) user memory
  251.   is used as its backing storage. In other words, whether the driver can map
  252.   existing user memory into the device address space for direct device access.
  253.   The create function is pipe_screen::resource_from_user_memory. The address
  254.   and size must be page-aligned.
  255. * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
  256.   Whether pipe_context::get_device_reset_status is implemented.
  257.  
  258.  
  259. .. _pipe_capf:
  260.  
  261. PIPE_CAPF_*
  262. ^^^^^^^^^^^^^^^^
  263.  
  264. The floating-point capabilities are:
  265.  
  266. * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
  267. * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
  268. * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
  269. * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
  270. * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
  271.   applied to anisotropically filtered textures.
  272. * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
  273.   to filtered textures.
  274. * ``PIPE_CAPF_GUARD_BAND_LEFT``,
  275.   ``PIPE_CAPF_GUARD_BAND_TOP``,
  276.   ``PIPE_CAPF_GUARD_BAND_RIGHT``,
  277.   ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
  278.  
  279.  
  280. .. _pipe_shader_cap:
  281.  
  282. PIPE_SHADER_CAP_*
  283. ^^^^^^^^^^^^^^^^^
  284.  
  285. These are per-shader-stage capabitity queries. Different shader stages may
  286. support different features.
  287.  
  288. * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
  289. * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
  290. * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
  291. * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
  292. * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
  293. * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
  294. * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
  295.   This is valid for all shaders except the fragment shader.
  296. * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
  297. * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
  298.   to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
  299.   only permit binding one constant buffer per shader, and the shaders will
  300.   not permit two-dimensional access to constants.
  301.  
  302. If a value greater than 0 is returned, the driver can have multiple
  303. constant buffers bound to shader stages. The CONST register file can
  304. be accessed with two-dimensional indices, like in the example below.
  305.  
  306. DCL CONST[0][0..7]       # declare first 8 vectors of constbuf 0
  307. DCL CONST[3][0]          # declare first vector of constbuf 3
  308. MOV OUT[0], CONST[0][3]  # copy vector 3 of constbuf 0
  309.  
  310. For backwards compatibility, one-dimensional access to CONST register
  311. file is still supported. In that case, the constbuf index is assumed
  312. to be 0.
  313.  
  314. * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
  315. * ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers.
  316. * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
  317. * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
  318.   of the input file is supported.
  319. * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
  320.   of the output file is supported.
  321. * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
  322.   of the temporary file is supported.
  323. * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
  324.   of the constant file is supported.
  325. * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
  326.   BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
  327. * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
  328.   If unsupported, only float opcodes are supported.
  329. * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
  330.   samplers.
  331. * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
  332.   program.  It should be one of the ``pipe_shader_ir`` enum values.
  333. * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
  334.   sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
  335. * ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point
  336.   operations are supported.
  337. * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
  338.   is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
  339. * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
  340.   DLDEXP are supported.
  341. * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
  342.   are supported.
  343.  
  344.  
  345. .. _pipe_compute_cap:
  346.  
  347. PIPE_COMPUTE_CAP_*
  348. ^^^^^^^^^^^^^^^^^^
  349.  
  350. Compute-specific capabilities. They can be queried using
  351. pipe_screen::get_compute_param.
  352.  
  353. * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
  354.   ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
  355.   This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM
  356.   or PIPE_SHADER_IR_NATIVE for their preferred IR.
  357.   Value type: null-terminated string.
  358. * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
  359.   for grid and block coordinates.  Value type: ``uint64_t``.
  360. * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
  361.   units.  Value type: ``uint64_t []``.
  362. * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
  363.   units.  Value type: ``uint64_t []``.
  364. * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
  365.   a single block can contain.  Value type: ``uint64_t``.
  366.   This may be less than the product of the components of MAX_BLOCK_SIZE and is
  367.   usually limited by the number of threads that can be resident simultaneously
  368.   on a compute unit.
  369. * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
  370.   resource.  Value type: ``uint64_t``.
  371. * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
  372.   resource.  Value type: ``uint64_t``.
  373. * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
  374.   resource.  Value type: ``uint64_t``.
  375. * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
  376.   resource.  Value type: ``uint64_t``.
  377. * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
  378.   allocation in bytes.  Value type: ``uint64_t``.
  379. * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
  380.   clock in MHz. Value type: ``uint32_t``
  381. * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
  382.   Value type: ``uint32_t``
  383. * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
  384.   non-zero means yes, zero means no. Value type: ``uint32_t``
  385.  
  386. .. _pipe_bind:
  387.  
  388. PIPE_BIND_*
  389. ^^^^^^^^^^^
  390.  
  391. These flags indicate how a resource will be used and are specified at resource
  392. creation time. Resources may be used in different roles
  393. during their lifecycle. Bind flags are cumulative and may be combined to create
  394. a resource which can be used for multiple things.
  395. Depending on the pipe driver's memory management and these bind flags,
  396. resources might be created and handled quite differently.
  397.  
  398. * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
  399.   rendered to.  Any surface/resource attached to pipe_framebuffer_state::cbufs
  400.   must have this flag set.
  401. * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
  402.   depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
  403.   have this flag set.
  404. * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
  405.   query whether a device supports blending for a given format.
  406.   If this flag is set, surface creation may fail if blending is not supported
  407.   for the specified format. If it is not set, a driver may choose to ignore
  408.   blending on surfaces with formats that would require emulation.
  409. * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
  410.   pipe_screen::flush_front_buffer must have this flag set.
  411. * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
  412.   or vertex shader.
  413. * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
  414. * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
  415. * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
  416. * ``PIPE_BIND_TRANSFER_WRITE``: A transfer object which will be written to.
  417. * ``PIPE_BIND_TRANSFER_READ``: A transfer object which will be read from.
  418. * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
  419. * ``PIPE_BIND_CUSTOM``:
  420. * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
  421. * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
  422.   process.
  423. * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
  424.   address space of a compute program.
  425. * ``PIPE_BIND_SHADER_RESOURCE``: A buffer or texture that can be
  426.   bound to the graphics pipeline as a shader resource.
  427. * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
  428.   bound to the compute program as a shader resource.
  429. * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
  430.   GPU command processor. It can contain, for example, the arguments to
  431.   indirect draw calls.
  432.  
  433. .. _pipe_usage:
  434.  
  435. PIPE_USAGE_*
  436. ^^^^^^^^^^^^
  437.  
  438. The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
  439. Note that drivers must always support read and write CPU access at any time
  440. no matter which hint they got.
  441.  
  442. * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
  443. * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
  444.   not expected to be mapped or changed (even by the GPU) after the first upload.
  445. * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
  446.   uploaded is expected to be used at least several times by the GPU.
  447. * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
  448.   uploaded is expected to be used only once by the GPU.
  449. * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
  450.  
  451.  
  452. Methods
  453. -------
  454.  
  455. XXX to-do
  456.  
  457. get_name
  458. ^^^^^^^^
  459.  
  460. Returns an identifying name for the screen.
  461.  
  462. get_vendor
  463. ^^^^^^^^^^
  464.  
  465. Returns the screen vendor.
  466.  
  467. get_device_vendor
  468. ^^^^^^^^^^^^^^^^^
  469.  
  470. Returns the actual vendor of the device driving the screen
  471. (as opposed to the driver vendor).
  472.  
  473. .. _get_param:
  474.  
  475. get_param
  476. ^^^^^^^^^
  477.  
  478. Get an integer/boolean screen parameter.
  479.  
  480. **param** is one of the :ref:`PIPE_CAP` names.
  481.  
  482. .. _get_paramf:
  483.  
  484. get_paramf
  485. ^^^^^^^^^^
  486.  
  487. Get a floating-point screen parameter.
  488.  
  489. **param** is one of the :ref:`PIPE_CAP` names.
  490.  
  491. context_create
  492. ^^^^^^^^^^^^^^
  493.  
  494. Create a pipe_context.
  495.  
  496. **priv** is private data of the caller, which may be put to various
  497. unspecified uses, typically to do with implementing swapbuffers
  498. and/or front-buffer rendering.
  499.  
  500. is_format_supported
  501. ^^^^^^^^^^^^^^^^^^^
  502.  
  503. Determine if a resource in the given format can be used in a specific manner.
  504.  
  505. **format** the resource format
  506.  
  507. **target** one of the PIPE_TEXTURE_x flags
  508.  
  509. **sample_count** the number of samples. 0 and 1 mean no multisampling,
  510. the maximum allowed legal value is 32.
  511.  
  512. **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
  513.  
  514. **geom_flags** is a bitmask of PIPE_TEXTURE_GEOM_x flags.
  515.  
  516. Returns TRUE if all usages can be satisfied.
  517.  
  518.  
  519. can_create_resource
  520. ^^^^^^^^^^^^^^^^^^^
  521.  
  522. Check if a resource can actually be created (but don't actually allocate any
  523. memory).  This is used to implement OpenGL's proxy textures.  Typically, a
  524. driver will simply check if the total size of the given resource is less than
  525. some limit.
  526.  
  527. For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
  528.  
  529.  
  530. .. _resource_create:
  531.  
  532. resource_create
  533. ^^^^^^^^^^^^^^^
  534.  
  535. Create a new resource from a template.
  536. The following fields of the pipe_resource must be specified in the template:
  537.  
  538. **target** one of the pipe_texture_target enums.
  539. Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
  540. Modern APIs allow using buffers as shader resources.
  541.  
  542. **format** one of the pipe_format enums.
  543.  
  544. **width0** the width of the base mip level of the texture or size of the buffer.
  545.  
  546. **height0** the height of the base mip level of the texture
  547. (1 for 1D or 1D array textures).
  548.  
  549. **depth0** the depth of the base mip level of the texture
  550. (1 for everything else).
  551.  
  552. **array_size** the array size for 1D and 2D array textures.
  553. For cube maps this must be 6, for other textures 1.
  554.  
  555. **last_level** the last mip map level present.
  556.  
  557. **nr_samples** the nr of msaa samples. 0 (or 1) specifies a resource
  558. which isn't multisampled.
  559.  
  560. **usage** one of the PIPE_USAGE flags.
  561.  
  562. **bind** bitmask of the PIPE_BIND flags.
  563.  
  564. **flags** bitmask of PIPE_RESOURCE_FLAG flags.
  565.  
  566.  
  567.  
  568. resource_destroy
  569. ^^^^^^^^^^^^^^^^
  570.  
  571. Destroy a resource. A resource is destroyed if it has no more references.
  572.  
  573.  
  574.  
  575. get_timestamp
  576. ^^^^^^^^^^^^^
  577.  
  578. Query a timestamp in nanoseconds. The returned value should match
  579. PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
  580. wait for rendering to complete (which cannot be achieved with queries).
  581.  
  582.  
  583.  
  584. get_driver_query_info
  585. ^^^^^^^^^^^^^^^^^^^^^
  586.  
  587. Return a driver-specific query. If the **info** parameter is NULL,
  588. the number of available queries is returned.  Otherwise, the driver
  589. query at the specified **index** is returned in **info**.
  590. The function returns non-zero on success.
  591. The driver-specific query is described with the pipe_driver_query_info
  592. structure.
  593.  
  594. get_driver_query_group_info
  595. ^^^^^^^^^^^^^^^^^^^^^^^^^^^
  596.  
  597. Return a driver-specific query group. If the **info** parameter is NULL,
  598. the number of available groups is returned.  Otherwise, the driver
  599. query group at the specified **index** is returned in **info**.
  600. The function returns non-zero on success.
  601. The driver-specific query group is described with the
  602. pipe_driver_query_group_info structure.
  603.