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  1. #ifndef _CPU_H_
  2. #define _CPU_H_
  3.  
  4.  
  5. //#define ARM_V6                //define to allow v6 instructions
  6. //#define THUMB_2                       //define to allow Thumb2
  7.  
  8. #include "types.h"
  9.  
  10. struct ArmCpu;
  11.  
  12. #define ARM_SR_N                0x80000000UL
  13. #define ARM_SR_Z                0x40000000UL
  14. #define ARM_SR_C                0x20000000UL
  15. #define ARM_SR_V                0x10000000UL
  16. #define ARM_SR_Q                0x08000000UL
  17. #ifdef ARM_V6   //V6KT2, but without T2 to be exact (we implement things like MLS, but not Thumb2 or ThumbEE)
  18.         #define ARM_SR_J        0x01000000UL
  19.         #define ARM_SR_E        0x00000200UL
  20.         #define ARM_SR_A        0x00000100UL
  21.         #define ARM_SR_GE_0     0x00010000UL
  22.         #define ARM_SR_GE_1     0x00020000UL
  23.         #define ARM_SR_GE_2     0x00040000UL
  24.         #define ARM_SR_GE_3     0x00080000UL
  25.         #define ARM_SR_GE_MASK  0x000F0000UL
  26.         #define ARM_SR_GE_SHIFT 16
  27. #endif
  28. #define ARM_SR_I                0x00000080UL
  29. #define ARM_SR_F                0x00000040UL
  30. #define ARM_SR_T                0x00000020UL
  31. #define ARM_SR_M                0x0000001FUL
  32.  
  33. #define ARM_SR_MODE_USR         0x00000010UL
  34. #define ARM_SR_MODE_FIQ         0x00000011UL
  35. #define ARM_SR_MODE_IRQ         0x00000012UL
  36. #define ARM_SR_MODE_SVC         0x00000013UL
  37. #define ARM_SR_MODE_ABT         0x00000017UL
  38. #define ARM_SR_MODE_UND         0x0000001BUL
  39. #define ARM_SR_MODE_SYS         0x0000001FUL
  40.  
  41. #define ARV_VECTOR_OFFT_RST     0x00000000UL
  42. #define ARM_VECTOR_OFFT_UND     0x00000004UL
  43. #define ARM_VECTOR_OFFT_SWI     0x00000008UL
  44. #define ARM_VECTOR_OFFT_P_ABT   0x0000000CUL
  45. #define ARM_VECTOR_OFFT_D_ABT   0x00000010UL
  46. #define ARM_VECTOR_OFFT_UNUSED  0x00000014UL
  47. #define ARM_VECTOR_OFFT_IRQ     0x00000018UL
  48. #define ARM_VECTOR_OFFT_FIQ     0x0000001CUL
  49.  
  50. #define HYPERCALL_ARM           0xF7BBBBBBUL
  51. #define HYPERCALL_THUMB         0xBBBBUL
  52.  
  53. //the following are for cpuGetRegExternal() and are generally used for debugging purposes
  54. #define ARM_REG_NUM_CPSR        16
  55. #define ARM_REG_NUM_SPSR        17
  56.  
  57. struct ArmCpu;
  58.  
  59. typedef Boolean (*ArmCoprocRegXferF)    (struct ArmCpu* cpu, void* userData, Boolean two/* MCR2/MRC2 ? */, Boolean MRC, UInt8 op1, UInt8 Rx, UInt8 CRn, UInt8 CRm, UInt8 op2);
  60. typedef Boolean (*ArmCoprocDatProcF)    (struct ArmCpu* cpu, void* userData, Boolean two/* CDP2 ? */, UInt8 op1, UInt8 CRd, UInt8 CRn, UInt8 CRm, UInt8 op2);
  61. typedef Boolean (*ArmCoprocMemAccsF)    (struct ArmCpu* cpu, void* userData, Boolean two /* LDC2/STC2 ? */, Boolean N, Boolean store, UInt8 CRd, UInt32 addr, UInt8* option /* NULL if none */);
  62. typedef Boolean (*ArmCoprocTwoRegF)     (struct ArmCpu* cpu, void* userData, Boolean MRRC, UInt8 op, UInt8 Rd, UInt8 Rn, UInt8 CRm);
  63.  
  64. typedef Boolean (*ArmCpuMemF)           (struct ArmCpu* cpu, void* buf, UInt32 vaddr, UInt8 size, Boolean write, Boolean priviledged, UInt8* fsr);      //read/write
  65. typedef Boolean (*ArmCpuHypercall)      (struct ArmCpu* cpu);           //return true if handled
  66. typedef void    (*ArmCpuEmulErr)        (struct ArmCpu* cpu, const char* err_str);
  67.  
  68. typedef void    (*ArmSetFaultAdrF)      (struct ArmCpu* cpu, UInt32 adr, UInt8 faultStatus);
  69.  
  70. #include "icache.h"
  71.  
  72.  
  73. /*
  74.  
  75.         coprocessors:
  76.                                
  77.                                 0    - DSP (pxa only)
  78.                                 0, 1 - WMMX (pxa only)
  79.                                 11   - VFP (arm standard)
  80.                                 15   - system control (arm standard)
  81. */
  82.  
  83.  
  84. typedef struct{
  85.        
  86.         ArmCoprocRegXferF regXfer;
  87.         ArmCoprocDatProcF dataProcessing;
  88.         ArmCoprocMemAccsF memAccess;
  89.         ArmCoprocTwoRegF  twoRegF;
  90.         void* userData;
  91.        
  92. }ArmCoprocessor;
  93.  
  94. typedef struct{
  95.  
  96.         UInt32 R13, R14;
  97.         UInt32 SPSR;                    //usr mode doesn't have an SPSR
  98. }ArmBankedRegs;
  99.  
  100.  
  101.  
  102.  
  103.  
  104.  
  105.  
  106.  
  107. typedef struct ArmCpu{
  108.  
  109.         UInt32          regs[16];               //current active regs as per current mode
  110.         UInt32          CPSR, SPSR;
  111.  
  112.         ArmBankedRegs   bank_usr;               //usr regs when in another mode
  113.         ArmBankedRegs   bank_svc;               //svc regs when in another mode
  114.         ArmBankedRegs   bank_abt;               //abt regs when in another mode
  115.         ArmBankedRegs   bank_und;               //und regs when in another mode
  116.         ArmBankedRegs   bank_irq;               //irq regs when in another mode
  117.         ArmBankedRegs   bank_fiq;               //fiq regs when in another mode
  118.         UInt32          extra_regs[5];          //fiq regs when not in fiq mode, usr regs when in fiq mode. R8-12
  119.  
  120.         UInt16          waitingIrqs;
  121.         UInt16          waitingFiqs;
  122.         UInt16          CPAR;
  123.  
  124.         ArmCoprocessor  coproc[16];             //coprocessors
  125.  
  126.         // various other cpu config options
  127.         UInt32          vectorBase;             //address of vector base
  128.  
  129. #ifdef ARM_V6
  130.  
  131.         Boolean         EEE;                    //endianness one exception entry
  132.         Boolean         impreciseAbtWaiting;
  133. #endif
  134.  
  135.         ArmCpuMemF      memF;
  136.         ArmCpuEmulErr   emulErrF;
  137.         ArmCpuHypercall hypercallF;
  138.         ArmSetFaultAdrF setFaultAdrF;
  139.        
  140.         icache          ic;
  141.  
  142.         void*           userData;               //shared by all callbacks
  143. }ArmCpu;
  144.  
  145.  
  146. Err cpuInit(ArmCpu* cpu, UInt32 pc, ArmCpuMemF memF, ArmCpuEmulErr emulErrF, ArmCpuHypercall hypercallF, ArmSetFaultAdrF setFaultAdrF);
  147. Err cpuDeinit(ArmCpu* cp);
  148. void cpuCycle(ArmCpu* cpu);
  149. void cpuIrq(ArmCpu* cpu, Boolean fiq, Boolean raise);   //unraise when acknowledged
  150.  
  151. #ifdef ARM_V6
  152.  
  153.         void cpuSignalImpreciseAbt(ArmCpu* cpu, Boolean raise);
  154.        
  155. #endif
  156.  
  157. UInt32 cpuGetRegExternal(ArmCpu* cpu, UInt8 reg);
  158. void cpuSetReg(ArmCpu* cpu, UInt8 reg, UInt32 val);
  159.  
  160. void cpuCoprocessorRegister(ArmCpu* cpu, UInt8 cpNum, ArmCoprocessor* coproc);
  161. void cpuCoprocessorUnregister(ArmCpu* cpu, UInt8 cpNum);
  162.  
  163. void cpuSetVectorAddr(ArmCpu* cpu, UInt32 adr);
  164.  
  165. UInt16 cpuGetCPAR(ArmCpu* cpu);
  166. void cpuSetCPAR(ArmCpu* cpu, UInt16 cpar);
  167.  
  168. void cpuIcacheInval(ArmCpu* cpu);
  169. void cpuIcacheInvalAddr(ArmCpu* cpu, UInt32 addr);
  170.  
  171.  
  172. #endif
  173.  
  174.