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  1. /*
  2.  * All Video Processing kernels
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40.  
  41.  
  42. .declare SRC_B          Base=REG(r,10)  ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw
  43. .declare SRC_G          Base=REG(r,18)  ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw
  44. .declare SRC_R          Base=REG(r,26)  ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw
  45. .declare SRC_A          Base=REG(r,34)  ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw
  46.  
  47. #define DEST_ARGB               ubBOT_ARGB
  48.  
  49. #undef  nSRC_REGION
  50. #define nSRC_REGION             nREGION_2
  51.  
  52.  
  53. //Pack directly to mrf as optimization - vK
  54.  
  55. $for(0, 0; <8; 1, 2) {
  56. //      mov     (16)    DEST_ARGB(%2,0)<4>              SRC_B(%1)                                       { Compr, NoDDClr }                      // 16 B
  57. //      mov     (16)    DEST_ARGB(%2,1)<4>              SRC_G(%1)                                       { Compr, NoDDClr, NoDDChk }     // 16 G
  58. //      mov     (16)    DEST_ARGB(%2,2)<4>              SRC_R(%1)                                       { Compr, NoDDClr, NoDDChk }     // 16 R //these 2 inst can be merged - vK
  59. //      mov     (16)    DEST_ARGB(%2,3)<4>              SRC_A(%1)                                       { Compr, NoDDChk }                      //DEST_RGB_FORMAT<0;1,0>:ub     { Compr, NoDDChk }                      // 16 A
  60.  
  61.         mov     (8)     DEST_ARGB(%2,  0)<4>            SRC_B(%1)                                       { NoDDClr }                             // 8 B
  62.         mov     (8)     DEST_ARGB(%2,  1)<4>            SRC_G(%1)                                       { NoDDClr, NoDDChk }    // 8 G
  63.         mov     (8)     DEST_ARGB(%2,  2)<4>            SRC_R(%1)                                       { NoDDClr, NoDDChk }    // 8 R
  64.         mov     (8)     DEST_ARGB(%2,  3)<4>            SRC_A(%1)                                       { NoDDChk }                             // 8 A
  65.  
  66.         mov     (8)     DEST_ARGB(%2+1,0)<4>            SRC_B(%1,8)                             { NoDDClr }                             // 8 B
  67.         mov     (8)     DEST_ARGB(%2+1,1)<4>            SRC_G(%1,8)                                     { NoDDClr, NoDDChk }    // 8 G
  68.         mov     (8)     DEST_ARGB(%2+1,2)<4>            SRC_R(%1,8)                                     { NoDDClr, NoDDChk }    // 8 R
  69.         mov     (8)     DEST_ARGB(%2+1,3)<4>            SRC_A(%1,8)                                     { NoDDChk }                             // 8 A
  70. }
  71.