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  1. /*
  2.  * Copyright © <2010>, Intel Corporation.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * This file was originally licensed under the following license
  25.  *
  26.  *  Licensed under the Apache License, Version 2.0 (the "License");
  27.  *  you may not use this file except in compliance with the License.
  28.  *  You may obtain a copy of the License at
  29.  *
  30.  *      http://www.apache.org/licenses/LICENSE-2.0
  31.  *
  32.  *  Unless required by applicable law or agreed to in writing, software
  33.  *  distributed under the License is distributed on an "AS IS" BASIS,
  34.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  35.  *  See the License for the specific language governing permissions and
  36.  *  limitations under the License.
  37.  *
  38.  */
  39. //////////////////////////////////////////////////////////////////////////////////////////////////////////////
  40. // AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB Y comp)
  41. //
  42. // First, de-block vertical edges from left to right.
  43. // Second, de-block horizontal edge from top to bottom.
  44. //
  45. //      ***** MBAFF Mode *****
  46. //      This version deblocks top MB first, followed by bottom MB.
  47. //
  48. //      Need variable CurMB     to indicate top MB or bottom MB (CurMB = 0 or 1).  
  49. //      We can use BotFieldFlag in BitFields to represent it.
  50. //
  51. //  Usage:
  52. //      1) Access control data for top
  53. //              CntrlDataOffsetY + CurMB  * Control data block size             (64 DWs for CL, 16 DWs for BLC)
  54. //
  55. //      2) Load frame/field video data based on flags: FieldModeCurrentMbFlag, FieldModeLeftMbFlag, FieldModeaboveMbFlag,
  56. //
  57. //      E.g.
  58. //      if (pCntlData->BitField & FieldModeCurrentMbFlag)
  59. //              cur_y = ORIX_CUR.y + CurMB * 1;                         // Add field vertical offset for bot field MB .
  60. //      else
  61. //              cur_y = ORIX_CUR.y + CurMB * MB_Rows_Y;         // Add bottom MB vertical offset for bot MB
  62. //
  63. //
  64. //////////////////////////////////////////////////////////////////////////////////////////////////////////////
  65. #define AVC_ILDB
  66.  
  67. .kernel AVC_ILDB_CHILD_MBAFF_Y
  68. #if defined(COMBINED_KERNEL)
  69. ILDB_LABEL(AVC_ILDB_CHILD_Y):
  70. #endif
  71.  
  72. #include "SetupVPKernel.asm"
  73. #include "AVC_ILDB.inc"
  74.  
  75. #if defined(_DEBUG)
  76.         mov             (1)             EntrySignatureC:w                       0xE998:w
  77. #endif
  78.  
  79.         // Setup temp buf used by load and save code
  80.         #define BUF_B           RTempB                         
  81.         #define BUF_D           RTempD
  82.        
  83.         // Init local variables
  84.         // These coordinates are in progressive fashion
  85.         mul (4)         ORIX_CUR<2>:w           ORIX<0;1,0>:w           16:w    { NoDDClr }             // Expand X addr to bytes, repeat 4 times
  86.         mul (4)         ORIY_CUR<2>:w           ORIY<0;1,0>:w           32:w    { NoDDChk }             // Expand Y addr to bytes, repeat 4 times
  87.  
  88.         mov (2)         f0.0<1>:w               0:w
  89.        
  90.         mov     (1)             GateWayOffsetC:uw       ORIY:uw                                         // Use row # as Gateway offset
  91.  
  92.         //=== Null Kernel ===============================================================
  93. //      jmpi POST_ILDB
  94.         //===============================================================================
  95.  
  96.         //====================================================================================
  97.         // Assuming the MB control data is laid out in scan line order in a rectangle with width = 16 bytes.
  98.         // Control data has dimension of X x Y = 16 x N bytes, where N = W x H / 16
  99.         // Each MB has 256 bytes of control data
  100.  
  101.         // For CRESTLINE, 256 bytes are stored in memory and fetched into GRF.
  102.         // MB_offset = MBsCntX * CurRow + CurCol
  103.         // Byte_offset = MB_offset * (256 << Mbaff_flag),       Mbaff_flag = 0 or 1.
  104.         // Base address of a control data block = (x, y) = (0, y'=y/x), region width is 16 bytes
  105.         // where y' = Byte_offset / 16 = MB_offset * (16 << Mbaff_flag)
  106.         // MBCntrlDataOffsetY holds y'.
  107.  
  108.         // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes.  Need to use a special read command on BL-C.
  109.         // MB_offset = MBsCntX * CurRow + CurCol
  110.         // Byte_offset = MB_offset * (64 << Mbaff_flag),        Mbaff_flag = 0 or 1.
  111.         // MBCntrlDataOffsetY holds globel byte offset.
  112.  
  113. #if !defined(DEV_CL)   
  114.         mul (1) CntrlDataOffsetY:ud             MBsCntX:w                               ORIY:w
  115.         add (1) CntrlDataOffsetY:ud             CntrlDataOffsetY:ud             ORIX:w
  116.         mul (1) CntrlDataOffsetY:ud             CntrlDataOffsetY:ud             128:uw
  117. #endif
  118.  
  119.         //====================================================================================
  120.        
  121.         add (1)         ORIX_LEFT:w                     ORIX_LEFT:w                     -4:w
  122.         add (1)         ORIY_TOP:w                      ORIY_TOP:w                      -4:w
  123.  
  124.  
  125.         //=========== Process Top MB ============
  126.     and (1)     BitFields:w             BitFields:w             TopFieldFlag:w  // Reset BotFieldFlag
  127.  
  128. RE_ENTRY:       // for bootom field
  129.  
  130.         // Load current MB control data
  131. #if defined(DEV_CL)
  132.         #include "Load_ILDB_Cntrl_Data_64DW.asm"        // Crestline
  133. #else
  134.         #include "Load_ILDB_Cntrl_Data_16DW.asm"        // Cantiga and beyond
  135. #endif
  136.  
  137.         // Init addr register for vertical control data
  138.         mov (1)         ECM_AddrReg<1>:w        CNTRL_DATA_BASE:w                       // Init edge control map AddrReg
  139.  
  140.         // Check loaded control data
  141.         and.z.f0.1  (16) null<1>:uw     r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw    0xFFFF:uw               // Skip ILDB?          
  142.         and.nz.f0.0  (1) null:w         r[ECM_AddrReg, ExtBitFlags]:ub          DISABLE_ILDB_FLAG:w             // Skip ILDB?
  143.  
  144.         // Use free cycles here
  145.         // Set DualFieldMode for all data read, write and deblocking
  146.         and     (1)     CTemp1_W:uw             r[ECM_AddrReg, BitFlags]:ub             FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
  147.  
  148.         // Get Vert Edge Pattern (frame vs. field MBs)
  149.         and     (1)     VertEdgePattern:uw              r[ECM_AddrReg, BitFlags]:ub             FieldModeLeftMbFlag+FieldModeCurrentMbFlag:uw
  150.  
  151.         (f0.1.all16h)   jmpi    SKIP_ILDB                                               // Skip ILDB
  152.         (f0.0)                  jmpi    SKIP_ILDB                                               // Skip ILDB
  153.  
  154.         // Set DualFieldMode for all data read, write and deblocking
  155. //      and     (1)     CTemp1_W:uw             r[ECM_AddrReg, BitFlags]:ub             FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
  156.         cmp.z.f0.0      (1)     null:w  CTemp1_W:uw             ABOVE_FIELD_CUR_FRAME:w
  157.         and (1)         DualFieldMode:w         f0.0:w          0x0001:w
  158.  
  159.         // Load current MB                              // DDD1
  160.         #include "load_Cur_Y_16x16T_Mbaff.asm"                          // Load cur Y, 16x16, transpose
  161.         #include "load_Left_Y_4x16T_Mbaff.asm"                          // Load left MB (4x16) Y data from memory if exists
  162.  
  163.         #include "Transpose_Cur_Y_16x16.asm"
  164.         #include "Transpose_Left_Y_4x16.asm"
  165.  
  166.         //---------- Perform vertical ILDB filting on Y----------
  167.         #include "AVC_ILDB_Filter_Mbaff_Y_v.asm"       
  168.         //-------------------------------------------------------
  169.  
  170.         #include "save_Left_Y_16x4T_Mbaff.asm"                          // Write left MB (4x16) Y data to memory if exists
  171.         #include "load_Top_Y_16x4_Mbaff.asm"                            // Load top MB (16x4) Y data from memory if exists
  172.         #include "Transpose_Cur_Y_16x16.asm"                            // Transpose a MB for horizontal edge de-blocking
  173.  
  174.         //---------- Perform horizontal ILDB filting on Y ----------
  175.         #include "AVC_ILDB_Filter_Mbaff_Y_h.asm"       
  176.         //----------------------------------------------------------
  177.  
  178.         #include "save_Cur_Y_16x16_Mbaff.asm"                                   // Write cur MB (16x16)
  179.         #include "save_Top_Y_16x4_Mbaff.asm"                                    // Write top MB (16x4) if not the top row
  180.  
  181. SKIP_ILDB:
  182.         //----------------------------------------------------------
  183.         and.z.f0.0 (1)  null:w          BitFields:w             BotFieldFlag:w
  184.  
  185.         //=========== Process Bottom MB ============
  186.     or (1)      BitFields:w     BitFields:w             BotFieldFlag:w  // Set BotFieldFlag to 1
  187.         (f0.0) jmpi             RE_ENTRY                                                                // Loop back for bottom deblocking
  188.  
  189.         // Fall through to finish
  190.  
  191.         //=========== Check write commit of the last write ============
  192.     mov (8)     WritebackResponse(0)<1>         WritebackResponse(0)   
  193.  
  194. POST_ILDB:
  195.        
  196.         //---------------------------------------------------------------------------
  197.         // Send notification thru Gateway to root thread, update luma Status[CurRow]
  198.        
  199.         #include "AVC_ILDB_ForwardMsg.asm"     
  200.  
  201. #if !defined(GW_DCN)            // For non-ILK chipsets
  202.         //child send EOT : Request type = 1
  203.         END_CHILD_THREAD
  204. #endif  // !defined(DEV_ILK)
  205.        
  206.         // The thread finishs here
  207.         //------------------------------------------------------------------------------
  208.        
  209.        
  210.         ////////////////////////////////////////////////////////////////////////////////
  211.         // Include other subrutines being called
  212.         #include "AVC_ILDB_Luma_Core_Mbaff.asm"
  213.  
  214. #if !defined(COMBINED_KERNEL)           // For standalone kernel only
  215. .end_code
  216.  
  217. .end_kernel
  218. #endif
  219.