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  1. /*
  2.  * Copyright © 2014 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *    Xiang Haihao <haihao.xiang@intel.com>
  26.  *
  27.  */
  28.  
  29. #include "sysdeps.h"
  30.  
  31. #include <va/va.h>
  32. #include <va/va_dec_hevc.h>
  33.  
  34. #include "intel_batchbuffer.h"
  35. #include "intel_driver.h"
  36. #include "i965_defines.h"
  37. #include "i965_drv_video.h"
  38. #include "i965_decoder_utils.h"
  39.  
  40. #include "gen9_mfd.h"
  41. #include "intel_media.h"
  42. #include "vp9_probs.h"
  43.  
  44. #define OUT_BUFFER(buf_bo, is_target, ma)  do {                         \
  45.         if (buf_bo) {                                                   \
  46.             OUT_BCS_RELOC(batch,                                        \
  47.                           buf_bo,                                       \
  48.                           I915_GEM_DOMAIN_RENDER,                       \
  49.                           is_target ? I915_GEM_DOMAIN_RENDER : 0,       \
  50.                           0);                                           \
  51.         } else {                                                        \
  52.             OUT_BCS_BATCH(batch, 0);                                    \
  53.         }                                                               \
  54.         OUT_BCS_BATCH(batch, 0);                                        \
  55.         if (ma)                                                         \
  56.             OUT_BCS_BATCH(batch, 0);                                    \
  57.     } while (0)
  58.  
  59. #define OUT_BUFFER_MA_TARGET(buf_bo)       OUT_BUFFER(buf_bo, 1, 1)
  60. #define OUT_BUFFER_MA_REFERENCE(buf_bo)    OUT_BUFFER(buf_bo, 0, 1)
  61. #define OUT_BUFFER_NMA_TARGET(buf_bo)      OUT_BUFFER(buf_bo, 1, 0)
  62. #define OUT_BUFFER_NMA_REFERENCE(buf_bo)   OUT_BUFFER(buf_bo, 0, 0)
  63.  
  64. static void
  65. gen9_hcpd_init_hevc_surface(VADriverContextP ctx,
  66.                             VAPictureParameterBufferHEVC *pic_param,
  67.                             struct object_surface *obj_surface,
  68.                             struct gen9_hcpd_context *gen9_hcpd_context)
  69. {
  70.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  71.     GenHevcSurface *gen9_hevc_surface;
  72.  
  73.     if (!obj_surface)
  74.         return;
  75.  
  76.     obj_surface->free_private_data = gen_free_hevc_surface;
  77.     gen9_hevc_surface = obj_surface->private_data;
  78.  
  79.     if (!gen9_hevc_surface) {
  80.         gen9_hevc_surface = calloc(sizeof(GenHevcSurface), 1);
  81.         assert(gen9_hevc_surface);
  82.         gen9_hevc_surface->base.frame_store_id = -1;
  83.         obj_surface->private_data = gen9_hevc_surface;
  84.     }
  85.  
  86.     if (gen9_hevc_surface->motion_vector_temporal_bo == NULL) {
  87.         uint32_t size;
  88.  
  89.         if (gen9_hcpd_context->ctb_size == 16)
  90.             size = ((gen9_hcpd_context->picture_width_in_pixels + 63) >> 6) *
  91.                 ((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4);
  92.         else
  93.             size = ((gen9_hcpd_context->picture_width_in_pixels + 31) >> 5) *
  94.                 ((gen9_hcpd_context->picture_height_in_pixels + 31) >> 5);
  95.  
  96.         size <<= 6; /* in unit of 64bytes */
  97.         gen9_hevc_surface->motion_vector_temporal_bo = dri_bo_alloc(i965->intel.bufmgr,
  98.                                                                     "motion vector temporal buffer",
  99.                                                                     size,
  100.                                                                     0x1000);
  101.     }
  102. }
  103.  
  104. static VAStatus
  105. gen9_hcpd_hevc_decode_init(VADriverContextP ctx,
  106.                            struct decode_state *decode_state,
  107.                            struct gen9_hcpd_context *gen9_hcpd_context)
  108. {
  109.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  110.     VAPictureParameterBufferHEVC *pic_param;
  111.     struct object_surface *obj_surface;
  112.     uint32_t size;
  113.     int size_shift = 3;
  114.  
  115.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  116.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  117.     intel_update_hevc_frame_store_index(ctx,
  118.                                         decode_state,
  119.                                         pic_param,
  120.                                         gen9_hcpd_context->reference_surfaces,
  121.                                         &gen9_hcpd_context->fs_ctx);
  122.  
  123.     gen9_hcpd_context->picture_width_in_pixels = pic_param->pic_width_in_luma_samples;
  124.     gen9_hcpd_context->picture_height_in_pixels = pic_param->pic_height_in_luma_samples;
  125.     gen9_hcpd_context->ctb_size = (1 << (pic_param->log2_min_luma_coding_block_size_minus3 +
  126.                                          3 +
  127.                                          pic_param->log2_diff_max_min_luma_coding_block_size));
  128.     gen9_hcpd_context->picture_width_in_ctbs = ALIGN(gen9_hcpd_context->picture_width_in_pixels, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size;
  129.     gen9_hcpd_context->picture_height_in_ctbs = ALIGN(gen9_hcpd_context->picture_height_in_pixels, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size;
  130.     gen9_hcpd_context->min_cb_size = (1 << (pic_param->log2_min_luma_coding_block_size_minus3 + 3));
  131.     gen9_hcpd_context->picture_width_in_min_cb_minus1 = gen9_hcpd_context->picture_width_in_pixels / gen9_hcpd_context->min_cb_size - 1;
  132.     gen9_hcpd_context->picture_height_in_min_cb_minus1 = gen9_hcpd_context->picture_height_in_pixels / gen9_hcpd_context->min_cb_size - 1;
  133.  
  134.     /* Current decoded picture */
  135.     obj_surface = decode_state->render_object;
  136.     hevc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param);
  137.     gen9_hcpd_init_hevc_surface(ctx, pic_param, obj_surface, gen9_hcpd_context);
  138.  
  139.     if((pic_param->bit_depth_luma_minus8 > 0)
  140.         || (pic_param->bit_depth_chroma_minus8 > 0))
  141.         size_shift = 2;
  142.  
  143.     size = ALIGN(gen9_hcpd_context->picture_width_in_pixels, 32) >> size_shift;
  144.     size <<= 6;
  145.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer), "line buffer", size);
  146.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer), "tile line buffer", size);
  147.  
  148.     size = ALIGN(gen9_hcpd_context->picture_height_in_pixels + 6 * gen9_hcpd_context->picture_height_in_ctbs, 32) >> size_shift;
  149.     size <<= 6;
  150.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer), "tile column buffer", size);
  151.  
  152.     size = (((gen9_hcpd_context->picture_width_in_pixels + 15) >> 4) * 188 + 9 * gen9_hcpd_context->picture_width_in_ctbs + 1023) >> 9;
  153.     size <<= 6;
  154.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer), "metadata line buffer", size);
  155.  
  156.     size = (((gen9_hcpd_context->picture_width_in_pixels + 15) >> 4) * 172 + 9 * gen9_hcpd_context->picture_width_in_ctbs + 1023) >> 9;
  157.     size <<= 6;
  158.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer), "metadata tile line buffer", size);
  159.  
  160.     if (IS_CHERRYVIEW(i965->intel.device_info))
  161.         size = (((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4) * 256 + 9 * gen9_hcpd_context->picture_height_in_ctbs + 1023) >> 9;
  162.     else
  163.         size = (((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4) * 176 + 89 * gen9_hcpd_context->picture_height_in_ctbs + 1023) >> 9;
  164.     size <<= 6;
  165.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer), "metadata tile column buffer", size);
  166.  
  167.     size = ALIGN(((gen9_hcpd_context->picture_width_in_pixels >> 1) + 3 * gen9_hcpd_context->picture_width_in_ctbs), 16) >> size_shift;
  168.     size <<= 6;
  169.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_line_buffer), "sao line buffer", size);
  170.  
  171.     size = ALIGN(((gen9_hcpd_context->picture_width_in_pixels >> 1) + 6 * gen9_hcpd_context->picture_width_in_ctbs), 16) >> size_shift;
  172.     size <<= 6;
  173.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_tile_line_buffer), "sao tile line buffer", size);
  174.  
  175.     size = ALIGN(((gen9_hcpd_context->picture_height_in_pixels >> 1) + 6 * gen9_hcpd_context->picture_height_in_ctbs), 16) >> size_shift;
  176.     size <<= 6;
  177.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_tile_column_buffer), "sao tile column buffer", size);
  178.  
  179.     gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0;
  180.     gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0;
  181.     gen9_hcpd_context->first_inter_slice_valid = 0;
  182.  
  183.     return VA_STATUS_SUCCESS;
  184. }
  185.  
  186. static void
  187. gen9_hcpd_pipe_mode_select(VADriverContextP ctx,
  188.                            struct decode_state *decode_state,
  189.                            int codec,
  190.                            struct gen9_hcpd_context *gen9_hcpd_context)
  191. {
  192.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  193.  
  194.     assert((codec == HCP_CODEC_HEVC) || (codec == HCP_CODEC_VP9));
  195.  
  196.     BEGIN_BCS_BATCH(batch, 4);
  197.  
  198.     OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2));
  199.     OUT_BCS_BATCH(batch,
  200.                   (codec << 5) |
  201.                   (0 << 3) | /* disable Pic Status / Error Report */
  202.                   HCP_CODEC_SELECT_DECODE);
  203.     OUT_BCS_BATCH(batch, 0);
  204.     OUT_BCS_BATCH(batch, 0);
  205.  
  206.     ADVANCE_BCS_BATCH(batch);
  207. }
  208.  
  209. static void
  210. gen9_hcpd_surface_state(VADriverContextP ctx,
  211.                         struct decode_state *decode_state,
  212.                         struct gen9_hcpd_context *gen9_hcpd_context)
  213. {
  214.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  215.     struct object_surface *obj_surface = decode_state->render_object;
  216.     unsigned int y_cb_offset;
  217.     VAPictureParameterBufferHEVC *pic_param;
  218.  
  219.     assert(obj_surface);
  220.  
  221.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  222.     y_cb_offset = obj_surface->y_cb_offset;
  223.  
  224.     BEGIN_BCS_BATCH(batch, 3);
  225.  
  226.     OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2));
  227.     OUT_BCS_BATCH(batch,
  228.                   (0 << 28) |                   /* surface id */
  229.                   (obj_surface->width - 1));    /* pitch - 1 */
  230.     if((pic_param->bit_depth_luma_minus8 > 0)
  231.         || (pic_param->bit_depth_chroma_minus8 > 0))
  232.     {
  233.         OUT_BCS_BATCH(batch,
  234.                   (SURFACE_FORMAT_P010 << 28) |
  235.                   y_cb_offset);
  236.     }
  237.     else
  238.     {
  239.         OUT_BCS_BATCH(batch,
  240.                   (SURFACE_FORMAT_PLANAR_420_8 << 28) |
  241.                   y_cb_offset);
  242.     }
  243.  
  244.     ADVANCE_BCS_BATCH(batch);
  245. }
  246.  
  247. static void
  248. gen9_hcpd_pipe_buf_addr_state(VADriverContextP ctx,
  249.                               struct decode_state *decode_state,
  250.                               struct gen9_hcpd_context *gen9_hcpd_context)
  251. {
  252.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  253.     struct object_surface *obj_surface;
  254.     GenHevcSurface *gen9_hevc_surface;
  255.     int i;
  256.  
  257.     BEGIN_BCS_BATCH(batch, 95);
  258.  
  259.     OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2));
  260.  
  261.     obj_surface = decode_state->render_object;
  262.     assert(obj_surface && obj_surface->bo);
  263.     gen9_hevc_surface = obj_surface->private_data;
  264.     assert(gen9_hevc_surface && gen9_hevc_surface->motion_vector_temporal_bo);
  265.  
  266.     OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */
  267.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */
  268.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_line_buffer.bo); /* DW 7..9 */
  269.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_column_buffer.bo); /* DW 10..12 */
  270.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_line_buffer.bo);         /* DW 13..15 */
  271.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_line_buffer.bo);    /* DW 16..18 */
  272.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_column_buffer.bo);  /* DW 19..21 */
  273.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_line_buffer.bo);              /* DW 22..24 */
  274.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_tile_line_buffer.bo);         /* DW 25..27 */
  275.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_tile_column_buffer.bo);       /* DW 28..30 */
  276.     OUT_BUFFER_MA_TARGET(gen9_hevc_surface->motion_vector_temporal_bo); /* DW 31..33 */
  277.     OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */
  278.  
  279.     for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) {
  280.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  281.  
  282.         if (obj_surface)
  283.             OUT_BUFFER_NMA_REFERENCE(obj_surface->bo);
  284.         else
  285.             OUT_BUFFER_NMA_REFERENCE(NULL);
  286.     }
  287.     OUT_BCS_BATCH(batch, 0);    /* DW 53, memory address attributes */
  288.  
  289.     OUT_BUFFER_MA_REFERENCE(NULL); /* DW 54..56, ignore for decoding mode */
  290.     OUT_BUFFER_MA_TARGET(NULL);
  291.     OUT_BUFFER_MA_TARGET(NULL);
  292.     OUT_BUFFER_MA_TARGET(NULL);
  293.  
  294.     for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) {
  295.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  296.         gen9_hevc_surface = NULL;
  297.  
  298.         if (obj_surface && obj_surface->private_data)
  299.             gen9_hevc_surface = obj_surface->private_data;
  300.  
  301.         if (gen9_hevc_surface)
  302.             OUT_BUFFER_NMA_REFERENCE(gen9_hevc_surface->motion_vector_temporal_bo);
  303.         else
  304.             OUT_BUFFER_NMA_REFERENCE(NULL);
  305.     }
  306.     OUT_BCS_BATCH(batch, 0);    /* DW 82, memory address attributes */
  307.  
  308.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 83..85, ignore for HEVC */
  309.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 86..88, ignore for HEVC */
  310.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 89..91, ignore for HEVC */
  311.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 92..94, ignore for HEVC */
  312.  
  313.     ADVANCE_BCS_BATCH(batch);
  314. }
  315.  
  316. static void
  317. gen9_hcpd_ind_obj_base_addr_state(VADriverContextP ctx,
  318.                                   dri_bo *slice_data_bo,
  319.                                   struct gen9_hcpd_context *gen9_hcpd_context)
  320. {
  321.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  322.  
  323.     BEGIN_BCS_BATCH(batch, 14);
  324.  
  325.     OUT_BCS_BATCH(batch, HCP_IND_OBJ_BASE_ADDR_STATE | (14 - 2));
  326.     OUT_BUFFER_MA_REFERENCE(slice_data_bo);        /* DW 1..3 */
  327.     OUT_BUFFER_NMA_REFERENCE(NULL);                /* DW 4..5, Upper Bound */
  328.     OUT_BUFFER_MA_REFERENCE(NULL);                 /* DW 6..8, CU, ignored */
  329.     OUT_BUFFER_MA_TARGET(NULL);                    /* DW 9..11, PAK-BSE, ignored */
  330.     OUT_BUFFER_NMA_TARGET(NULL);                   /* DW 12..13, Upper Bound  */
  331.  
  332.     ADVANCE_BCS_BATCH(batch);
  333. }
  334.  
  335. static void
  336. gen9_hcpd_qm_state(VADriverContextP ctx,
  337.                    int size_id,
  338.                    int color_component,
  339.                    int pred_type,
  340.                    int dc,
  341.                    unsigned char *qm,
  342.                    int qm_length,
  343.                    struct gen9_hcpd_context *gen9_hcpd_context)
  344. {
  345.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  346.     unsigned char qm_buffer[64];
  347.  
  348.     assert(qm_length <= 64);
  349.     memset(qm_buffer, 0, sizeof(qm_buffer));
  350.     memcpy(qm_buffer, qm, qm_length);
  351.  
  352.     BEGIN_BCS_BATCH(batch, 18);
  353.  
  354.     OUT_BCS_BATCH(batch, HCP_QM_STATE | (18 - 2));
  355.     OUT_BCS_BATCH(batch,
  356.                   dc << 5 |
  357.                   color_component << 3 |
  358.                   size_id << 1 |
  359.                   pred_type);
  360.     intel_batchbuffer_data(batch, qm_buffer, 64);
  361.  
  362.     ADVANCE_BCS_BATCH(batch);
  363. }
  364.  
  365. static void
  366. gen9_hcpd_hevc_qm_state(VADriverContextP ctx,
  367.                         struct decode_state *decode_state,
  368.                         struct gen9_hcpd_context *gen9_hcpd_context)
  369. {
  370.     VAIQMatrixBufferHEVC *iq_matrix;
  371.     VAPictureParameterBufferHEVC *pic_param;
  372.     int i;
  373.  
  374.     if (decode_state->iq_matrix && decode_state->iq_matrix->buffer)
  375.         iq_matrix = (VAIQMatrixBufferHEVC *)decode_state->iq_matrix->buffer;
  376.     else
  377.         iq_matrix = &gen9_hcpd_context->iq_matrix_hevc;
  378.  
  379.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  380.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  381.  
  382.     if (!pic_param->pic_fields.bits.scaling_list_enabled_flag)
  383.         iq_matrix = &gen9_hcpd_context->iq_matrix_hevc;
  384.  
  385.     for (i = 0; i < 6; i++) {
  386.         gen9_hcpd_qm_state(ctx,
  387.                            0, i % 3, i / 3, 0,
  388.                            iq_matrix->ScalingList4x4[i], 16,
  389.                            gen9_hcpd_context);
  390.     }
  391.  
  392.     for (i = 0; i < 6; i++) {
  393.         gen9_hcpd_qm_state(ctx,
  394.                            1, i % 3, i / 3, 0,
  395.                            iq_matrix->ScalingList8x8[i], 64,
  396.                            gen9_hcpd_context);
  397.     }
  398.  
  399.     for (i = 0; i < 6; i++) {
  400.         gen9_hcpd_qm_state(ctx,
  401.                            2, i % 3, i / 3, iq_matrix->ScalingListDC16x16[i],
  402.                            iq_matrix->ScalingList16x16[i], 64,
  403.                            gen9_hcpd_context);
  404.     }
  405.  
  406.     for (i = 0; i < 2; i++) {
  407.         gen9_hcpd_qm_state(ctx,
  408.                            3, 0, i % 2, iq_matrix->ScalingListDC32x32[i],
  409.                            iq_matrix->ScalingList32x32[i], 64,
  410.                            gen9_hcpd_context);
  411.     }
  412. }
  413.  
  414. static void
  415. gen9_hcpd_pic_state(VADriverContextP ctx,
  416.                     struct decode_state *decode_state,
  417.                     struct gen9_hcpd_context *gen9_hcpd_context)
  418. {
  419.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  420.     VAPictureParameterBufferHEVC *pic_param;
  421.     int max_pcm_size_minus3 = 0, min_pcm_size_minus3 = 0;
  422.     int pcm_sample_bit_depth_luma_minus1 = 7, pcm_sample_bit_depth_chroma_minus1 = 7;
  423.     /*
  424.      * 7.4.3.1
  425.      *
  426.      * When not present, the value of loop_filter_across_tiles_enabled_flag
  427.      * is inferred to be equal to 1.
  428.      */
  429.     int loop_filter_across_tiles_enabled_flag = 1;
  430.  
  431.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  432.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  433.  
  434.     if (pic_param->pic_fields.bits.pcm_enabled_flag) {
  435.         max_pcm_size_minus3 = pic_param->log2_min_pcm_luma_coding_block_size_minus3 +
  436.             pic_param->log2_diff_max_min_pcm_luma_coding_block_size;
  437.         min_pcm_size_minus3 = pic_param->log2_min_pcm_luma_coding_block_size_minus3;
  438.         pcm_sample_bit_depth_luma_minus1 = (pic_param->pcm_sample_bit_depth_luma_minus1 & 0x0f);
  439.         pcm_sample_bit_depth_chroma_minus1 = (pic_param->pcm_sample_bit_depth_chroma_minus1 & 0x0f);
  440.     } else {
  441.         max_pcm_size_minus3 = MIN(pic_param->log2_min_luma_coding_block_size_minus3 + pic_param->log2_diff_max_min_luma_coding_block_size, 2);
  442.     }
  443.  
  444.     if (pic_param->pic_fields.bits.tiles_enabled_flag)
  445.         loop_filter_across_tiles_enabled_flag = pic_param->pic_fields.bits.loop_filter_across_tiles_enabled_flag;
  446.  
  447.     BEGIN_BCS_BATCH(batch, 19);
  448.  
  449.     OUT_BCS_BATCH(batch, HCP_PIC_STATE | (19 - 2));
  450.  
  451.     OUT_BCS_BATCH(batch,
  452.                   gen9_hcpd_context->picture_height_in_min_cb_minus1 << 16 |
  453.                   gen9_hcpd_context->picture_width_in_min_cb_minus1);
  454.     OUT_BCS_BATCH(batch,
  455.                   max_pcm_size_minus3 << 10 |
  456.                   min_pcm_size_minus3 << 8 |
  457.                   (pic_param->log2_min_transform_block_size_minus2 +
  458.                    pic_param->log2_diff_max_min_transform_block_size) << 6 |
  459.                   pic_param->log2_min_transform_block_size_minus2 << 4 |
  460.                   (pic_param->log2_min_luma_coding_block_size_minus3 +
  461.                    pic_param->log2_diff_max_min_luma_coding_block_size) << 2 |
  462.                   pic_param->log2_min_luma_coding_block_size_minus3);
  463.     OUT_BCS_BATCH(batch, 0); /* DW 3, ignored */
  464.     OUT_BCS_BATCH(batch,
  465.                   0 << 27 |
  466.                   pic_param->pic_fields.bits.strong_intra_smoothing_enabled_flag << 26 |
  467.                   pic_param->pic_fields.bits.transquant_bypass_enabled_flag << 25 |
  468.                   pic_param->pic_fields.bits.amp_enabled_flag << 23 |
  469.                   pic_param->pic_fields.bits.transform_skip_enabled_flag << 22 |
  470.                   !(pic_param->CurrPic.flags & VA_PICTURE_HEVC_BOTTOM_FIELD) << 21 |
  471.                   !!(pic_param->CurrPic.flags & VA_PICTURE_HEVC_FIELD_PIC) << 20 |
  472.                   pic_param->pic_fields.bits.weighted_pred_flag << 19 |
  473.                   pic_param->pic_fields.bits.weighted_bipred_flag << 18 |
  474.                   pic_param->pic_fields.bits.tiles_enabled_flag << 17 |
  475.                   pic_param->pic_fields.bits.entropy_coding_sync_enabled_flag << 16 |
  476.                   loop_filter_across_tiles_enabled_flag << 15 |
  477.                   pic_param->pic_fields.bits.sign_data_hiding_enabled_flag << 13 |
  478.                   pic_param->log2_parallel_merge_level_minus2 << 10 |
  479.                   pic_param->pic_fields.bits.constrained_intra_pred_flag << 9 |
  480.                   pic_param->pic_fields.bits.pcm_loop_filter_disabled_flag << 8 |
  481.                   (pic_param->diff_cu_qp_delta_depth & 0x03) << 6 |
  482.                   pic_param->pic_fields.bits.cu_qp_delta_enabled_flag << 5 |
  483.                   pic_param->pic_fields.bits.pcm_enabled_flag << 4 |
  484.                   pic_param->slice_parsing_fields.bits.sample_adaptive_offset_enabled_flag << 3 |
  485.                   0);
  486.     OUT_BCS_BATCH(batch,
  487.                   pic_param->bit_depth_luma_minus8 << 27 |
  488.                   pic_param->bit_depth_chroma_minus8 << 24 |
  489.                   pcm_sample_bit_depth_luma_minus1 << 20 |
  490.                   pcm_sample_bit_depth_chroma_minus1 << 16 |
  491.                   pic_param->max_transform_hierarchy_depth_inter << 13 |
  492.                   pic_param->max_transform_hierarchy_depth_intra << 10 |
  493.                   (pic_param->pps_cr_qp_offset & 0x1f) << 5 |
  494.                   (pic_param->pps_cb_qp_offset & 0x1f));
  495.     OUT_BCS_BATCH(batch,
  496.                   0 << 29 |
  497.                   0);
  498.     OUT_BCS_BATCH(batch, 0);
  499.     OUT_BCS_BATCH(batch, 0);
  500.     OUT_BCS_BATCH(batch, 0);
  501.     OUT_BCS_BATCH(batch, 0); /* DW 10 */
  502.     OUT_BCS_BATCH(batch, 0);
  503.     OUT_BCS_BATCH(batch, 0);
  504.     OUT_BCS_BATCH(batch, 0);
  505.     OUT_BCS_BATCH(batch, 0);
  506.     OUT_BCS_BATCH(batch, 0); /* DW 15 */
  507.     OUT_BCS_BATCH(batch, 0);
  508.     OUT_BCS_BATCH(batch, 0);
  509.     OUT_BCS_BATCH(batch, 0);
  510.  
  511.     ADVANCE_BCS_BATCH(batch);
  512. }
  513.  
  514. static void
  515. gen9_hcpd_tile_state(VADriverContextP ctx,
  516.                      struct decode_state *decode_state,
  517.                      struct gen9_hcpd_context *gen9_hcpd_context)
  518. {
  519.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  520.     VAPictureParameterBufferHEVC *pic_param;
  521.     uint8_t pos_col[20], pos_row[24];
  522.     int i;
  523.  
  524.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  525.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  526.  
  527.     memset(pos_col, 0, sizeof(pos_col));
  528.     memset(pos_row, 0, sizeof(pos_row));
  529.  
  530.     for (i = 0; i <= MIN(pic_param->num_tile_columns_minus1, 18); i++)
  531.         pos_col[i + 1] = pos_col[i] + pic_param->column_width_minus1[i] + 1;
  532.  
  533.     for (i = 0; i <= MIN(pic_param->num_tile_rows_minus1, 20); i++)
  534.         pos_row[i + 1] = pos_row[i] + pic_param->row_height_minus1[i] + 1;
  535.  
  536.     BEGIN_BCS_BATCH(batch, 13);
  537.  
  538.     OUT_BCS_BATCH(batch, HCP_TILE_STATE | (13 - 2));
  539.  
  540.     OUT_BCS_BATCH(batch,
  541.                   pic_param->num_tile_columns_minus1 << 5 |
  542.                   pic_param->num_tile_rows_minus1);
  543.     intel_batchbuffer_data(batch, pos_col, 20);
  544.     intel_batchbuffer_data(batch, pos_row, 24);
  545.  
  546.     ADVANCE_BCS_BATCH(batch);
  547. }
  548.  
  549. static int
  550. gen9_hcpd_get_reference_picture_frame_id(VAPictureHEVC *ref_pic,
  551.                                          GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES])
  552. {
  553.     int i;
  554.  
  555.     if (ref_pic->picture_id == VA_INVALID_ID ||
  556.         (ref_pic->flags & VA_PICTURE_HEVC_INVALID))
  557.         return 0;
  558.  
  559.     for (i = 0; i < MAX_GEN_HCP_REFERENCE_FRAMES; i++) {
  560.         if (ref_pic->picture_id == frame_store[i].surface_id) {
  561.             assert(frame_store[i].frame_store_id < MAX_GEN_HCP_REFERENCE_FRAMES);
  562.             return frame_store[i].frame_store_id;
  563.         }
  564.     }
  565.  
  566.     /* Should never get here !!! */
  567.     assert(0);
  568.     return 0;
  569. }
  570.  
  571. static void
  572. gen9_hcpd_ref_idx_state_1(struct intel_batchbuffer *batch,
  573.                           int list,
  574.                           VAPictureParameterBufferHEVC *pic_param,
  575.                           VASliceParameterBufferHEVC *slice_param,
  576.                           GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES])
  577. {
  578.     int i;
  579.     uint8_t num_ref_minus1 = (list ? slice_param->num_ref_idx_l1_active_minus1 : slice_param->num_ref_idx_l0_active_minus1);
  580.     uint8_t *ref_list = slice_param->RefPicList[list];
  581.  
  582.     BEGIN_BCS_BATCH(batch, 18);
  583.  
  584.     OUT_BCS_BATCH(batch, HCP_REF_IDX_STATE | (18 - 2));
  585.     OUT_BCS_BATCH(batch,
  586.                   num_ref_minus1 << 1 |
  587.                   list);
  588.  
  589.     for (i = 0; i < 16; i++) {
  590.         if (i < MIN((num_ref_minus1 + 1), 15)) {
  591.             VAPictureHEVC *ref_pic = &pic_param->ReferenceFrames[ref_list[i]];
  592.             VAPictureHEVC *curr_pic = &pic_param->CurrPic;
  593.  
  594.             OUT_BCS_BATCH(batch,
  595.                           !(ref_pic->flags & VA_PICTURE_HEVC_BOTTOM_FIELD) << 15 |
  596.                           !!(ref_pic->flags & VA_PICTURE_HEVC_FIELD_PIC) << 14 |
  597.                           !!(ref_pic->flags & VA_PICTURE_HEVC_LONG_TERM_REFERENCE) << 13 |
  598.                           0 << 12 |
  599.                           0 << 11 |
  600.                           gen9_hcpd_get_reference_picture_frame_id(ref_pic, frame_store) << 8 |
  601.                           (CLAMP(-128, 127, curr_pic->pic_order_cnt - ref_pic->pic_order_cnt) & 0xff));
  602.         } else {
  603.             OUT_BCS_BATCH(batch, 0);
  604.         }
  605.     }
  606.  
  607.     ADVANCE_BCS_BATCH(batch);
  608. }
  609.  
  610. static void
  611. gen9_hcpd_ref_idx_state(VADriverContextP ctx,
  612.                         VAPictureParameterBufferHEVC *pic_param,
  613.                         VASliceParameterBufferHEVC *slice_param,
  614.                         struct gen9_hcpd_context *gen9_hcpd_context)
  615. {
  616.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  617.  
  618.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I)
  619.         return;
  620.  
  621.     gen9_hcpd_ref_idx_state_1(batch, 0, pic_param, slice_param, gen9_hcpd_context->reference_surfaces);
  622.  
  623.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P)
  624.         return;
  625.  
  626.     gen9_hcpd_ref_idx_state_1(batch, 1, pic_param, slice_param, gen9_hcpd_context->reference_surfaces);
  627. }
  628.  
  629. static void
  630. gen9_hcpd_weightoffset_state_1(struct intel_batchbuffer *batch,
  631.                                int list,
  632.                                VASliceParameterBufferHEVC *slice_param)
  633. {
  634.     int i;
  635.     uint8_t num_ref_minus1 = (list == 1) ? slice_param->num_ref_idx_l1_active_minus1 : slice_param->num_ref_idx_l0_active_minus1;
  636.     int8_t *luma_offset = (list == 1) ? slice_param->luma_offset_l1 : slice_param->luma_offset_l0;
  637.     int8_t *delta_luma_weight = (list == 1) ? slice_param->delta_luma_weight_l1 : slice_param->delta_luma_weight_l0;
  638.     int8_t (* chroma_offset)[2] = (list == 1) ? slice_param->ChromaOffsetL1 : slice_param->ChromaOffsetL0;
  639.     int8_t (* delta_chroma_weight)[2] = (list == 1) ? slice_param->delta_chroma_weight_l1 : slice_param->delta_chroma_weight_l0;
  640.  
  641.     BEGIN_BCS_BATCH(batch, 34);
  642.  
  643.     OUT_BCS_BATCH(batch, HCP_WEIGHTOFFSET | (34 - 2));
  644.     OUT_BCS_BATCH(batch, list);
  645.  
  646.     for (i = 0; i < 16; i++) {
  647.         if (i < MIN((num_ref_minus1 + 1), 15)) {
  648.             OUT_BCS_BATCH(batch,
  649.                           (luma_offset[i] & 0xff) << 8 |
  650.                           (delta_luma_weight[i] & 0xff));
  651.         } else {
  652.             OUT_BCS_BATCH(batch, 0);
  653.         }
  654.     }
  655.     for (i = 0; i < 16; i++) {
  656.         if (i < MIN((num_ref_minus1 + 1), 15)) {
  657.             OUT_BCS_BATCH(batch,
  658.                           (chroma_offset[i][1] & 0xff) << 24 |
  659.                           (delta_chroma_weight[i][1] & 0xff) << 16 |
  660.                           (chroma_offset[i][0] & 0xff) << 8 |
  661.                           (delta_chroma_weight[i][0] & 0xff));
  662.         } else {
  663.             OUT_BCS_BATCH(batch, 0);
  664.         }
  665.     }
  666.  
  667.     ADVANCE_BCS_BATCH(batch);
  668. }
  669.  
  670. static void
  671. gen9_hcpd_weightoffset_state(VADriverContextP ctx,
  672.                              VAPictureParameterBufferHEVC *pic_param,
  673.                              VASliceParameterBufferHEVC *slice_param,
  674.                              struct gen9_hcpd_context *gen9_hcpd_context)
  675. {
  676.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  677.  
  678.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I)
  679.         return;
  680.  
  681.     if ((slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P &&
  682.          !pic_param->pic_fields.bits.weighted_pred_flag) ||
  683.         (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B &&
  684.          !pic_param->pic_fields.bits.weighted_bipred_flag))
  685.         return;
  686.  
  687.     gen9_hcpd_weightoffset_state_1(batch, 0, slice_param);
  688.  
  689.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P)
  690.         return;
  691.  
  692.     gen9_hcpd_weightoffset_state_1(batch, 1, slice_param);
  693. }
  694.  
  695. static int
  696. gen9_hcpd_get_collocated_ref_idx(VADriverContextP ctx,
  697.                                  VAPictureParameterBufferHEVC *pic_param,
  698.                                  VASliceParameterBufferHEVC *slice_param,
  699.                                  struct gen9_hcpd_context *gen9_hcpd_context)
  700. {
  701.     uint8_t *ref_list;
  702.     VAPictureHEVC *ref_pic;
  703.  
  704.     if (slice_param->collocated_ref_idx > 14)
  705.         return 0;
  706.  
  707.     if (!slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag)
  708.         return 0;
  709.  
  710.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I)
  711.         return 0;
  712.  
  713.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P ||
  714.         (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B &&
  715.          slice_param->LongSliceFlags.fields.collocated_from_l0_flag))
  716.         ref_list = slice_param->RefPicList[0];
  717.     else {
  718.         assert(slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B);
  719.         ref_list = slice_param->RefPicList[1];
  720.     }
  721.  
  722.     ref_pic = &pic_param->ReferenceFrames[ref_list[slice_param->collocated_ref_idx]];
  723.  
  724.     return gen9_hcpd_get_reference_picture_frame_id(ref_pic, gen9_hcpd_context->reference_surfaces);
  725. }
  726.  
  727. static int
  728. gen9_hcpd_is_list_low_delay(uint8_t ref_list_count,
  729.                             uint8_t ref_list[15],
  730.                             VAPictureHEVC *curr_pic,
  731.                             VAPictureHEVC ref_surfaces[15])
  732. {
  733.     int i;
  734.  
  735.     for (i = 0; i < MIN(ref_list_count, 15); i++) {
  736.         VAPictureHEVC *ref_pic;
  737.  
  738.         if (ref_list[i] > 14)
  739.             continue;
  740.  
  741.         ref_pic = &ref_surfaces[ref_list[i]];
  742.  
  743.         if (ref_pic->pic_order_cnt > curr_pic->pic_order_cnt)
  744.             return 0;
  745.     }
  746.  
  747.     return 1;
  748. }
  749.  
  750. static int
  751. gen9_hcpd_is_low_delay(VADriverContextP ctx,
  752.                        VAPictureParameterBufferHEVC *pic_param,
  753.                        VASliceParameterBufferHEVC *slice_param)
  754. {
  755.     if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I)
  756.         return 0;
  757.     else if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P)
  758.         return gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l0_active_minus1 + 1,
  759.                                            slice_param->RefPicList[0],
  760.                                            &pic_param->CurrPic,
  761.                                            pic_param->ReferenceFrames);
  762.     else
  763.         return gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l0_active_minus1 + 1,
  764.                                            slice_param->RefPicList[0],
  765.                                            &pic_param->CurrPic,
  766.                                            pic_param->ReferenceFrames) &&
  767.             gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l1_active_minus1 + 1,
  768.                                         slice_param->RefPicList[1],
  769.                                         &pic_param->CurrPic,
  770.                                         pic_param->ReferenceFrames);
  771. }
  772.  
  773. static void
  774. gen9_hcpd_slice_state(VADriverContextP ctx,
  775.                       VAPictureParameterBufferHEVC *pic_param,
  776.                       VASliceParameterBufferHEVC *slice_param,
  777.                       VASliceParameterBufferHEVC *next_slice_param,
  778.                       struct gen9_hcpd_context *gen9_hcpd_context)
  779. {
  780.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  781.     int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos;
  782.     unsigned short collocated_ref_idx, collocated_from_l0_flag;
  783.     int sliceqp_sign_flag = 0, sliceqp = 0;
  784.  
  785.     slice_hor_pos = slice_param->slice_segment_address % gen9_hcpd_context->picture_width_in_ctbs;
  786.     slice_ver_pos = slice_param->slice_segment_address / gen9_hcpd_context->picture_width_in_ctbs;
  787.  
  788.     if (next_slice_param) {
  789.         next_slice_hor_pos = next_slice_param->slice_segment_address % gen9_hcpd_context->picture_width_in_ctbs;
  790.         next_slice_ver_pos = next_slice_param->slice_segment_address / gen9_hcpd_context->picture_width_in_ctbs;
  791.     } else {
  792.         next_slice_hor_pos = 0;
  793.         next_slice_ver_pos = 0;
  794.     }
  795.  
  796.     collocated_ref_idx = gen9_hcpd_get_collocated_ref_idx(ctx, pic_param, slice_param, gen9_hcpd_context);
  797.     collocated_from_l0_flag = slice_param->LongSliceFlags.fields.collocated_from_l0_flag;
  798.  
  799.     if ((!gen9_hcpd_context->first_inter_slice_valid) &&
  800.         (slice_param->LongSliceFlags.fields.slice_type != HEVC_SLICE_I) &&
  801.         slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag) {
  802.         gen9_hcpd_context->first_inter_slice_collocated_ref_idx = collocated_ref_idx;
  803.         gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = collocated_from_l0_flag;
  804.         gen9_hcpd_context->first_inter_slice_valid = 1;
  805.     }
  806.  
  807.     /* HW requirement */
  808.     if (gen9_hcpd_context->first_inter_slice_valid &&
  809.         ((slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) ||
  810.          (!slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag))) {
  811.         collocated_ref_idx = gen9_hcpd_context->first_inter_slice_collocated_ref_idx;
  812.         collocated_from_l0_flag = gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag;
  813.     }
  814.  
  815.     sliceqp = pic_param->init_qp_minus26 + 26 + slice_param->slice_qp_delta;
  816.     if((pic_param->bit_depth_luma_minus8 > 0)
  817.         || (pic_param->bit_depth_chroma_minus8 > 0))
  818.     {
  819.         if(sliceqp < 0)
  820.         {
  821.             sliceqp_sign_flag = 1;
  822.             sliceqp = -sliceqp;
  823.         }
  824.     }
  825.  
  826.     BEGIN_BCS_BATCH(batch, 9);
  827.  
  828.     OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (9 - 2));
  829.  
  830.     OUT_BCS_BATCH(batch,
  831.                   slice_ver_pos << 16 |
  832.                   slice_hor_pos);
  833.     OUT_BCS_BATCH(batch,
  834.                   next_slice_ver_pos << 16 |
  835.                   next_slice_hor_pos);
  836.     OUT_BCS_BATCH(batch,
  837.                   (slice_param->slice_cr_qp_offset & 0x1f) << 17 |
  838.                   (slice_param->slice_cb_qp_offset & 0x1f) << 12 |
  839.                   sliceqp << 6 |
  840.                   slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag << 5 |
  841.                   slice_param->LongSliceFlags.fields.dependent_slice_segment_flag << 4 |
  842.                   sliceqp_sign_flag << 3 |
  843.                   !next_slice_param << 2 |
  844.                   slice_param->LongSliceFlags.fields.slice_type);
  845.     OUT_BCS_BATCH(batch,
  846.                   collocated_ref_idx << 26 |
  847.                   (5 - slice_param->five_minus_max_num_merge_cand - 1) << 23 |
  848.                   slice_param->LongSliceFlags.fields.cabac_init_flag << 22 |
  849.                   slice_param->luma_log2_weight_denom << 19 |
  850.                   ((slice_param->luma_log2_weight_denom + slice_param->delta_chroma_log2_weight_denom) & 0x7) << 16 |
  851.                   collocated_from_l0_flag << 15 |
  852.                   gen9_hcpd_is_low_delay(ctx, pic_param, slice_param) << 14 |
  853.                   slice_param->LongSliceFlags.fields.mvd_l1_zero_flag << 13 |
  854.                   slice_param->LongSliceFlags.fields.slice_sao_luma_flag << 12 |
  855.                   slice_param->LongSliceFlags.fields.slice_sao_chroma_flag << 11 |
  856.                   slice_param->LongSliceFlags.fields.slice_loop_filter_across_slices_enabled_flag << 10 |
  857.                   (slice_param->slice_beta_offset_div2 & 0xf) << 5 |
  858.                   (slice_param->slice_tc_offset_div2 & 0xf) << 1 |
  859.                   slice_param->LongSliceFlags.fields.slice_deblocking_filter_disabled_flag);
  860.     OUT_BCS_BATCH(batch,
  861.                   slice_param->slice_data_byte_offset); /* DW 5 */
  862.     OUT_BCS_BATCH(batch,
  863.                   0 << 26 |
  864.                   0 << 20 |
  865.                   0);
  866.     OUT_BCS_BATCH(batch, 0);    /* Ignored for decoding */
  867.     OUT_BCS_BATCH(batch, 0);    /* Ignored for decoding */
  868.  
  869.     ADVANCE_BCS_BATCH(batch);
  870. }
  871.  
  872. static void
  873. gen9_hcpd_bsd_object(VADriverContextP ctx,
  874.                      VASliceParameterBufferHEVC *slice_param,
  875.                      struct gen9_hcpd_context *gen9_hcpd_context)
  876. {
  877.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  878.  
  879.     BEGIN_BCS_BATCH(batch, 3);
  880.  
  881.     OUT_BCS_BATCH(batch, HCP_BSD_OBJECT | (3 - 2));
  882.  
  883.     OUT_BCS_BATCH(batch, slice_param->slice_data_size);
  884.     OUT_BCS_BATCH(batch, slice_param->slice_data_offset);
  885.  
  886.     ADVANCE_BCS_BATCH(batch);
  887. }
  888.  
  889. static VAStatus
  890. gen9_hcpd_hevc_decode_picture(VADriverContextP ctx,
  891.                               struct decode_state *decode_state,
  892.                               struct gen9_hcpd_context *gen9_hcpd_context)
  893. {
  894.     VAStatus vaStatus;
  895.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  896.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  897.     VAPictureParameterBufferHEVC *pic_param;
  898.     VASliceParameterBufferHEVC *slice_param, *next_slice_param, *next_slice_group_param;
  899.     dri_bo *slice_data_bo;
  900.     int i, j;
  901.  
  902.     vaStatus = gen9_hcpd_hevc_decode_init(ctx, decode_state, gen9_hcpd_context);
  903.  
  904.     if (vaStatus != VA_STATUS_SUCCESS)
  905.         goto out;
  906.  
  907.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  908.     pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer;
  909.  
  910.     if (i965->intel.has_bsd2)
  911.         intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000, BSD_RING0);
  912.     else
  913.         intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
  914.     intel_batchbuffer_emit_mi_flush(batch);
  915.  
  916.     gen9_hcpd_pipe_mode_select(ctx, decode_state, HCP_CODEC_HEVC, gen9_hcpd_context);
  917.     gen9_hcpd_surface_state(ctx, decode_state, gen9_hcpd_context);
  918.     gen9_hcpd_pipe_buf_addr_state(ctx, decode_state, gen9_hcpd_context);
  919.     gen9_hcpd_hevc_qm_state(ctx, decode_state, gen9_hcpd_context);
  920.     gen9_hcpd_pic_state(ctx, decode_state, gen9_hcpd_context);
  921.  
  922.     if (pic_param->pic_fields.bits.tiles_enabled_flag)
  923.         gen9_hcpd_tile_state(ctx, decode_state, gen9_hcpd_context);
  924.  
  925.     /* Need to double it works or not if the two slice groups have differenct slice data buffers */
  926.     for (j = 0; j < decode_state->num_slice_params; j++) {
  927.         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
  928.         slice_param = (VASliceParameterBufferHEVC *)decode_state->slice_params[j]->buffer;
  929.         slice_data_bo = decode_state->slice_datas[j]->bo;
  930.  
  931.         gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context);
  932.  
  933.         if (j == decode_state->num_slice_params - 1)
  934.             next_slice_group_param = NULL;
  935.         else
  936.             next_slice_group_param = (VASliceParameterBufferHEVC *)decode_state->slice_params[j + 1]->buffer;
  937.  
  938.         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
  939.             if (i < decode_state->slice_params[j]->num_elements - 1)
  940.                 next_slice_param = slice_param + 1;
  941.             else
  942.                 next_slice_param = next_slice_group_param;
  943.  
  944.             gen9_hcpd_slice_state(ctx, pic_param, slice_param, next_slice_param, gen9_hcpd_context);
  945.             gen9_hcpd_ref_idx_state(ctx, pic_param, slice_param, gen9_hcpd_context);
  946.             gen9_hcpd_weightoffset_state(ctx, pic_param, slice_param, gen9_hcpd_context);
  947.             gen9_hcpd_bsd_object(ctx, slice_param, gen9_hcpd_context);
  948.             slice_param++;
  949.         }
  950.     }
  951.  
  952.     intel_batchbuffer_end_atomic(batch);
  953.     intel_batchbuffer_flush(batch);
  954.  
  955. out:
  956.     return vaStatus;
  957. }
  958.  
  959. /*********************************************************/
  960. /*                  VP9 Code                             */
  961. /*********************************************************/
  962.  
  963.  
  964. #define VP9_PROB_BUFFER_FIRST_PART_SIZE 2010
  965. #define VP9_PROB_BUFFER_SECOND_PART_SIZE 10
  966. #define VP9_PROB_BUFFER_KEY_INTER_OFFSET 1667
  967. #define VP9_PROB_BUFFER_KEY_INTER_SIZE   343
  968.  
  969. #define VP9_PROB_BUFFER_UPDATE_NO   0
  970. #define VP9_PROB_BUFFER_UPDATE_SECNE_1    1
  971. #define VP9_PROB_BUFFER_UPDATE_SECNE_2    2
  972. #define VP9_PROB_BUFFER_UPDATE_SECNE_3    3
  973. #define VP9_PROB_BUFFER_UPDATE_SECNE_4    4
  974. #define VP9_PROB_BUFFER_UPDATE_SECNE_5    5
  975.  
  976. #define VP9_PROB_BUFFER_SAVED_NO   0
  977. #define VP9_PROB_BUFFER_SAVED_SECNE_1    1
  978. #define VP9_PROB_BUFFER_SAVED_SECNE_2    2
  979.  
  980. #define VP9_PROB_BUFFER_RESTORED_NO   0
  981. #define VP9_PROB_BUFFER_RESTORED_SECNE_1    1
  982. #define VP9_PROB_BUFFER_RESTORED_SECNE_2    2
  983. #define VP9_PROB_BUFFER_RESTORED_SECNE_MAX    (VP9_PROB_BUFFER_RESTORED_SECNE_2 + 1)
  984.  
  985. static void vp9_update_segmentId_buffer(VADriverContextP ctx,
  986.                           struct decode_state *decode_state,
  987.                           struct gen9_hcpd_context *gen9_hcpd_context, uint8_t isScaling)
  988. {
  989.     VADecPictureParameterBufferVP9 *pic_param;
  990.  
  991.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  992.     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
  993.  
  994.     int size = 0;
  995.  
  996.     if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||
  997.         pic_param->pic_fields.bits.error_resilient_mode ||
  998.         pic_param->pic_fields.bits.intra_only || isScaling) {
  999.  
  1000.         size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1;
  1001.         size<<=6;
  1002.         //VP9 Segment ID buffer needs to be zero
  1003.         dri_bo_map(gen9_hcpd_context->vp9_segment_id_buffer.bo,1);
  1004.         memset((unsigned char *)gen9_hcpd_context->vp9_segment_id_buffer.bo->virtual,0, size);
  1005.         dri_bo_unmap(gen9_hcpd_context->vp9_segment_id_buffer.bo);
  1006.     }
  1007. }
  1008.  
  1009. static void
  1010. vp9_gen_default_probabilities(VADriverContextP ctx, struct gen9_hcpd_context *gen9_hcpd_context)
  1011. {
  1012.     int i = 0;
  1013.     uint32_t size = 0;
  1014.  
  1015.     size = sizeof(FRAME_CONTEXT);
  1016.     memset(&gen9_hcpd_context->vp9_fc_key_default,0,size);
  1017.     memset(&gen9_hcpd_context->vp9_fc_inter_default,0,size);
  1018.     memset(&gen9_hcpd_context->vp9_frame_ctx,0,size*FRAME_CONTEXTS);
  1019.     //more code to come here below
  1020.  
  1021.     //1. key default
  1022.     gen9_hcpd_context->vp9_fc_key_default.tx_probs = default_tx_probs;
  1023.     //dummy 52
  1024.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs4x4, default_coef_probs_4x4);
  1025.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs8x8, default_coef_probs_8x8);
  1026.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs16x16, default_coef_probs_16x16);
  1027.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs32x32, default_coef_probs_32x32);
  1028.     //dummy 16
  1029.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.skip_probs, default_skip_probs);
  1030.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.partition_prob, vp9_kf_partition_probs);
  1031.     //dummy 47
  1032.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.uv_mode_prob, vp9_kf_uv_mode_prob);
  1033.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.seg_tree_probs, default_seg_tree_probs);
  1034.     vp9_copy(gen9_hcpd_context->vp9_fc_key_default.seg_pred_probs, default_seg_pred_probs);
  1035.  
  1036.     //2. inter default
  1037.     gen9_hcpd_context->vp9_fc_inter_default.tx_probs = default_tx_probs;
  1038.     //dummy 52
  1039.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs4x4, default_coef_probs_4x4);
  1040.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs8x8, default_coef_probs_8x8);
  1041.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs16x16, default_coef_probs_16x16);
  1042.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs32x32, default_coef_probs_32x32);
  1043.     //dummy 16
  1044.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.skip_probs, default_skip_probs);
  1045.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.inter_mode_probs, default_inter_mode_probs);
  1046.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.switchable_interp_prob, default_switchable_interp_prob);
  1047.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.intra_inter_prob, default_intra_inter_p);
  1048.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.comp_inter_prob, default_comp_inter_p);
  1049.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.single_ref_prob, default_single_ref_p);
  1050.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.comp_ref_prob, default_comp_ref_p);
  1051.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.y_mode_prob, default_if_y_probs);
  1052.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.partition_prob, default_partition_probs);
  1053.     gen9_hcpd_context->vp9_fc_inter_default.nmvc = default_nmv_context;
  1054.     //dummy 47
  1055.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.uv_mode_prob, default_if_uv_probs);
  1056.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.seg_tree_probs, default_seg_tree_probs);
  1057.     vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.seg_pred_probs, default_seg_pred_probs);
  1058.  
  1059.     for(i = 0; i < FRAME_CONTEXTS; i++)
  1060.     {
  1061.         gen9_hcpd_context->vp9_frame_ctx[i] = gen9_hcpd_context->vp9_fc_inter_default;
  1062.     }
  1063.     gen9_hcpd_context->vp9_fc = gen9_hcpd_context->vp9_fc_inter_default;
  1064.  
  1065. }
  1066.  
  1067. static void
  1068. vp9_update_probabilities(VADriverContextP ctx,
  1069.                           struct decode_state *decode_state,
  1070.                           struct gen9_hcpd_context *gen9_hcpd_context)
  1071. {
  1072.     VADecPictureParameterBufferVP9 *pic_param;
  1073.     int i = 0;
  1074.     uint8_t is_saved = VP9_PROB_BUFFER_SAVED_NO;
  1075.     uint8_t is_restored = VP9_PROB_BUFFER_RESTORED_NO;
  1076.  
  1077.     uint8_t last_frame_type = gen9_hcpd_context->last_frame.frame_type;
  1078.     uint8_t temp_frame_ctx_id;
  1079.  
  1080.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  1081.     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
  1082.     temp_frame_ctx_id = pic_param->pic_fields.bits.frame_context_idx;
  1083.  
  1084.     if(pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME)
  1085.     {
  1086.         gen9_hcpd_context->vp9_fc = gen9_hcpd_context->vp9_fc_key_default;
  1087.         gen9_hcpd_context->last_frame.prob_buffer_saved_flag = VP9_PROB_BUFFER_SAVED_NO;
  1088.         gen9_hcpd_context->last_frame.prob_buffer_restored_flag = VP9_PROB_BUFFER_RESTORED_NO;
  1089.  
  1090.     }else
  1091.     {
  1092.         gen9_hcpd_context->vp9_fc = gen9_hcpd_context->vp9_fc_inter_default;
  1093.     }
  1094.  
  1095.     // restore?
  1096.     if(gen9_hcpd_context->last_frame.prob_buffer_saved_flag == VP9_PROB_BUFFER_SAVED_SECNE_1)
  1097.     {
  1098.         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME))
  1099.         {
  1100.             //save the inter frame values for the 343 bytes
  1101.             //Update the 343 bytes of the buffer with Intra values
  1102.             is_restored = VP9_PROB_BUFFER_RESTORED_SECNE_1;
  1103.         }
  1104.     }else if(gen9_hcpd_context->last_frame.prob_buffer_saved_flag == VP9_PROB_BUFFER_SAVED_SECNE_2)
  1105.     {
  1106.         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode)
  1107.         {
  1108.             temp_frame_ctx_id = 0;
  1109.         }
  1110.  
  1111.         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME) &&
  1112.             (temp_frame_ctx_id == 0))
  1113.         {
  1114.  
  1115.             is_restored = VP9_PROB_BUFFER_RESTORED_SECNE_2;
  1116.         }
  1117.     }
  1118.  
  1119.     if(is_restored > VP9_PROB_BUFFER_RESTORED_NO && is_restored < VP9_PROB_BUFFER_RESTORED_SECNE_MAX)
  1120.     {
  1121.         memcpy(gen9_hcpd_context->vp9_frame_ctx[gen9_hcpd_context->last_frame.frame_context_idx].inter_mode_probs,gen9_hcpd_context->vp9_saved_fc.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1122.     }
  1123.  
  1124.     if((gen9_hcpd_context->last_frame.prob_buffer_restored_flag == VP9_PROB_BUFFER_RESTORED_SECNE_MAX) ||
  1125.         (gen9_hcpd_context->last_frame.refresh_frame_context && last_frame_type == HCP_VP9_KEY_FRAME && (pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME)))
  1126.     {
  1127.         if(pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME)
  1128.         {
  1129.             memcpy(gen9_hcpd_context->vp9_frame_ctx[gen9_hcpd_context->last_frame.frame_context_idx].inter_mode_probs,gen9_hcpd_context->vp9_fc_inter_default.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1130.         }
  1131.     }
  1132.     //first part buffer update: Case 1)Reset all 4 probablity buffers
  1133.    if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode)
  1134.     {
  1135.         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||
  1136.             (pic_param->pic_fields.bits.reset_frame_context == 3)||
  1137.             pic_param->pic_fields.bits.error_resilient_mode)
  1138.         {
  1139.             //perform full buffer update
  1140.             for(i = 0; i < FRAME_CONTEXTS; i++)
  1141.             {
  1142.                 memcpy(&gen9_hcpd_context->vp9_frame_ctx[i],&gen9_hcpd_context->vp9_fc_inter_default,VP9_PROB_BUFFER_FIRST_PART_SIZE);
  1143.             }
  1144.         }else if(pic_param->pic_fields.bits.reset_frame_context == 2&&pic_param->pic_fields.bits.intra_only)
  1145.         {
  1146.             memcpy(&gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx],&gen9_hcpd_context->vp9_fc_inter_default,VP9_PROB_BUFFER_FIRST_PART_SIZE);
  1147.         }
  1148.         pic_param->pic_fields.bits.frame_context_idx = 0;
  1149.     }
  1150.  
  1151.     //Full buffer update: Case 2.2)Reset only segmentation prob buffer
  1152.     if(pic_param->pic_fields.bits.segmentation_enabled &&
  1153.         pic_param->pic_fields.bits.segmentation_update_map)
  1154.     {
  1155.         for(i = 0; i < FRAME_CONTEXTS; i++)
  1156.         {
  1157.             //Reset only the segementation probability buffers
  1158.             vp9_copy(gen9_hcpd_context->vp9_frame_ctx[i].seg_tree_probs, default_seg_tree_probs);
  1159.             vp9_copy(gen9_hcpd_context->vp9_frame_ctx[i].seg_pred_probs, default_seg_pred_probs);
  1160.         }
  1161.     }
  1162.  
  1163.     //update vp9_fc according to frame_context_id
  1164.     {
  1165.         gen9_hcpd_context->vp9_fc = gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx];
  1166.     }
  1167.     //Partial Buffer Update
  1168.     //Case 1) Update top 3 probabilities only
  1169.     if(pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME)
  1170.     {
  1171.         memcpy(gen9_hcpd_context->vp9_fc.inter_mode_probs,gen9_hcpd_context->vp9_fc_key_default.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1172.         if((!pic_param->pic_fields.bits.segmentation_enabled ||
  1173.             !pic_param->pic_fields.bits.segmentation_update_map)) {
  1174.             //Update with key frame default probability values for only
  1175.             //tx_probs, coef_probs, and the next 343 bytes
  1176.             memcpy(&gen9_hcpd_context->vp9_fc,&gen9_hcpd_context->vp9_fc_key_default,VP9_PROB_BUFFER_FIRST_PART_SIZE);
  1177.         }
  1178.     }
  1179.     //Case 2) Update 343 bytes for first inter following key frame
  1180.     if( last_frame_type == HCP_VP9_KEY_FRAME &&
  1181.         (pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME)) {
  1182.         //Update with inter frame default values for the 343 bytes
  1183.         memcpy(gen9_hcpd_context->vp9_fc.inter_mode_probs,gen9_hcpd_context->vp9_fc_inter_default.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1184.     }
  1185.     //Case 2.1) Update 343 bytes for first intra-inly frame following key frame
  1186.     if( last_frame_type == HCP_VP9_KEY_FRAME &&
  1187.         pic_param->pic_fields.bits.intra_only) {
  1188.         //Update with inter frame default values for the 343 bytes
  1189.         memcpy(gen9_hcpd_context->vp9_fc.inter_mode_probs,gen9_hcpd_context->vp9_fc_key_default.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1190.     }
  1191.     //Case 3) Update only segment probabilities
  1192.     if((pic_param->pic_fields.bits.segmentation_enabled &&
  1193.         pic_param->pic_fields.bits.segmentation_update_map))
  1194.     {
  1195.         //Update seg_tree_probs and seg_pred_probs accordingly
  1196.         for (i=0; i<SEG_TREE_PROBS; i++)
  1197.         {
  1198.             gen9_hcpd_context->vp9_fc.seg_tree_probs[i] = pic_param->mb_segment_tree_probs[i];
  1199.         }
  1200.         for (i=0; i<PREDICTION_PROBS; i++)
  1201.         {
  1202.             gen9_hcpd_context->vp9_fc.seg_pred_probs[i] = pic_param->segment_pred_probs[i];
  1203.         }
  1204.     }
  1205.  
  1206.     //Case 4) Considering Intra only frame in the middle of Inter frames
  1207.     if((pic_param->pic_fields.bits.intra_only &&
  1208.         (pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME)&&
  1209.         (pic_param->pic_fields.bits.reset_frame_context==0  ||
  1210.         pic_param->pic_fields.bits.reset_frame_context==1||
  1211.         pic_param->pic_fields.bits.reset_frame_context==2||
  1212.         pic_param->pic_fields.bits.reset_frame_context==3)) &&
  1213.         (last_frame_type == HCP_VP9_INTER_FRAME))
  1214.     {
  1215.         //save the inter frame values for the 343 bytes
  1216.         //Update the 343 bytes of the buffer with Intra values
  1217.         is_saved = VP9_PROB_BUFFER_SAVED_SECNE_1;
  1218.     }
  1219.     //Case 5) Considering Intra only frame among 3 Inter frames
  1220.     if((pic_param->pic_fields.bits.intra_only &&
  1221.         (pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME)&&
  1222.         (pic_param->pic_fields.bits.reset_frame_context==2 ||
  1223.         pic_param->pic_fields.bits.frame_context_idx==1)) &&
  1224.         ((last_frame_type == HCP_VP9_INTER_FRAME) &&
  1225.         (gen9_hcpd_context->last_frame.frame_context_idx==0)))
  1226.     {
  1227.         //save the inter frame values for the 343 bytes
  1228.         //Update the 343 bytes of the buffer with Intra values
  1229.         is_saved = VP9_PROB_BUFFER_SAVED_SECNE_2;
  1230.     }
  1231.  
  1232.     if(is_saved > VP9_PROB_BUFFER_SAVED_NO)
  1233.     {
  1234.         gen9_hcpd_context->vp9_saved_fc = gen9_hcpd_context->vp9_fc;
  1235.         memcpy(gen9_hcpd_context->vp9_fc.inter_mode_probs,gen9_hcpd_context->vp9_fc_key_default.inter_mode_probs,VP9_PROB_BUFFER_KEY_INTER_SIZE);
  1236.     }else if(pic_param->pic_fields.bits.intra_only)
  1237.     {
  1238.         is_restored = VP9_PROB_BUFFER_RESTORED_SECNE_MAX;
  1239.  
  1240.     }
  1241.  
  1242.     // update after the restored
  1243.     if(gen9_hcpd_context->last_frame.prob_buffer_restored_flag == VP9_PROB_BUFFER_RESTORED_SECNE_2)
  1244.     {
  1245.         if((pic_param->pic_fields.bits.frame_type == HCP_VP9_INTER_FRAME) &&
  1246.             pic_param->pic_fields.bits.frame_context_idx==1)
  1247.         {
  1248.             memcpy(&gen9_hcpd_context->vp9_fc,&gen9_hcpd_context->vp9_fc_inter_default,VP9_PROB_BUFFER_FIRST_PART_SIZE);
  1249.         }
  1250.     }
  1251.  
  1252.     {
  1253.         dri_bo_map(gen9_hcpd_context->vp9_probability_buffer.bo,1);
  1254.         memcpy((unsigned char *)gen9_hcpd_context->vp9_probability_buffer.bo->virtual,&gen9_hcpd_context->vp9_fc,2048);
  1255.         dri_bo_unmap(gen9_hcpd_context->vp9_probability_buffer.bo);
  1256.     }
  1257.     // save the flag in order to restore or update prob buffer
  1258.     gen9_hcpd_context->last_frame.prob_buffer_saved_flag = is_saved;
  1259.     gen9_hcpd_context->last_frame.prob_buffer_restored_flag = is_restored;
  1260. }
  1261.  
  1262. static void
  1263. gen9_hcpd_init_vp9_surface(VADriverContextP ctx,
  1264.                             VADecPictureParameterBufferVP9 *pic_param,
  1265.                             struct object_surface *obj_surface,
  1266.                             struct gen9_hcpd_context *gen9_hcpd_context)
  1267. {
  1268.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  1269.     GenVP9Surface *gen9_vp9_surface;
  1270.     uint32_t size=0;
  1271.  
  1272.     if (!obj_surface)
  1273.         return;
  1274.  
  1275.     obj_surface->free_private_data = gen_free_vp9_surface;
  1276.     gen9_vp9_surface = obj_surface->private_data;
  1277.  
  1278.     if (!gen9_vp9_surface) {
  1279.         gen9_vp9_surface = calloc(sizeof(GenVP9Surface), 1);
  1280.         gen9_vp9_surface->base.frame_store_id = -1;
  1281.         obj_surface->private_data = gen9_vp9_surface;
  1282.     }
  1283.  
  1284.     //Super block size in VP9 is 64x64, size in SBs
  1285.     size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ;
  1286.     size<<=6; //CL aligned
  1287.  
  1288.     if (gen9_vp9_surface->motion_vector_temporal_bo == NULL) {
  1289.         gen9_vp9_surface->motion_vector_temporal_bo = dri_bo_alloc(i965->intel.bufmgr,
  1290.                                                                    "current motion vector temporal buffer",
  1291.                                                                     size,
  1292.                                                                     0x1000);
  1293.     }
  1294.     gen9_vp9_surface->frame_width  = pic_param->frame_width;
  1295.     gen9_vp9_surface->frame_height = pic_param->frame_height;
  1296.  
  1297. }
  1298.  
  1299. static VAStatus
  1300. gen9_hcpd_vp9_decode_init(VADriverContextP ctx,
  1301.                            struct decode_state *decode_state,
  1302.                            struct gen9_hcpd_context *gen9_hcpd_context)
  1303. {
  1304.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  1305.     VADecPictureParameterBufferVP9 *pic_param;
  1306.     struct object_surface *obj_surface;
  1307.     uint32_t size;
  1308.     int width_in_mbs=0, height_in_mbs=0;
  1309.  
  1310.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  1311.     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
  1312.  
  1313.     width_in_mbs = (pic_param->frame_width + 15) / 16;
  1314.     height_in_mbs = (pic_param->frame_height + 15) / 16;
  1315.  
  1316.     //For BXT, we support only till 4K
  1317.     assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */
  1318.     assert(height_in_mbs > 0 && height_in_mbs <= 256);
  1319.  
  1320.     //Update the frame store buffers with the reference frames information
  1321.     intel_update_vp9_frame_store_index(ctx,
  1322.                                         decode_state,
  1323.                                         pic_param,
  1324.                                         gen9_hcpd_context->reference_surfaces);
  1325.  
  1326.     /* Current decoded picture */
  1327.     obj_surface = decode_state->render_object;
  1328.     //Ensure there is a tiled render surface in NV12 format. If not, create one.
  1329.     vp9_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param);
  1330.  
  1331.  
  1332.     //Super block in VP9 is 64x64
  1333.     gen9_hcpd_context->ctb_size = 64;
  1334.     gen9_hcpd_context->min_cb_size = 8; //Min block size is 4 or 8?
  1335.  
  1336.     //If picture width/height is not multiple of 64, needs to upsize it to the next 64 pixels
  1337.     //before calculation below.
  1338.     gen9_hcpd_context->picture_width_in_ctbs  = ALIGN(pic_param->frame_width, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size;
  1339.     gen9_hcpd_context->picture_height_in_ctbs = ALIGN(pic_param->frame_height, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size;
  1340.  
  1341.     gen9_hcpd_context->picture_width_in_min_cb_minus1  = ALIGN(pic_param->frame_width, gen9_hcpd_context->min_cb_size) / gen9_hcpd_context->min_cb_size - 1;
  1342.     gen9_hcpd_context->picture_height_in_min_cb_minus1 = ALIGN(pic_param->frame_height, gen9_hcpd_context->min_cb_size) / gen9_hcpd_context->min_cb_size - 1;
  1343.  
  1344.     gen9_hcpd_context->picture_width_in_pixels  = (gen9_hcpd_context->picture_width_in_min_cb_minus1  + 1) * gen9_hcpd_context->min_cb_size ;
  1345.     gen9_hcpd_context->picture_height_in_pixels = (gen9_hcpd_context->picture_height_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ;
  1346.  
  1347.     gen9_hcpd_init_vp9_surface(ctx, pic_param, obj_surface, gen9_hcpd_context);
  1348.  
  1349.     size = gen9_hcpd_context->picture_width_in_ctbs*18; //num_width_in_SB * 18
  1350.     size<<=6;
  1351.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer), "line buffer", size);
  1352.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer), "tile line buffer", size);
  1353.  
  1354.     size = gen9_hcpd_context->picture_height_in_ctbs*17; //num_height_in_SB * 17
  1355.     size<<=6;
  1356.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer), "tile column buffer", size);
  1357.  
  1358.     size = gen9_hcpd_context->picture_width_in_ctbs*5; //num_width_in_SB * 5
  1359.     size<<=6;
  1360.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer), "metadata line buffer", size);
  1361.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer), "metadata tile line buffer", size);
  1362.  
  1363.     size = gen9_hcpd_context->picture_height_in_ctbs*5; //num_height_in_SB * 5
  1364.     size<<=6;
  1365.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer), "metadata tile column buffer", size);
  1366.  
  1367.     size =gen9_hcpd_context->picture_width_in_ctbs*1; //num_width_in_SB * 1
  1368.     size<<=6;
  1369.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->hvd_line_rowstore_buffer), "hvd line rowstore buffer", size);
  1370.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer), "hvd tile rowstore buffer", size);
  1371.  
  1372.     size = 32;
  1373.     size<<=6;
  1374.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer), "vp9 probability buffer", size);
  1375.  
  1376.     size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1;
  1377.     size<<=6;
  1378.     ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size);
  1379.  
  1380.     gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0;
  1381.     gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0;
  1382.     gen9_hcpd_context->first_inter_slice_valid = 0;
  1383.  
  1384.     return VA_STATUS_SUCCESS;
  1385. }
  1386.  
  1387. static void
  1388. gen9_hcpd_vp9_surface_state(VADriverContextP ctx,
  1389.                         struct decode_state *decode_state,
  1390.                         struct gen9_hcpd_context *gen9_hcpd_context)
  1391. {
  1392.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1393.     struct object_surface *obj_surface = decode_state->render_object;
  1394.     struct object_surface *tmp_obj_surface = NULL;
  1395.     unsigned int y_cb_offset;
  1396.     int i = 0;
  1397.  
  1398.     assert(obj_surface);
  1399.  
  1400.     y_cb_offset = obj_surface->y_cb_offset;
  1401.  
  1402.     BEGIN_BCS_BATCH(batch, 3);
  1403.  
  1404.     OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2));
  1405.     OUT_BCS_BATCH(batch,
  1406.                   (0 << 28) |                   /* surface id */
  1407.                   (obj_surface->width - 1));    /* pitch - 1 */
  1408.     OUT_BCS_BATCH(batch,
  1409.                   (SURFACE_FORMAT_PLANAR_420_8 << 28) |
  1410.                   y_cb_offset);
  1411.     ADVANCE_BCS_BATCH(batch);
  1412.  
  1413.     tmp_obj_surface = obj_surface;
  1414.  
  1415.     for(i = 0; i < 3; i++)
  1416.     {
  1417.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  1418.         if (obj_surface && obj_surface->private_data)
  1419.         {
  1420.             BEGIN_BCS_BATCH(batch, 3);
  1421.  
  1422.             OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2));
  1423.             OUT_BCS_BATCH(batch,
  1424.                 ((i + 2) << 28) |                   /* surface id */
  1425.                 (obj_surface->width - 1));    /* pitch - 1 */
  1426.             OUT_BCS_BATCH(batch,
  1427.                 (SURFACE_FORMAT_PLANAR_420_8 << 28) |
  1428.                 obj_surface->y_cb_offset);
  1429.             ADVANCE_BCS_BATCH(batch);
  1430.         }else
  1431.         {
  1432.             BEGIN_BCS_BATCH(batch, 3);
  1433.  
  1434.             OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2));
  1435.             OUT_BCS_BATCH(batch,
  1436.                 ((i + 2) << 28) |                   /* surface id */
  1437.                 (tmp_obj_surface->width - 1));    /* pitch - 1 */
  1438.             OUT_BCS_BATCH(batch,
  1439.                 (SURFACE_FORMAT_PLANAR_420_8 << 28) |
  1440.                 tmp_obj_surface->y_cb_offset);
  1441.             ADVANCE_BCS_BATCH(batch);
  1442.         }
  1443.     }
  1444. }
  1445.  
  1446. static void
  1447. gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
  1448.                               struct decode_state *decode_state,
  1449.                               struct gen9_hcpd_context *gen9_hcpd_context)
  1450. {
  1451.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1452.     struct object_surface *obj_surface;
  1453.     GenVP9Surface *gen9_vp9_surface;
  1454.     int i=0;
  1455.  
  1456.     BEGIN_BCS_BATCH(batch, 95);
  1457.  
  1458.     OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2));
  1459.  
  1460.     obj_surface = decode_state->render_object;
  1461.     assert(obj_surface && obj_surface->bo);
  1462.     gen9_vp9_surface = obj_surface->private_data;
  1463.     assert(gen9_vp9_surface && gen9_vp9_surface->motion_vector_temporal_bo);
  1464.  
  1465.     OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */
  1466.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */
  1467.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_line_buffer.bo); /* DW 7..9 */
  1468.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_column_buffer.bo); /* DW 10..12 */
  1469.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_line_buffer.bo);         /* DW 13..15 */
  1470.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_line_buffer.bo);    /* DW 16..18 */
  1471.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_column_buffer.bo);  /* DW 19..21 */
  1472.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 22..24, ignore for VP9 */
  1473.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 25..27, ignore for VP9 */
  1474.     OUT_BUFFER_MA_TARGET(NULL);    /* DW 28..30, ignore for VP9 */
  1475.     OUT_BUFFER_MA_TARGET(gen9_vp9_surface->motion_vector_temporal_bo); /* DW 31..33 */
  1476.  
  1477.     OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */
  1478.  
  1479.     /* DW 37..52 - Reference picture address */
  1480.     for (i = 0; i < 3; i++)
  1481.     {
  1482.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  1483.  
  1484.         if (obj_surface)
  1485.         {
  1486.             OUT_BUFFER_NMA_REFERENCE(obj_surface->bo);
  1487.         }
  1488.         else
  1489.             OUT_BUFFER_NMA_REFERENCE(NULL);
  1490.     }
  1491.     for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++)
  1492.     {
  1493.        OUT_BUFFER_NMA_REFERENCE(NULL);
  1494.     }
  1495.     OUT_BCS_BATCH(batch, 0);    /* DW 53, memory address attributes */
  1496.  
  1497.     OUT_BUFFER_MA_REFERENCE(NULL); /* DW 54..56, ignore for decoding mode */
  1498.     OUT_BUFFER_MA_TARGET(NULL); /* DW 57..59, StreamOutEnable - used for transcoding */
  1499.     OUT_BUFFER_MA_TARGET(NULL); /* DW 60..62, DecodedPictureStatusError, ignored */
  1500.     OUT_BUFFER_MA_TARGET(NULL); /* DW 63..65, Ignored */
  1501.  
  1502.     /* DW 66..81 - for 8 Collocated motion vectors */
  1503.     for (i = 0; i < 1; i++)
  1504.     {
  1505.         OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->last_frame.mv_temporal_buffer_bo);
  1506.     }
  1507.     for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++)
  1508.     {
  1509.         OUT_BUFFER_NMA_REFERENCE(NULL);
  1510.     }
  1511.  
  1512.     OUT_BCS_BATCH(batch, 0);    /* DW 82, memory address attributes */
  1513.  
  1514.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_probability_buffer.bo); /* DW 83..85, VP9 Probability bufffer */
  1515.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_segment_id_buffer.bo);  /* DW 86..88, VP9 Segment ID buffer */
  1516.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_line_rowstore_buffer.bo);/* DW 89..91, VP9 HVD Line Rowstore buffer */
  1517.     OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_tile_rowstore_buffer.bo);/* DW 92..94, VP9 HVD Tile Rowstore buffer */
  1518.  
  1519.     ADVANCE_BCS_BATCH(batch);
  1520.     gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = gen9_vp9_surface->motion_vector_temporal_bo;
  1521. }
  1522.  
  1523. static inline int
  1524. gen9_hcpd_vp9_valid_ref_frame_size(int ref_width, int ref_height,
  1525.                                    int cur_width, int cur_height) {
  1526.   return 2 * cur_width >= ref_width &&
  1527.          2 * cur_height >= ref_height &&
  1528.          cur_width <= 16 * ref_width &&
  1529.          cur_height <= 16 * ref_height;
  1530. }
  1531. static void
  1532. gen9_hcpd_vp9_pic_state(VADriverContextP ctx,
  1533.                        struct decode_state *decode_state,
  1534.                        struct gen9_hcpd_context *gen9_hcpd_context)
  1535. {
  1536.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1537.     VADecPictureParameterBufferVP9 *pic_param;
  1538.     struct object_surface *obj_surface;
  1539.     GenVP9Surface *gen9_vp9_surface;
  1540.     uint16_t scale_h = 0;
  1541.     uint16_t scale_w = 0;
  1542.     uint16_t frame_width_in_pixel = 0;
  1543.     uint16_t frame_height_in_pixel = 0;
  1544.     uint16_t fwidth = 64;
  1545.     uint16_t fheight = 64;
  1546.     int i;
  1547. #define LEN_COMMAND_OWN 12
  1548.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  1549.     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
  1550.  
  1551.     uint8_t segmentIDStreamInEnable = 0;
  1552.     uint8_t segmentIDStreamOutEnable = (pic_param->pic_fields.bits.segmentation_enabled && pic_param->pic_fields.bits.segmentation_update_map);
  1553.  
  1554.     // For KEY_FRAME or INTRA_ONLY frame, this bit should be set to "0".
  1555.     uint8_t segmentation_temporal_update =
  1556.     ((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || (pic_param->pic_fields.bits.intra_only)) ? 0 : pic_param->pic_fields.bits.segmentation_temporal_update;
  1557.  
  1558.  
  1559.     if(pic_param->pic_fields.bits.intra_only || (pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME))
  1560.     {
  1561.         segmentIDStreamInEnable = 1;
  1562.     }else if(pic_param->pic_fields.bits.segmentation_enabled)
  1563.     {
  1564.         if(!pic_param->pic_fields.bits.segmentation_update_map)
  1565.         {
  1566.             segmentIDStreamInEnable = 1;
  1567.  
  1568.         }else if( pic_param->pic_fields.bits.segmentation_temporal_update)
  1569.         {
  1570.             segmentIDStreamInEnable = 1;
  1571.         }
  1572.     }
  1573.  
  1574.     if(pic_param->pic_fields.bits.error_resilient_mode)
  1575.     {
  1576.         segmentIDStreamInEnable = 1;
  1577.     }
  1578.  
  1579.     //frame type of previous frame (Key or Non-Key Frame).
  1580.     uint8_t last_frame_type = gen9_hcpd_context->last_frame.frame_type;
  1581.  
  1582.     uint8_t use_pre_frame_mvs = 0;
  1583.     use_pre_frame_mvs = !((pic_param->pic_fields.bits.error_resilient_mode) ||
  1584.                                 (pic_param->frame_width != gen9_hcpd_context->last_frame.frame_width) ||
  1585.                                 (pic_param->frame_height != gen9_hcpd_context->last_frame.frame_height) ||
  1586.                                 (pic_param->pic_fields.bits.intra_only) ||
  1587.                                 (pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME)||
  1588.                                 (gen9_hcpd_context->last_frame.intra_only)||
  1589.                                 (last_frame_type == HCP_VP9_KEY_FRAME) ||
  1590.                                 (!gen9_hcpd_context->last_frame.show_frame));
  1591.  
  1592.     uint8_t adapt_probabilities_flag = 0;
  1593.     if((pic_param->pic_fields.bits.error_resilient_mode || pic_param->pic_fields.bits.frame_parallel_decoding_mode))
  1594.         adapt_probabilities_flag = 0; //0: Do not adapt (error resilient or frame_parallel_mode are set)
  1595.     else if(!(pic_param->pic_fields.bits.error_resilient_mode) && !(pic_param->pic_fields.bits.frame_parallel_decoding_mode))
  1596.         adapt_probabilities_flag = 1; //1: Adapt (not error resilient and not frame_ parallel_mode)
  1597.  
  1598.     frame_width_in_pixel  = (gen9_hcpd_context->picture_width_in_min_cb_minus1  + 1) * gen9_hcpd_context->min_cb_size ;
  1599.     frame_height_in_pixel = (gen9_hcpd_context->picture_height_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ;
  1600.  
  1601.     fwidth = (fwidth > frame_width_in_pixel)?frame_width_in_pixel:fwidth;
  1602.     fheight = (fheight > frame_height_in_pixel)?frame_height_in_pixel:fheight;
  1603.  
  1604.     BEGIN_BCS_BATCH(batch, LEN_COMMAND_OWN);
  1605.  
  1606.     OUT_BCS_BATCH(batch, HCP_VP9_PIC_STATE | (LEN_COMMAND_OWN - 2));
  1607.  
  1608.     OUT_BCS_BATCH(batch,
  1609.                   (frame_height_in_pixel - 1) << 16 |
  1610.                   (frame_width_in_pixel - 1));         /* DW 1 */
  1611.     OUT_BCS_BATCH(batch,
  1612.                   segmentIDStreamInEnable << 31 |
  1613.                   segmentIDStreamOutEnable << 30 |
  1614.                   pic_param->pic_fields.bits.lossless_flag << 29 |
  1615.                   segmentation_temporal_update << 28 |
  1616.                   pic_param->pic_fields.bits.segmentation_update_map << 27 |
  1617.                   pic_param->pic_fields.bits.segmentation_enabled << 26   |
  1618.                   pic_param->sharpness_level << 23 |
  1619.                   pic_param->filter_level << 17 |
  1620.                   pic_param->pic_fields.bits.frame_parallel_decoding_mode << 16 |
  1621.                   pic_param->pic_fields.bits.error_resilient_mode << 15 |
  1622.                   pic_param->pic_fields.bits.refresh_frame_context << 14 |
  1623.                   last_frame_type << 13 |
  1624.                   0 << 12 |   /* tx select mode */
  1625.                   0 << 11 |   /* Hybrid Prediction Mode */
  1626.                   use_pre_frame_mvs << 10 |
  1627.                   pic_param->pic_fields.bits.alt_ref_frame_sign_bias << 9 |
  1628.                   pic_param->pic_fields.bits.golden_ref_frame_sign_bias << 8 |
  1629.                   pic_param->pic_fields.bits.last_ref_frame_sign_bias << 7 |
  1630.                   pic_param->pic_fields.bits.mcomp_filter_type << 4 |
  1631.                   pic_param->pic_fields.bits.allow_high_precision_mv << 3 |
  1632.                   pic_param->pic_fields.bits.intra_only <<2 |
  1633.                   adapt_probabilities_flag << 1 |
  1634.                   pic_param->pic_fields.bits.frame_type <<0);               /* DW 2 */
  1635.     OUT_BCS_BATCH(batch,
  1636.         HCP_VP9_PROFILE0 << 28 |  /* Profile 0 only supports 8 bit 420 only */
  1637.         pic_param->log2_tile_rows << 8 |
  1638.         pic_param->log2_tile_columns <<0);                       /* DW 3 */
  1639.     // resolution change case
  1640.  
  1641.     // DW4-DW6
  1642.     for(i = 0; i < 3; i++)
  1643.     {
  1644.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  1645.         gen9_vp9_surface = NULL;
  1646.         scale_w = 0;
  1647.         scale_h = 0;
  1648.         if (obj_surface && obj_surface->private_data)
  1649.         {
  1650.             gen9_vp9_surface = obj_surface->private_data;
  1651.             if(!gen9_hcpd_vp9_valid_ref_frame_size(gen9_vp9_surface->frame_width,gen9_vp9_surface->frame_height,pic_param->frame_width,pic_param->frame_height))
  1652.             {
  1653.                 scale_w = -1;
  1654.                 scale_h = -1;
  1655.             }else
  1656.             {
  1657.                 scale_w = (gen9_vp9_surface->frame_width  << 14) /pic_param->frame_width ;
  1658.                 scale_h = (gen9_vp9_surface->frame_height << 14) /pic_param->frame_height ;
  1659.             }
  1660.             OUT_BCS_BATCH(batch,
  1661.                 scale_w<<16 |
  1662.                 scale_h);
  1663.         }else
  1664.         {
  1665.             OUT_BCS_BATCH(batch, 0);
  1666.         }
  1667.     }
  1668.  
  1669.     // DW7-DW9
  1670.     for(i = 0; i < 3; i++)
  1671.     {
  1672.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  1673.         gen9_vp9_surface = NULL;
  1674.  
  1675.         if (obj_surface && obj_surface->private_data)
  1676.         {
  1677.             gen9_vp9_surface = obj_surface->private_data;
  1678.             OUT_BCS_BATCH(batch,
  1679.                 ((gen9_vp9_surface->frame_height- 1)&0x3fff)<<16 |
  1680.                 ((gen9_vp9_surface->frame_width - 1)&0x3fff));
  1681.         }else
  1682.         {
  1683.             OUT_BCS_BATCH(batch, 0);
  1684.         }
  1685.     }
  1686.  
  1687.     OUT_BCS_BATCH(batch,
  1688.                   pic_param->first_partition_size << 16 |
  1689.                   pic_param->frame_header_length_in_bytes <<0); /* DW 10 */
  1690.     OUT_BCS_BATCH(batch,
  1691.                   (0 << 3) |
  1692.                   (0 << 2) |
  1693.                   (1 << 1) |
  1694.                   (0 << 0)); /* DW 11, ignored */
  1695.     //Rest of the DWs are not valid for BXT
  1696.     for(i = 12; i < LEN_COMMAND_OWN; i++)
  1697.     {
  1698.         OUT_BCS_BATCH(batch, 0);
  1699.     }
  1700.  
  1701.     ADVANCE_BCS_BATCH(batch);
  1702.  
  1703. }
  1704.  
  1705. static void
  1706. gen9_hcpd_vp9_segment_state(VADriverContextP ctx,
  1707.                             VADecPictureParameterBufferVP9 *pic_param,
  1708.                             VASegmentParameterVP9 *seg_param, uint8_t seg_id,
  1709.                             struct gen9_hcpd_context *gen9_hcpd_context)
  1710. {
  1711.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1712.  
  1713.     BEGIN_BCS_BATCH(batch, 7);
  1714.  
  1715.     OUT_BCS_BATCH(batch, HCP_VP9_SEGMENT_STATE | (7 - 2));
  1716.     OUT_BCS_BATCH(batch, seg_id << 0); /* DW 1 - SegmentID */
  1717.     OUT_BCS_BATCH(batch,
  1718.                   seg_param->segment_flags.fields.segment_reference_enabled << 3 |
  1719.                   seg_param->segment_flags.fields.segment_reference << 1 |
  1720.                   seg_param->segment_flags.fields.segment_reference_skipped <<0 ); /* DW 2 */
  1721.     OUT_BCS_BATCH(batch,
  1722.                   seg_param->filter_level[1][1] << 24    | //FilterLevelRef1Mode1
  1723.                   seg_param->filter_level[1][0] << 16    | //FilterLevelRef1Mode0
  1724.                   seg_param->filter_level[0][1] << 8     | //FilterLevelRef0Mode1
  1725.                   seg_param->filter_level[0][0] << 0 );     //FilterLevelRef0Mode0 /* DW 3 */
  1726.     OUT_BCS_BATCH(batch,
  1727.                   seg_param->filter_level[3][1] << 24    | //FilterLevelRef3Mode1
  1728.                   seg_param->filter_level[3][0] << 16    | //FilterLevelRef3Mode0
  1729.                   seg_param->filter_level[2][1] << 8     | //FilterLevelRef2Mode1
  1730.                   seg_param->filter_level[2][0] << 0 );    //FilterLevelRef2Mode0 /* DW 4 */
  1731.     OUT_BCS_BATCH(batch,
  1732.                   seg_param->luma_ac_quant_scale << 16   |
  1733.                   seg_param->luma_dc_quant_scale << 0 );    /* DW 5 */
  1734.     OUT_BCS_BATCH(batch,
  1735.                   seg_param->chroma_ac_quant_scale << 16 |
  1736.                   seg_param->chroma_dc_quant_scale << 0 );  /* DW 6 */
  1737.  
  1738.     ADVANCE_BCS_BATCH(batch);
  1739.  
  1740. }
  1741.  
  1742. static void
  1743. gen9_hcpd_vp9_bsd_object(VADriverContextP ctx,
  1744.                      VADecPictureParameterBufferVP9 *pic_param,
  1745.                      VASliceParameterBufferVP9 *slice_param,
  1746.                      struct gen9_hcpd_context *gen9_hcpd_context)
  1747. {
  1748.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1749.     int slice_data_size   = slice_param->slice_data_size - pic_param->frame_header_length_in_bytes;
  1750.     int slice_data_offset = slice_param->slice_data_offset + pic_param->frame_header_length_in_bytes;
  1751.  
  1752.     BEGIN_BCS_BATCH(batch, 3);
  1753.  
  1754.     OUT_BCS_BATCH(batch, HCP_BSD_OBJECT | (3 - 2));
  1755.  
  1756.     OUT_BCS_BATCH(batch, slice_data_size );
  1757.     OUT_BCS_BATCH(batch, slice_data_offset);
  1758.  
  1759.     ADVANCE_BCS_BATCH(batch);
  1760.  
  1761. }
  1762.  
  1763. static VAStatus
  1764. gen9_hcpd_vp9_decode_picture(VADriverContextP ctx,
  1765.                               struct decode_state *decode_state,
  1766.                               struct gen9_hcpd_context *gen9_hcpd_context)
  1767. {
  1768.     VAStatus vaStatus;
  1769.     struct i965_driver_data *i965 = i965_driver_data(ctx);
  1770.     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
  1771.     VADecPictureParameterBufferVP9 *pic_param;
  1772.     VASliceParameterBufferVP9 *slice_param;
  1773.     dri_bo *slice_data_bo;
  1774.     int i = 0, num_segments=0, isScaling=0;
  1775.     struct object_surface *obj_surface;
  1776.     GenVP9Surface *gen9_vp9_surface;
  1777.     vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context);
  1778.  
  1779.     if (vaStatus != VA_STATUS_SUCCESS)
  1780.         goto out;
  1781.  
  1782.     assert(decode_state->pic_param && decode_state->pic_param->buffer);
  1783.     pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer;
  1784.  
  1785.     //****And set the isScaling value accordingly******
  1786.     isScaling = 0;
  1787.     for(i = 0; i < 3; i++)
  1788.     {
  1789.         obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface;
  1790.         gen9_vp9_surface = NULL;
  1791.         if (obj_surface && obj_surface->private_data)
  1792.         {
  1793.             gen9_vp9_surface = obj_surface->private_data;
  1794.             isScaling |= (gen9_vp9_surface->frame_width == pic_param->frame_width &&
  1795.                 gen9_vp9_surface->frame_height == pic_param->frame_height)? 0:1;
  1796.         }
  1797.     }
  1798.  
  1799.     //Update segment id buffer if needed
  1800.     vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context, isScaling);
  1801.     //Update probability buffer if needed
  1802.     vp9_update_probabilities(ctx, decode_state, gen9_hcpd_context);
  1803.  
  1804.     if (i965->intel.has_bsd2)
  1805.         intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000, BSD_RING0);
  1806.     else
  1807.         intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
  1808.     intel_batchbuffer_emit_mi_flush(batch);
  1809.  
  1810.     gen9_hcpd_pipe_mode_select(ctx, decode_state, HCP_CODEC_VP9, gen9_hcpd_context);
  1811.     //Not sure what the surface id value should be: Gold? ALtRef? PrevRef? or Just RefPic?
  1812.     gen9_hcpd_vp9_surface_state(ctx, decode_state, gen9_hcpd_context);
  1813.  
  1814.     //Only one VASliceParameterBufferVP9 should be sent per frame
  1815.     assert(decode_state->slice_params && decode_state->slice_params[0]->buffer);
  1816.     slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer;
  1817.     slice_data_bo = decode_state->slice_datas[0]->bo;
  1818.  
  1819.     gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context);
  1820.  
  1821.     gen9_hcpd_vp9_pipe_buf_addr_state(ctx, decode_state, gen9_hcpd_context);
  1822.     //If segmentation is disabled, only SegParam[0] is valid,
  1823.     //all others should be populated with 0
  1824.     if(!pic_param->pic_fields.bits.segmentation_enabled)
  1825.         num_segments = 1;
  1826.     else  //If segmentation is enabled, all 8 entries should be valid.
  1827.         num_segments = 8;
  1828.  
  1829.     for(i=0; i<num_segments; i++) {
  1830.         VASegmentParameterVP9 seg_param = slice_param->seg_param[i];
  1831.         gen9_hcpd_vp9_segment_state(ctx, pic_param, &seg_param, i, gen9_hcpd_context);
  1832.     }
  1833.  
  1834.     gen9_hcpd_vp9_pic_state(ctx, decode_state, gen9_hcpd_context);
  1835.  
  1836.     gen9_hcpd_vp9_bsd_object(ctx, pic_param, slice_param, gen9_hcpd_context);
  1837.  
  1838.     // keep track of the last frame status
  1839.     gen9_hcpd_context->last_frame.frame_width = pic_param->frame_width;
  1840.     gen9_hcpd_context->last_frame.frame_height = pic_param->frame_height;
  1841.     gen9_hcpd_context->last_frame.show_frame = pic_param->pic_fields.bits.show_frame;
  1842.     gen9_hcpd_context->last_frame.frame_type = pic_param->pic_fields.bits.frame_type;
  1843.     gen9_hcpd_context->last_frame.refresh_frame_context = pic_param->pic_fields.bits.refresh_frame_context;
  1844.     gen9_hcpd_context->last_frame.frame_context_idx = pic_param->pic_fields.bits.frame_context_idx;
  1845.     gen9_hcpd_context->last_frame.intra_only = pic_param->pic_fields.bits.intra_only;
  1846.  
  1847.     // update prob buffer to vp9_fc;
  1848.  
  1849.     intel_batchbuffer_end_atomic(batch);
  1850.     intel_batchbuffer_flush(batch);
  1851.  
  1852.     //update vp9_frame_ctx according to frame_context_id
  1853.     if (pic_param->pic_fields.bits.refresh_frame_context)
  1854.     {
  1855.         //update vp9_fc to frame_context
  1856.         dri_bo_map(gen9_hcpd_context->vp9_probability_buffer.bo,1);
  1857.         memcpy(&gen9_hcpd_context->vp9_fc,(unsigned char *)gen9_hcpd_context->vp9_probability_buffer.bo->virtual,2048);
  1858.         dri_bo_unmap(gen9_hcpd_context->vp9_probability_buffer.bo);
  1859.         gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx] = gen9_hcpd_context->vp9_fc;
  1860.  
  1861.     }
  1862.  
  1863. out:
  1864.     return vaStatus;
  1865. }
  1866.  
  1867.  
  1868. static VAStatus
  1869. gen9_hcpd_decode_picture(VADriverContextP ctx,
  1870.                          VAProfile profile,
  1871.                          union codec_state *codec_state,
  1872.                          struct hw_context *hw_context)
  1873. {
  1874.     struct gen9_hcpd_context *gen9_hcpd_context = (struct gen9_hcpd_context *)hw_context;
  1875.     struct decode_state *decode_state = &codec_state->decode;
  1876.     VAStatus vaStatus;
  1877.  
  1878.     assert(gen9_hcpd_context);
  1879.  
  1880.     vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state);
  1881.  
  1882.     if (vaStatus != VA_STATUS_SUCCESS)
  1883.         goto out;
  1884.  
  1885.     switch (profile) {
  1886.     case VAProfileHEVCMain:
  1887.     case VAProfileHEVCMain10:
  1888.         vaStatus = gen9_hcpd_hevc_decode_picture(ctx, decode_state, gen9_hcpd_context);
  1889.         break;
  1890.     case VAProfileVP9Profile0:
  1891.         vaStatus = gen9_hcpd_vp9_decode_picture(ctx, decode_state, gen9_hcpd_context);
  1892.         break;
  1893.  
  1894.     default:
  1895.         /* should never get here 1!! */
  1896.         assert(0);
  1897.         break;
  1898.     }
  1899.  
  1900. out:
  1901.     return vaStatus;
  1902. }
  1903.  
  1904. static void
  1905. gen9_hcpd_context_destroy(void *hw_context)
  1906. {
  1907.     struct gen9_hcpd_context *gen9_hcpd_context = (struct gen9_hcpd_context *)hw_context;
  1908.  
  1909.     FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer));
  1910.     FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer));
  1911.     FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer));
  1912.     FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer));
  1913.     FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer));
  1914.     FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer));
  1915.     FREE_GEN_BUFFER((&gen9_hcpd_context->sao_line_buffer));
  1916.     FREE_GEN_BUFFER((&gen9_hcpd_context->sao_tile_line_buffer));
  1917.     FREE_GEN_BUFFER((&gen9_hcpd_context->sao_tile_column_buffer));
  1918.     FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_line_rowstore_buffer));
  1919.     FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer));
  1920.     FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer));
  1921.     FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer));
  1922.  
  1923.     intel_batchbuffer_free(gen9_hcpd_context->base.batch);
  1924.     free(gen9_hcpd_context);
  1925. }
  1926.  
  1927. static void
  1928. gen9_hcpd_hevc_context_init(VADriverContextP ctx,
  1929.                             struct gen9_hcpd_context *gen9_hcpd_context)
  1930. {
  1931.     hevc_gen_default_iq_matrix(&gen9_hcpd_context->iq_matrix_hevc);
  1932. }
  1933.  
  1934. static void
  1935. gen9_hcpd_vp9_context_init(VADriverContextP ctx,
  1936.                             struct gen9_hcpd_context *gen9_hcpd_context)
  1937. {
  1938.     int default_value = 255;
  1939.  
  1940.     gen9_hcpd_context->last_frame.frame_height  = 0;
  1941.     gen9_hcpd_context->last_frame.show_frame    = 0;
  1942.     gen9_hcpd_context->last_frame.frame_type    = 0;
  1943.     gen9_hcpd_context->last_frame.refresh_frame_context = default_value;
  1944.     gen9_hcpd_context->last_frame.frame_context_idx = default_value;
  1945.     gen9_hcpd_context->last_frame.intra_only = 0;
  1946.     gen9_hcpd_context->last_frame.prob_buffer_saved_flag = 0;
  1947.     gen9_hcpd_context->last_frame.prob_buffer_restored_flag = 0;
  1948.     gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = NULL;
  1949.  
  1950.     vp9_gen_default_probabilities(ctx, gen9_hcpd_context);
  1951. }
  1952.  
  1953. static struct hw_context *
  1954. gen9_hcpd_context_init(VADriverContextP ctx, struct object_config *object_config)
  1955. {
  1956.     struct intel_driver_data *intel = intel_driver_data(ctx);
  1957.     struct gen9_hcpd_context *gen9_hcpd_context = calloc(1, sizeof(struct gen9_hcpd_context));
  1958.     int i;
  1959.  
  1960.     if (!gen9_hcpd_context)
  1961.         return NULL;
  1962.  
  1963.     gen9_hcpd_context->base.destroy = gen9_hcpd_context_destroy;
  1964.     gen9_hcpd_context->base.run = gen9_hcpd_decode_picture;
  1965.     gen9_hcpd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_VEBOX, 0);
  1966.  
  1967.     for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) {
  1968.         gen9_hcpd_context->reference_surfaces[i].surface_id = VA_INVALID_ID;
  1969.         gen9_hcpd_context->reference_surfaces[i].frame_store_id = -1;
  1970.         gen9_hcpd_context->reference_surfaces[i].obj_surface = NULL;
  1971.     }
  1972.  
  1973.     switch (object_config->profile) {
  1974.     case VAProfileHEVCMain:
  1975.     case VAProfileHEVCMain10:
  1976.         gen9_hcpd_hevc_context_init(ctx, gen9_hcpd_context);
  1977.         break;
  1978.     case VAProfileVP9Profile0:
  1979.         gen9_hcpd_vp9_context_init(ctx, gen9_hcpd_context);
  1980.         break;
  1981.  
  1982.     default:
  1983.         break;
  1984.     }
  1985.  
  1986.     return (struct hw_context *)gen9_hcpd_context;
  1987. }
  1988.  
  1989. struct hw_context *
  1990. gen9_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config)
  1991. {
  1992.     if (obj_config->profile == VAProfileHEVCMain ||
  1993.         obj_config->profile == VAProfileHEVCMain10 ||
  1994.         obj_config->profile == VAProfileVP9Profile0) {
  1995.         return gen9_hcpd_context_init(ctx, obj_config);
  1996.     } else {
  1997.         return gen8_dec_hw_context_init(ctx, obj_config);
  1998.     }
  1999. }
  2000.