Rev 812 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 812 | Rev 877 | ||
|---|---|---|---|
| Line 313... | Line 313... | ||
| 313 | 313 | ||
| Line 314... | Line 314... | ||
| 314 | RHDPtr FindPciDevice() |
314 | RHDPtr FindPciDevice() |
| 315 | { |
315 | { |
| 316 | const PciChipset_t *dev; |
316 | const PciChipset_t *dev; |
| 317 | u32 bus, last_bus; |
317 | u32_t bus, last_bus; |
| Line 318... | Line 318... | ||
| 318 | 318 | ||
| 319 | if( (last_bus = PciApi(1))==-1) |
319 | if( (last_bus = PciApi(1))==-1) |
| Line 320... | Line 320... | ||
| 320 | return 0; |
320 | return 0; |
| 321 | 321 | ||
| 322 | for(bus=0;bus<=last_bus;bus++) |
322 | for(bus=0;bus<=last_bus;bus++) |
| Line 323... | Line 323... | ||
| 323 | { |
323 | { |
| 324 | u32 devfn; |
324 | u32_t devfn; |
| 325 | 325 | ||
| 326 | for(devfn=0;devfn<256;devfn++) |
326 | for(devfn=0;devfn<256;devfn++) |
| Line 327... | Line 327... | ||
| 327 | { |
327 | { |
| 328 | u32 id; |
328 | u32_t id; |
| Line 329... | Line 329... | ||
| 329 | id = PciRead32(bus,devfn, 0); |
329 | id = PciRead32(bus,devfn, 0); |
| 330 | 330 | ||
| 331 | if( (CARD16)id != VENDOR_ATI) |
331 | if( (u16_t)id != VENDOR_ATI) |
| 332 | continue; |
332 | continue; |
| Line 333... | Line 333... | ||
| 333 | 333 | ||
| Line 334... | Line 334... | ||
| 334 | if( (dev=PciDevMatch(id>>16,RHDPCIchipsets))!=NULL) |
334 | if( (dev=PciDevMatch(id>>16,RHDPCIchipsets))!=NULL) |
| Line 350... | Line 350... | ||
| 350 | rhd.subdevice_id = reg2C >> 16; |
350 | rhd.subdevice_id = reg2C >> 16; |
| 351 | 351 | ||
| Line 352... | Line 352... | ||
| 352 | for (i = 0; i < 6; i++) |
352 | for (i = 0; i < 6; i++) |
| 353 | { |
353 | { |
| 354 | CARD32 base; |
354 | u32_t base; |
| 355 | Bool validSize; |
355 | Bool validSize; |
| Line 356... | Line 356... | ||
| 356 | 356 | ||
| 357 | base = PciRead32(bus,devfn, PCI_MAP_REG_START + (i << 2)); |
357 | base = PciRead32(bus,devfn, PCI_MAP_REG_START + (i << 2)); |
| 358 | if(base) |
358 | if(base) |
| 359 | { |
359 | { |
| 360 | if (base & PCI_MAP_IO) |
360 | if (base & PCI_MAP_IO) |
| 361 | { |
361 | { |
| 362 | rhd.ioBase[i] = (CARD32)PCIGETIO(base); |
362 | rhd.ioBase[i] = (u32_t)PCIGETIO(base); |
| 363 | rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK; |
363 | rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK; |
| 364 | } |
364 | } |
| 365 | else |
365 | else |
| 366 | { |
366 | { |
| 367 | rhd.memBase[i] = (CARD32)PCIGETMEMORY(base); |
367 | rhd.memBase[i] = (u32_t)PCIGETMEMORY(base); |
| 368 | rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK; |
368 | rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK; |
| 369 | } |
369 | } |
| 370 | } |
370 | } |
| 371 | rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize); |
371 | rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize); |
| Line 378... | Line 378... | ||
| 378 | }; |
378 | }; |
| 379 | return NULL; |
379 | return NULL; |
| 380 | } |
380 | } |
| 381 | 381 | ||
| Line 382... | Line 382... | ||
| 382 | const PciChipset_t *PciDevMatch(CARD16 dev,const PciChipset_t *list) |
382 | const PciChipset_t *PciDevMatch(u16_t dev,const PciChipset_t *list) |
| 383 | { |
383 | { |
| 384 | while(list->device) |
384 | while(list->device) |
| 385 | { |
385 | { |
| 386 | if(dev==list->device) |
386 | if(dev==list->device) |
| 387 | return list; |
387 | return list; |
| Line 390... | Line 390... | ||
| 390 | return 0; |
390 | return 0; |
| 391 | } |
391 | } |
| 392 | 392 | ||
| Line 393... | Line 393... | ||
| 393 | 393 | ||
| 394 | CARD32 pciGetBaseSize(int bus, int devfn, int index, Bool destructive, Bool *min) |
394 | u32_t pciGetBaseSize(int bus, int devfn, int index, Bool destructive, Bool *min) |
| 395 | { |
395 | { |
| 396 | int offset; |
396 | int offset; |
| 397 | CARD32 addr1; |
397 | u32_t addr1; |
| 398 | CARD32 addr2; |
398 | u32_t addr2; |
| 399 | CARD32 mask1; |
399 | u32_t mask1; |
| 400 | CARD32 mask2; |
400 | u32_t mask2; |
| Line 401... | Line 401... | ||
| 401 | int bits = 0; |
401 | int bits = 0; |
| 402 | 402 | ||
| 403 | /* |
403 | /* |