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Rev 883 Rev 885
Line 301... Line 301...
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     rhd.ring_rp = rhd.ring_wp = INREG(RADEON_CP_RB_RPTR);
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     rhd.ring_rp = rhd.ring_wp = INREG(RADEON_CP_RB_RPTR);
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     rhd.host_rp =  rhd.ring_rp;
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     rhd.host_rp =  rhd.ring_rp;
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     OUTREG(RADEON_CP_RB_WPTR,rhd.ring_rp);
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     OUTREG(RADEON_CP_RB_WPTR,rhd.ring_rp);
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     tmp = (((u32_t)&rhd.host_rp) & 4095) + GetPgAddr(&rhd.host_rp);
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     tmp = (((u32_t)&rhd.host_rp) & 4095) + GetPgAddr((void*)&rhd.host_rp);
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	 *
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	 *
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	 * We simply put this behind the ring read pointer, this works
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	 * We simply put this behind the ring read pointer, this works
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	 * with PCI GART as well as (whatever kind of) AGP GART
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	 * with PCI GART as well as (whatever kind of) AGP GART
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	 */
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	 */
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     tmp = (((u32_t)&rhd.scratch0) & 4095) + GetPgAddr(&rhd.scratch0);
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     tmp = (((u32_t)&rhd.scratch0) & 4095) + GetPgAddr((void*)&rhd.scratch0);
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     OUTREG(RADEON_SCRATCH_ADDR, tmp);
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     OUTREG(RADEON_SCRATCH_ADDR, tmp);
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    COMMIT_RING();
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    COMMIT_RING();
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    safe_sti(ifl);
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    safe_sti(ifl);
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-
 
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    radeon_do_wait_for_idle();
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    dbgprintf("run cp  RPTR= %d\n", INREG(RADEON_CP_RB_RPTR) );
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    radeon_do_wait_for_idle();
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};
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};
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    /* setup the raster pipes */
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    /* setup the raster pipes */
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     init_pipes(&rhd);
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     init_pipes(&rhd);
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-
 
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     rhd.ring_rp = rhd.ring_wp = INREG(RADEON_CP_RB_RPTR);
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     dbgprintf("ring wp= %x\n",rhd.ring_wp);
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     rhd.ring_rp = rhd.ring_wp = INREG(RADEON_CP_RB_RPTR);
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     OUTREG(RADEON_CP_RB_WPTR, rhd.ring_rp);
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     OUTREG(RADEON_CP_RB_WPTR, rhd.ring_rp);