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Rev 810 Rev 811
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int Blit(blit_t *blit);
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int Blit(blit_t *blit);
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# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
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# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
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#	define RADEON_GMC_DST_PITCH_OFFSET_CNTL	(1 << 1)
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#	define RADEON_GMC_DST_PITCH_OFFSET_CNTL	(1 << 1)
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#	define RADEON_GMC_BRUSH_SOLID_COLOR	(13 << 4)
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# define RADEON_GMC_BRUSH_SOLID_COLOR     (13 << 4)
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#	define RADEON_GMC_BRUSH_NONE		(15 << 4)
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# define RADEON_GMC_BRUSH_NONE            (15 << 4)
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#	define RADEON_GMC_DST_16BPP		(4 << 8)
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# define RADEON_GMC_DST_16BPP             (4 << 8)
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#	define RADEON_GMC_DST_24BPP		(5 << 8)
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# define RADEON_GMC_DST_24BPP             (5 << 8)
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#	define RADEON_GMC_DST_32BPP		(6 << 8)
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# define RADEON_GMC_DST_32BPP             (6 << 8)
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#	define RADEON_GMC_DST_DATATYPE_SHIFT	8
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# define RADEON_GMC_DST_DATATYPE_SHIFT     8
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#	define RADEON_GMC_SRC_DATATYPE_COLOR	(3 << 12)
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# define RADEON_GMC_SRC_DATATYPE_COLOR    (3 << 12)
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#	define RADEON_DP_SRC_SOURCE_MEMORY	(2 << 24)
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# define RADEON_DP_SRC_SOURCE_MEMORY      (2 << 24)
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#	define RADEON_DP_SRC_SOURCE_HOST_DATA	(3 << 24)
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# define RADEON_DP_SRC_SOURCE_HOST_DATA   (3 << 24)
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#	define RADEON_GMC_CLR_CMP_CNTL_DIS	(1 << 28)
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# define RADEON_GMC_CLR_CMP_CNTL_DIS      (1 << 28)
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#	define RADEON_GMC_WR_MSK_DIS		(1 << 30)
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# define RADEON_GMC_WR_MSK_DIS            (1 << 30)
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#	define RADEON_ROP3_S			0x00cc0000
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# define RADEON_ROP3_S                 0x00cc0000
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# define RADEON_ROP3_P      0x00f00000
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# define RADEON_ROP3_P                 0x00f00000
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#define RADEON_CP_PACKET0              0x00000000
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#define RADEON_CP_PACKET1              0x40000000
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#define RADEON_CP_PACKET2              0x80000000
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#define RADEON_CP_PACKET3              0xC0000000
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#define RADEON_CP_PACKET3              0xC0000000
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# define RADEON_CNTL_PAINT             0x00009100
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# define RADEON_CNTL_PAINT             0x00009100
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# define RADEON_CNTL_BITBLT            0x00009200
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# define RADEON_CNTL_BITBLT            0x00009200
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# define RADEON_CNTL_PAINT_POLYLINE    0x00009500
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# define RADEON_CNTL_PAINT_MULTI       0x00009A00
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#define CP_PACKET0(reg, n)            \
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	(RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
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#define CP_PACKET1(reg0, reg1)            \
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	(RADEON_CP_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2))
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# define RADEON_CNTL_PAINT_POLYLINE    0x00009500
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#define CP_PACKET2()              \
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# define RADEON_CNTL_PAINT_MULTI       0x00009A00
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  (RADEON_CP_PACKET2)
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#define CP_PACKET3( pkt, n )            \
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#define CP_PACKET3( pkt, n )            \
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	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
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	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
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#define BEGIN_RING( n ) do {            \
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  ring = rhd.ring_base;                 \
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#define BEGIN_RING( n ) do {            \
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  write = rhd.ring_wp;                  \
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  ring = rhd.ring_base;                 \
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} while (0)
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#define ADVANCE_RING()
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#define OUT_RING( x ) do {        \
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	ring[write++] = (x);						\
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} while (0)
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  write = rhd.ring_wp;                  \
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} while (0)
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#define OUT_RING_REG(reg, val)            \
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do {									\
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#define OUT_RING( x ) do {        \
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    OUT_RING(CP_PACKET0(reg, 0));					\