WebSVN – Kolibri OS – Diff – /kernel/trunk/drivers/unisound.asm


format MS COFF
 
 
include 'proc32.inc'
 
DEBUG	    equ 1
 
REMAP_IRQ   equ 0
 
;irq 0,1,2,8,12,13 íåäîñòóïíû
;               FEDCBA9876543210
VALID_IRQ   equ 1100111011111000b
ATTCH_IRQ   equ 0000111010101000b
 
IRQ_LINE    equ 0
 
CPU_FREQ    equ  2600d
 
BIT0  EQU 0x00000001
BIT1  EQU 0x00000002
BIT2  EQU 0x00000004
BIT3  EQU 0x00000008
BIT4  EQU 0x00000010
BIT5  EQU 0x00000020
BIT6  EQU 0x00000040
BIT7  EQU 0x00000080
BIT8  EQU 0x00000100
BIT9  EQU 0x00000200
BIT10 EQU 0x00000400
BIT11 EQU 0x00000800
BIT12 EQU 0x00001000
BIT13 EQU 0x00002000
BIT14 EQU 0x00004000
BIT15 EQU 0x00008000
BIT16 EQU 0x00010000
BIT17 EQU 0x00020000
BIT18 EQU 0x00040000
BIT19 EQU 0x00080000
BIT20 EQU 0x00100000
BIT21 EQU 0x00200000
BIT22 EQU 0x00400000
BIT23 EQU 0x00800000
BIT24 EQU 0x00100000
BIT25 EQU 0x02000000
BIT26 EQU 0x04000000
BIT27 EQU 0x08000000
BIT28 EQU 0x10000000
BIT29 EQU 0x20000000
BIT30 EQU 0x40000000
BIT31 EQU 0x80000000
 
VID_INTEL	  equ 0x8086
VID_NVIDIA        equ 0x10DE
 
CTRL_ICH	  equ 0x2415
CTRL_ICH0	  equ 0x2425
CTRL_ICH2	  equ 0x2435
CTRL_ICH3	  equ 0x2445
CTRL_ICH4	  equ 0x24C5
CTRL_ICH5	  equ 0x24D5
CTRL_ICH6	  equ 0x266E
CTRL_ICH7	  equ 0x27DE
 
CTRL_NFORCE       equ 0x01B1
CTRL_NFORCE2      equ 0x006A
CTRL_NFORCE3      equ 0x00DA
CTRL_MCP04        equ 0x003A
CTRL_CK804        equ 0x0059
CTRL_CK8          equ 0x008A
CTRL_CK8S         equ 0x00EA
CTRL_MCP51        equ 0x026B
 
 
PCM_OUT_BDL	  equ  0x10	 ; PCM out buffer descriptors list
PCM_OUT_CR_REG	  equ  0x1b	 ; PCM out Control Register
PCM_OUT_LVI_REG   equ  0x15	 ; PCM last valid index
PCM_OUT_SR_REG	  equ  0x16	 ; PCM out Status register
PCM_OUT_PIV_REG   equ  0x1a
PCM_OUT_CIV_REG   equ  0x14	 ; PCM out current index
 
PCM_IN_CR_REG	  equ  0x0b	 ; PCM in Control Register
MC_IN_CR_REG	  equ  0x2b	 ; MIC in Control Register
RR		  equ  BIT1	 ; reset registers.  Nukes all regs
 
CODEC_MASTER_VOL_REG		equ	0x02
CODEC_AUX_VOL			equ	0x04	;
CODEC_PCM_OUT_REG		equ	18h	; PCM output volume
CODEC_EXT_AUDIO_REG		equ	28h	; extended audio
CODEC_EXT_AUDIO_CTRL_REG	equ	2ah	; extended audio control
CODEC_PCM_FRONT_DACRATE_REG	equ	2ch	; PCM out sample rate
CODEC_PCM_SURND_DACRATE_REG	equ	2eh	; surround sound sample rate
CODEC_PCM_LFE_DACRATE_REG	equ	30h	; LFE sample rate
 
GLOB_CTRL      equ  0x2C	;   Global Control
CTRL_STAT	equ  0x30	 ;   Global Status
CTRL_CAS	equ  0x34	 ;   Codec Access Semiphore
 
CAS_FLAG	equ  0x01	 ;   Codec Access Semiphore Bit
 
CTRL_ST_CREADY	equ  BIT8+BIT9+BIT28 ;   Primary Codec Ready
 
CTRL_ST_RCS	equ  0x00008000  ;   Read Completion Status
 
CTRL_CNT_CRIE	equ  BIT4+BIT5+BIT6  ;   Codecs Resume Interrupt Enable
CTRL_CNT_AC_OFF equ  0x00000008  ;   ACLINK Off
CTRL_CNT_WARM	equ  0x00000004  ;   AC97 Warm Reset
CTRL_CNT_COLD	equ  0x00000002  ;   AC97 Cold Reset
CTRL_CNT_GIE	equ  0x00000001  ;   GPI Interrupt Enable
 
CODEC_REG_POWERDOWN   equ 0x26
CODEC_REG_ST	      equ 0x26
 
DEV_PLAY	      equ  1
DEV_STOP	      equ  2
DEV_CALLBACK	      equ  3
DEV_SET_BUFF	      equ  4
DEV_NOTIFY	      equ  5
DEV_SET_MASTERVOL     equ  6
DEV_GET_MASTERVOL     equ  7
DEV_GET_INFO	      equ  8
 
struc AC_CNTRL		    ;AC controller base class
{ .bus                dd ?
  .devfn              dd ?
 
  .vendor             dd ?
  .dev_id             dd ?
  .pci_cmd            dd ?
  .pci_stat           dd ?
 
  .codec_io_base      dd ?
  .codec_mem_base     dd ?
 
  .ctrl_io_base       dd ?
  .ctrl_mem_base      dd ?
  .cfg_reg            dd ?
  .int_line           dd ?
 
  .vendor_ids         dd ?    ;vendor id string
  .ctrl_ids           dd ?    ;hub id string
 
  .buffer             dd ?
 
  .notify_pos         dd ?
  .notify_task        dd ?
 
  .lvi_reg            dd ?
  .ctrl_setup         dd ?
  .user_callback      dd ?
  .codec_read16       dd ?
  .codec_write16      dd ?
 
  .ctrl_read8         dd ?
  .ctrl_read16        dd ?
  .ctrl_read32        dd ?
 
  .ctrl_write8        dd ?
  .ctrl_write16       dd ?
  .ctrl_write32       dd ?
}
 
struc CODEC		   ;Audio Chip base class
{
  .chip_id            dd ?
  .flags              dd ?
  .status             dd ?
 
  .ac_vendor_ids      dd ?    ;ac vendor id string
  .chip_ids           dd ?    ;chip model string
 
  .shadow_flag        dd ?
                      dd ?
 
  .regs               dw ?     ; codec registers
  .reg_master_vol     dw ?     ;0x02
  .reg_aux_out_vol    dw ?     ;0x04
  .reg_mone_vol       dw ?     ;0x06
  .reg_master_tone    dw ?     ;0x08
  .reg_beep_vol       dw ?     ;0x0A
  .reg_phone_vol      dw ?     ;0x0C
  .reg_mic_vol        dw ?     ;0x0E
  .reg_line_in_vol    dw ?     ;0x10
  .reg_cd_vol         dw ?     ;0x12
  .reg_video_vol      dw ?     ;0x14
  .reg_aux_in_vol     dw ?     ;0x16
  .reg_pcm_out_vol    dw ?     ;0x18
  .reg_rec_select     dw ?     ;0x1A
  .reg_rec_gain       dw ?     ;0x1C
  .reg_rec_gain_mic   dw ?     ;0x1E
  .reg_gen            dw ?     ;0x20
  .reg_3d_ctrl        dw ?     ;0X22
  .reg_page           dw ?     ;0X24
  .reg_powerdown      dw ?     ;0x26
  .reg_ext_audio      dw ?     ;0x28
  .reg_ext_st         dw ?     ;0x2a
  .reg_pcm_front_rate dw ?     ;0x2c
  .reg_pcm_surr_rate  dw ?     ;0x2e
  .reg_lfe_rate       dw ?     ;0x30
  .reg_pcm_in_rate    dw ?     ;0x32
                      dw ?     ;0x34
  .reg_cent_lfe_vol   dw ?     ;0x36
  .reg_surr_vol       dw ?     ;0x38
  .reg_spdif_ctrl     dw ?     ;0x3A
                      dw ?     ;0x3C
                      dw ?     ;0x3E
                      dw ?     ;0x40
                      dw ?     ;0x42
                      dw ?     ;0x44
                      dw ?     ;0x46
                      dw ?     ;0x48
                      dw ?     ;0x4A
                      dw ?     ;0x4C
                      dw ?     ;0x4E
                      dw ?     ;0x50
                      dw ?     ;0x52
                      dw ?     ;0x54
                      dw ?     ;0x56
                      dw ?     ;0x58
                      dw ?     ;0x5A
                      dw ?     ;0x5C
                      dw ?     ;0x5E
  .reg_page_0         dw ?     ;0x60
  .reg_page_1         dw ?     ;0x62
  .reg_page_2         dw ?     ;0x64
  .reg_page_3         dw ?     ;0x66
  .reg_page_4         dw ?     ;0x68
  .reg_page_5         dw ?     ;0x6A
  .reg_page_6         dw ?     ;0x6C
  .reg_page_7         dw ?     ;0x6E
                      dw ?     ;0x70
                      dw ?     ;0x72
                      dw ?     ;0x74
                      dw ?     ;0x76
                      dw ?     ;0x78
                      dw ?     ;0x7A
  .reg_vendor_id_1    dw ?     ;0x7C
  .reg_vendor_id_2    dw ?     ;0x7E
 
 
  .reset              dd ?    ;virual
  .set_master_vol     dd ?
}
 
struc CTRL_INFO
{   .pci_cmd	    dd	?
    .irq	    dd	?
    .glob_cntrl     dd	?
    .glob_sta	    dd	?
    .codec_io_base  dd	?
    .ctrl_io_base   dd	?
    .codec_mem_base dd	?
    .ctrl_mem_base  dd	?
    .codec_id       dd  ?
}
 
struc IOCTL
{  .handle           dd ?
   .io_code          dd ?
   .input            dd ?
   .inp_size         dd ?
   .output           dd ?
   .out_size         dd ?
}
 
virtual at 0
  IOCTL IOCTL
end virtual
 
EVENT_NOTIFY	      equ 0x00000200
 
OS_BASE 	      equ 0;  0x80400000
new_app_base	      equ 0x60400000;   0x01000000
PROC_BASE	      equ OS_BASE+0x0080000
 
public START
public STOP
public service_proc
 
extrn AttachIntHandler
extrn SysMsgBoardStr
extrn PciApi
extrn PciRead32
extrn PciRead8
extrn PciWrite8
extrn AllocKernelSpace
extrn MapPage
extrn RegService
extrn KernelAlloc
extrn GetPgAddr
extrn GetCurrentTask
 
section '.flat' code readable align 16
 
START:
     if DEBUG
	   mov esi, msgInit
           call SysMsgBoardStr
     end if
 
	   call detect_controller
	   test eax, eax
           jz .fail
 
     if DEBUG
	   mov esi,[ctrl.vendor_ids]
           call SysMsgBoardStr
	   mov	  esi, [ctrl.ctrl_ids]
           call SysMsgBoardStr
 
     end if
 
           call init_controller
           test eax, eax
           jz .fail
 
     if DEBUG
           mov esi, msgInitCodec
           call SysMsgBoardStr
     end if
 
           call init_codec
           test eax, eax
           jz .fail
 
     if DEBUG
	   mov esi, [codec.ac_vendor_ids]
           call SysMsgBoardStr
 
	   mov esi, [codec.chip_ids]
           call SysMsgBoardStr
     end if
 
           call reset_controller
           call setup_codec
 
           mov esi, msgPrimBuff
           call SysMsgBoardStr
 
           call create_primary_buff
 
;     if REMAP_IRQ
 
;           call get_LPC_bus
;           cmp eax, -1
;           jz .fail
 
;           mov [lpc_bus], 0  ;eax
;           call remap_irq
;     end if
 
           mov eax, VALID_IRQ
           mov ebx, [ctrl.int_line]
           mov esi, msgInvIRQ
           bt eax, ebx
           jnc .fail
           mov eax, ATTCH_IRQ
           mov esi, msgAttchIRQ
           bt eax, ebx
           jnc .fail
 
           stdcall AttachIntHandler, ebx, ac97_irq
           stdcall RegService, sz_sound_srv, service_proc
	   ret
.fail:
     if DEBUG
	   mov esi, msgFail
           call SysMsgBoardStr
     end if
	   xor eax, eax
STOP:
           ret
 
handle     equ  IOCTL.handle
io_code    equ  IOCTL.io_code
input      equ  IOCTL.input
inp_size   equ  IOCTL.inp_size
output     equ  IOCTL.output
out_size   equ  IOCTL.out_size
 
align 4
proc service_proc stdcall, ioctl:dword
 
           mov edi, [ioctl]
           mov eax, [edi+io_code]
	   cmp eax, DEV_PLAY
	   jne @F
     if DEBUG
	   mov esi, msgPlay
           call SysMsgBoardStr
     end if
	   call play
	   ret
@@:
	   cmp eax, DEV_STOP
	   jne @F
     if DEBUG
	   mov esi, msgStop
           call SysMsgBoardStr
     end if
	   call stop
	   ret
@@:
	   cmp eax, DEV_CALLBACK
	   jne @F
           mov ebx, [edi+input]
           stdcall set_callback, [ebx]
	   ret
@@:
	   cmp eax, DEV_SET_MASTERVOL
	   jne @F
           mov ebx, [edi+input]
           stdcall set_master_vol, [ebx]
	   ret
@@:
	   cmp eax, DEV_GET_MASTERVOL
	   jne @F
           mov ebx, [edi+output]
           test ebx, ebx
           jz .fail
 
           stdcall get_master_vol, ebx
	   ret
@@:
	   cmp eax, DEV_GET_INFO
	   jne @F
           mov ebx, [edi+output]
	   stdcall get_dev_info, ebx
	   ret
@@:
.fail:
	   xor eax, eax
	   ret
endp
 
restore   handle
restore   io_code
restore   input
restore   inp_size
restore   output
restore   out_size
 
 
align 4
proc remap_irq                         ;for Intel chipsets ONLY !!!
	   mov eax, VALID_IRQ
	   bt eax, IRQ_LINE
	   jnc .exit
 
	   mov edx, 0x4D0
	   in ax,dx
	   bts ax, IRQ_LINE
	   out dx, aX
 
           stdcall PciWrite8, dword 0, dword 0xF8, dword 0x61, dword IRQ_LINE
	   mov [ctrl.int_line], IRQ_LINE
 
.exit:
	   ret
endp
 
align 4
proc ac97_irq
 
;     if DEBUG
;           mov esi, msgIRQ
;           call SysMsgBoardStr
;     end if
 
	   mov edx, PCM_OUT_CR_REG
	   mov al, 0x14
	   call [ctrl.ctrl_write8]
 
	   mov ax, 0x1c
	   mov edx, PCM_OUT_SR_REG
	   call [ctrl.ctrl_write16]
 
	   mov edx, PCM_OUT_CIV_REG
	   call [ctrl.ctrl_read8]
 
	   and eax, 0x1F
	   cmp eax, [civ_val]
	   je .skip
 
	   mov [civ_val], eax
	   dec eax
	   and eax, 0x1F
	   mov [ctrl.lvi_reg], eax
 
	   mov edx, PCM_OUT_LVI_REG
	   call [ctrl.ctrl_write8]
 
	   mov edx, PCM_OUT_CR_REG
	   mov ax, 0x1D
	   call [ctrl.ctrl_write8]
 
	   mov eax, [civ_val]
	   add eax, 2
	   and eax, 31
	   mov ebx, dword [buff_list+eax*4]
 
	   cmp [ctrl.user_callback], 0
	   je @f
 
	   stdcall [ctrl.user_callback], ebx
@@:
	   ret
 
.skip:
	   mov edx, PCM_OUT_CR_REG
	   mov ax, 0x1D
	   call [ctrl.ctrl_write8]
	   ret
endp
 
align 4
proc create_primary_buff
 
           stdcall KernelAlloc, 0x10000
	   mov [ctrl.buffer], eax
 
	   mov edi, eax
	   mov ecx, 0x10000/4
	   xor eax, eax
           cld
	   rep stosd
 
           stdcall GetPgAddr, [ctrl.buffer]
 
	   mov ebx, 0xC0002000
	   mov ecx, 4
	   mov edi, pcmout_bdl
@@:
	   mov [edi], eax
	   mov [edi+4], ebx
 
	   mov [edi+32], eax
	   mov [edi+4+32], ebx
 
	   mov [edi+64], eax
	   mov [edi+4+64], ebx
 
	   mov [edi+96], eax
	   mov [edi+4+96], ebx
 
	   mov [edi+128], eax
	   mov [edi+4+128], ebx
 
	   mov [edi+160], eax
	   mov [edi+4+160], ebx
 
	   mov [edi+192], eax
	   mov [edi+4+192], ebx
 
	   mov [edi+224], eax
	   mov [edi+4+224], ebx
 
	   add eax, 0x4000
	   add edi, 8
	   loop @B
 
	   mov edi, buff_list
	   mov eax, [ctrl.buffer]
	   mov ecx, 4
@@:
	   mov [edi], eax
	   mov [edi+16], eax
	   mov [edi+32], eax
	   mov [edi+48], eax
	   mov [edi+64], eax
	   mov [edi+80], eax
	   mov [edi+96], eax
	   mov [edi+112], eax
 
	   add eax, 0x4000
	   add edi, 4
	   loop @B
 
	   mov ecx, pcmout_bdl
           stdcall GetPgAddr, ecx
	   and ecx, 0xFFF
	   add eax, ecx
 
	   mov edx, PCM_OUT_BDL
	   call [ctrl.ctrl_write32]
 
	   mov eax, 16
	   mov [ctrl.lvi_reg], eax
	   mov edx, PCM_OUT_LVI_REG
	   call [ctrl.ctrl_write8]
 
	   ret
endp
 
align 4
proc detect_controller
	   locals
	     last_bus dd ?
	     bus      dd ?
	     devfn    dd ?
	   endl
 
	   xor eax, eax
	   mov [bus], eax
	   inc eax
           call PciApi
	   cmp eax, -1
	   je .err
 
	   mov [last_bus], eax
 
.next_bus:
	   and [devfn], 0
.next_dev:
           stdcall PciRead32, [bus], [devfn], dword 0
	   test eax, eax
	   jz .next
	   cmp eax, -1
	   je .next
 
	   mov edi, devices
@@:
	   mov ebx, [edi]
	   test ebx, ebx
	   jz .next
 
	   cmp eax, ebx
	   je .found
	   add edi, 12
	   jmp @B
 
.next:	   inc [devfn]
	   cmp [devfn], 256
	   jb  .next_dev
	   mov eax, [bus]
	   inc eax
	   mov [bus], eax
	   cmp eax, [last_bus]
	   jna .next_bus
	   xor eax, eax
	   ret
.found:
	   mov ebx, [bus]
	   mov [ctrl.bus], ebx
 
	   mov ecx, [devfn]
	   mov [ctrl.devfn], ecx
 
	   mov edx, eax
	   and edx, 0xFFFF
	   mov [ctrl.vendor], edx
	   shr eax, 16
	   mov [ctrl.dev_id], eax
 
	   mov ebx, [edi+4]
	   mov [ctrl.ctrl_ids], ebx
	   mov esi, [edi+8]
	   mov [ctrl.ctrl_setup], esi
 
           cmp ebx, VID_INTEL
           jne @F
	   mov [ctrl.vendor_ids], msg_Intel
           ret
@@:
           cmp ebx, VID_NVIDIA
           jne @F
           mov [ctrl.vendor_ids], msg_NVidia
@@:
           mov [ctrl.vendor_ids], 0     ;something  wrong ?
	   ret
.err:
	   xor eax, eax
	   ret
endp
 
align 4
proc get_LPC_bus                ;for Intel chipsets ONLY !!!
	   locals
	     last_bus dd ?
	     bus      dd ?
	   endl
 
	   xor eax, eax
	   mov [bus], eax
	   inc eax
	   call [PciApi]
	   cmp eax, -1
	   je .err
 
	   mov [last_bus], eax
.next_bus:
           stdcall PciRead32, [bus], dword 0xF8, dword 0
	   test eax, eax
	   jz .next
	   cmp eax, -1
	   je .next
 
	   cmp eax, 0x24D08086
	   je .found
.next:
	   mov eax, [bus]
	   inc eax
	   cmp eax, [last_bus]
	   mov [bus], eax
	   jna .next_bus
.err:
	   xor eax, eax
	   dec eax
	   ret
.found:
	   mov eax, [bus]
	   ret
endp
 
align 4
proc init_controller
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
	   mov ebx, eax
	   and eax, 0xFFFF
	   mov [ctrl.pci_cmd], eax
	   shr ebx, 16
	   mov [ctrl.pci_stat], ebx
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
	   and eax,0xFFFE
	   mov [ctrl.codec_io_base], eax
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
	   and eax, 0xFFC0
	   mov [ctrl.ctrl_io_base], eax
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x18
	   mov [ctrl.codec_mem_base], eax
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x1C
	   mov [ctrl.ctrl_mem_base], eax
 
           stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
	   and eax, 0xFF
	   mov [ctrl.int_line], eax
 
           stdcall PciRead8, [ctrl.bus], [ctrl.devfn], dword 0x41
	   and eax, 0xFF
	   mov [ctrl.cfg_reg], eax
 
	   call [ctrl.ctrl_setup]
	   xor eax, eax
	   inc eax
	   ret
endp
 
align 4
proc set_ICH
	   mov [ctrl.codec_read16],  codec_io_r16    ;virtual
	   mov [ctrl.codec_write16], codec_io_w16    ;virtual
 
	   mov [ctrl.ctrl_read8 ],  ctrl_io_r8	     ;virtual
	   mov [ctrl.ctrl_read16],  ctrl_io_r16      ;virtual
	   mov [ctrl.ctrl_read32],  ctrl_io_r32      ;virtual
 
	   mov [ctrl.ctrl_write8 ], ctrl_io_w8	     ;virtual
	   mov [ctrl.ctrl_write16], ctrl_io_w16      ;virtual
	   mov [ctrl.ctrl_write32], ctrl_io_w32      ;virtual
	   ret
endp
 
PG_SW                equ 0x003
PG_NOCACHE           equ 0x018
 
align 4
proc set_ICH4
           stdcall AllocKernelSpace, dword 0x2000
	   mov edi, eax
           stdcall MapPage, edi,[ctrl.codec_mem_base],PG_SW+PG_NOCACHE
	   mov [ctrl.codec_mem_base], edi
	   add edi, 0x1000
           stdcall MapPage, edi, [ctrl.ctrl_mem_base],PG_SW+PG_NOCACHE
	   mov [ctrl.ctrl_mem_base], edi
 
	   mov [ctrl.codec_read16],  codec_mem_r16    ;virtual
	   mov [ctrl.codec_write16], codec_mem_w16    ;virtual
 
	   mov [ctrl.ctrl_read8 ],  ctrl_mem_r8       ;virtual
	   mov [ctrl.ctrl_read16],  ctrl_mem_r16      ;virtual
	   mov [ctrl.ctrl_read32],  ctrl_mem_r32      ;virtual
 
	   mov [ctrl.ctrl_write8 ], ctrl_mem_w8       ;virtual
	   mov [ctrl.ctrl_write16], ctrl_mem_w16      ;virtual
	   mov [ctrl.ctrl_write32], ctrl_mem_w32      ;virtual
	   ret
endp
 
align 4
proc reset_controller
 
	   xor eax, eax
	   mov edx, PCM_IN_CR_REG
	   call [ctrl.ctrl_write8]
 
	   mov edx, PCM_OUT_CR_REG
	   call [ctrl.ctrl_write8]
 
	   mov edx, MC_IN_CR_REG
	   call [ctrl.ctrl_write8]
 
	   mov eax, RR
	   mov edx, PCM_IN_CR_REG
	   call [ctrl.ctrl_write8]
 
	   mov edx, PCM_OUT_CR_REG
	   call [ctrl.ctrl_write8]
 
	   mov	edx, MC_IN_CR_REG
	   call [ctrl.ctrl_write8]
 
	   ret
endp
 
align 4
proc init_codec
	   locals
	     counter dd ?
	   endl
 
	   call reset_codec
	   and eax, eax
	   jz .err
 
	   xor edx, edx 		  ;ac_reg_0
	   call [ctrl.codec_write16]
 
	   xor eax, eax
	   mov edx, CODEC_REG_POWERDOWN
	   call [ctrl.codec_write16]
 
	   mov [counter], 200	    ; total 200*5 ms = 1s
.wait:
	   mov edx, CODEC_REG_POWERDOWN
	   call [ctrl.codec_read16]
	   and eax, 0x0F
	   cmp eax, 0x0F
	   jz .ready
 
	   mov eax, 5000	  ; wait 5 ms
	   call StallExec
	   sub [counter] , 1
	   jnz .wait
.err:
	   xor eax, eax        ; timeout error
	   ret
.ready:
	   call detect_codec
 
	   xor eax, eax
	   inc eax
	   ret
endp
 
align 4
proc reset_codec
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_read32]
 
           test eax, 0x02
           jz .cold
 
           call warm_reset
           jnc .ok
.cold:
	   call cold_reset
	   jnc .ok
 
     if DEBUG
	   mov esi, msgCFail
           call SysMsgBoardStr
     end if
	   xor eax, eax 	   ; timeout error
	   ret
.ok:
     if DEBUG
           mov esi, msgResetOk
           call SysMsgBoardStr
     end if
 
           xor eax, eax
	   inc eax
	   ret
endp
 
align 4
proc warm_reset
	   locals
	     counter dd ?
	   endl
 
	   mov eax, 0x06
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_write32]
 
     if DEBUG
	   mov esi, msgWarm
           call SysMsgBoardStr
     end if
 
	   mov [counter], 10	   ; total 10*100 ms = 1s
.wait:
	   mov eax, 100000	   ; wait 100 ms
	   call StallExec
 
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_read32]
	   test eax, 4
	   jz .ok
	   sub [counter], 1
	   jnz .wait
 
     if DEBUG
	   mov esi, msgWRFail
           call SysMsgBoardStr
     end if
 
	   stc
	   ret
.ok:
	   mov edx, CTRL_STAT
	   call [ctrl.ctrl_read32]
	   and eax, CTRL_ST_CREADY
           jz .fail
           clc
	   ret
.fail:
           stc
	   ret
endp
 
align 4
proc cold_reset
	   locals
	     counter dd ?
	   endl
 
	   xor eax, eax
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_write32]
 
     if DEBUG
	   mov esi, msgCold
           call SysMsgBoardStr
     end if
 
	   mov eax, 1000000	   ; wait 1 s
	   call StallExec
 
	   mov eax, 2
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_write32]
 
	   mov [counter], 10	   ; total 10*100 ms = 1s
.wait:
	   mov eax, 100000	   ; wait 100 ms
	   call StallExec
 
	   mov edx, GLOB_CTRL
	   call [ctrl.ctrl_read32]
	   test eax, 4
	   jz .ok
	   sub [counter], 1
	   jnz .wait
 
     if DEBUG
	   mov esi, msgCRFail
           call SysMsgBoardStr
     end if
	   stc
	   ret
.ok:
	   mov edx, CTRL_STAT
	   call [ctrl.ctrl_read32]
	   and eax, CTRL_ST_CREADY
           jz .fail
           clc
	   ret
.fail:
           stc
	   ret
endp
 
align 4
proc play
 
	   mov eax, 16
	   mov [ctrl.lvi_reg], eax
	   mov edx, PCM_OUT_LVI_REG
	   call [ctrl.ctrl_write8]
 
	   mov edx, PCM_OUT_CR_REG
	   mov ax, 0x1D
	   call [ctrl.ctrl_write8]
	   ret
endp
 
align 4
proc stop
	   mov edx, PCM_OUT_CR_REG
	   mov ax, 0x14
	   call [ctrl.ctrl_write8]
 
	   mov eax, 16
	   mov [ctrl.lvi_reg], eax
	   mov edx, PCM_OUT_LVI_REG
	   call [ctrl.ctrl_write8]
 
	   ret
endp
 
align 4
proc get_dev_info stdcall, p_info:dword
	   virtual at esi
	     CTRL_INFO CTRL_INFO
	   end virtual
 
	   mov esi, [p_info]
	   mov eax, [ctrl.int_line]
	   mov ebx, [ctrl.codec_io_base]
	   mov ecx, [ctrl.ctrl_io_base]
	   mov edx, [ctrl.codec_mem_base]
	   mov edi, [ctrl.ctrl_mem_base]
 
	   mov [CTRL_INFO.irq], eax
	   mov [CTRL_INFO.codec_io_base], ebx
	   mov [CTRL_INFO.ctrl_io_base], ecx
	   mov [CTRL_INFO.codec_mem_base], edx
	   mov [CTRL_INFO.ctrl_mem_base], edi
 
           mov eax, [codec.chip_id]
           mov [CTRL_INFO.codec_id], eax
 
	   mov edx, GLOB_CTRL
           call [ctrl.ctrl_read32]
	   mov [CTRL_INFO.glob_cntrl], eax
 
	   mov edx, CTRL_STAT
           call [ctrl.ctrl_read32]
	   mov [CTRL_INFO.glob_sta], eax
 
	   mov ebx, [ctrl.pci_cmd]
	   mov [CTRL_INFO.pci_cmd], ebx
 
	   ret
endp
 
align 4
proc set_callback stdcall, handler:dword
	   mov eax, [handler]
	   mov [ctrl.user_callback], eax
	   ret
endp
 
align 4
proc codec_read stdcall, ac_reg:dword	   ; reg = edx, reval = eax
 
	   mov edx, [ac_reg]
 
	   mov ebx, edx
	   shr ebx, 1
	   bt [codec.shadow_flag], ebx
	   jc .use_shadow
 
	   call [ctrl.codec_read16]  ;change edx !!!
	   mov ecx, eax
 
	   mov edx, CTRL_STAT
	   call [ctrl.ctrl_read32]
	   test eax, CTRL_ST_RCS
	   jz .read_ok
 
	   mov edx, CTRL_STAT
	   call [ctrl.ctrl_write32]
	   xor eax,eax
	   not eax		;timeout
	   ret
.read_ok:
	   mov edx, [ac_reg]
	   mov [codec.regs+edx], cx
	   bts [codec.shadow_flag], ebx
	   mov eax, ecx
	   ret
.use_shadow:
	   movzx eax, word [codec.regs+edx]
	   ret
endp
 
align 4
proc codec_write stdcall, ac_reg:dword
	   push eax
	   call check_semafore
	   and eax, eax
	   jz .err
	   pop eax
 
	   mov esi, [ac_reg]
	   mov edx, esi
	   call [ctrl.codec_write16]
	   mov [codec.regs+esi], ax
	   shr esi, 1
	   bts [codec.shadow_flag], esi
	   ret
.err:
	   pop eax
	   ret
endp
 
align 4
proc codec_check_ready
 
	  mov edx, CTRL_ST
	  call [ctrl.ctrl_read32]
	  and eax, CTRL_ST_CREADY
	  jz .not_ready
 
	  xor eax, wax
	  inc eax
	  ret
 
align 4
.not_ready:
	  xor eax, eax
	  ret
endp
 
align 4
proc check_semafore
	   local counter:DWORD
 
	   mov [counter], 100
.l1:
	   mov edx, CTRL_CAS
	   call [ctrl.ctrl_read8]
	   and eax, CAS_FLAG
	   jz .ok
 
	   mov eax, 1
	   call StallExec
	   sub [counter], 1
	   jnz .l1
	   xor eax, eax
	   ret
align 4
.ok:
	   xor eax,eax
	   inc eax
	   ret
endp
 
align 4
proc StallExec
	   push ecx
	   push edx
	   push ebx
	   push eax
 
	   mov ecx, CPU_FREQ
	   mul ecx
	   mov ebx, eax       ;low
	   mov ecx, edx       ;high
	   rdtsc
	   add ebx, eax
	   adc ecx,edx
@@:
	   rdtsc
	   sub eax, ebx
	   sbb edx, ecx
	   jb @B
 
	   pop eax
	   pop ebx
	   pop edx
	   pop ecx
	   ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;          CONTROLLER IO functions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
proc codec_io_r16
	add edx, [ctrl.codec_io_base]
	in  ax, dx
	ret
endp
 
align 4
proc codec_io_w16
	add edx, [ctrl.codec_io_base]
	out dx, ax
	ret
endp
 
align 4
proc ctrl_io_r8
	add edx, [ctrl.ctrl_io_base]
	in  al, dx
	ret
endp
 
align 4
proc ctrl_io_r16
	add edx, [ctrl.ctrl_io_base]
	in  ax, dx
	ret
endp
 
align 4
proc ctrl_io_r32
	add edx, [ctrl.ctrl_io_base]
	in  eax, dx
	ret
endp
 
align 4
proc ctrl_io_w8
	add edx, [ctrl.ctrl_io_base]
	out dx, al
	ret
endp
 
align 4
proc ctrl_io_w16
	add edx, [ctrl.ctrl_io_base]
	out dx, ax
	ret
endp
 
align 4
proc ctrl_io_w32
	add edx, [ctrl.ctrl_io_base]
	out dx, eax
	ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;         MEMORY MAPPED IO    (os depended)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
proc codec_mem_r16
	add edx, [ctrl.codec_mem_base]
	mov ax, word [edx]
	ret
endp
 
align 4
proc codec_mem_w16
	add edx, [ctrl.codec_mem_base]
	mov word [edx], ax
	ret
endp
 
align 4
proc ctrl_mem_r8
	add edx, [ctrl.ctrl_mem_base]
	mov al, [edx]
	ret
endp
 
align 4
proc ctrl_mem_r16
	add edx, [ctrl.ctrl_mem_base]
	mov ax, [edx]
	ret
endp
 
align 4
proc ctrl_mem_r32
	add edx, [ctrl.ctrl_mem_base]
	mov eax, [edx]
	ret
endp
 
align 4
proc ctrl_mem_w8
	add edx, [ctrl.ctrl_mem_base]
	mov [edx], al
 
	ret
endp
 
align 4
proc ctrl_mem_w16
	add edx, [ctrl.ctrl_mem_base]
	mov [edx], ax
	ret
endp
 
align 4
proc ctrl_mem_w32
	add edx, [ctrl.ctrl_mem_base]
	mov [edx], eax
	ret
endp
 
 
include "codec.inc"
 
align 4
devices dd (CTRL_ICH  shl 16)+VID_INTEL,msg_ICH, set_ICH
	dd (CTRL_ICH0 shl 16)+VID_INTEL,msg_ICH0,set_ICH
	dd (CTRL_ICH2 shl 16)+VID_INTEL,msg_ICH2,set_ICH
	dd (CTRL_ICH3 shl 16)+VID_INTEL,msg_ICH3,set_ICH
        dd (CTRL_ICH4 shl 16)+VID_INTEL,msg_ICH4,set_ICH4
        dd (CTRL_ICH5 shl 16)+VID_INTEL,msg_ICH5,set_ICH4
        dd (CTRL_ICH6 shl 16)+VID_INTEL,msg_ICH6,set_ICH4
        dd (CTRL_ICH7 shl 16)+VID_INTEL,msg_ICH7,set_ICH4
 
        dd (CTRL_NFORCE  shl 16)+VID_NVIDIA,msg_NForce, set_ICH
        dd (CTRL_NFORCE2 shl 16)+VID_NVIDIA,msg_NForce2,set_ICH
        dd (CTRL_NFORCE3 shl 16)+VID_NVIDIA,msg_NForce3,set_ICH
        dd (CTRL_MCP04   shl 16)+VID_NVIDIA,msg_MCP04,set_ICH
        dd (CTRL_CK804   shl 16)+VID_NVIDIA,msg_CK804,set_ICH
        dd (CTRL_CK8     shl 16)+VID_NVIDIA,msg_CK8,set_ICH
        dd (CTRL_CK8S    shl 16)+VID_NVIDIA,msg_CK8S,set_ICH
        dd (CTRL_MCP51   shl 16)+VID_NVIDIA,msg_MCP51,set_ICH
 
        dd 0    ;terminator
 
msg_ICH      db 'Intel ICH',  13,10, 0
msg_ICH0     db 'Intel ICH0', 13,10, 0
msg_ICH2     db 'Intel ICH2', 13,10, 0
msg_ICH3     db 'Intel ICH3', 13,10, 0
msg_ICH4     db 'Intel ICH4', 13,10, 0
msg_ICH5     db 'Intel ICH5', 13,10, 0
msg_ICH6     db 'Intel ICH6', 13,10, 0
msg_ICH7     db 'Intel ICH7', 13,10, 0
msg_Intel    db 'Intel Corp. ', 0
 
msg_NForce   db 'NForce',      13,10, 0
msg_NForce2  db 'NForce 2',    13,10, 0
msg_NForce3  db 'NForce 3',    13,10, 0
msg_MCP04    db 'NForce MCP04',13,10, 0
msg_CK804    db 'NForce CK804',13,10, 0
msg_CK8      db 'NForce CK8',  13,10, 0
msg_CK8S     db 'NForce CK8S', 13,10, 0
msg_MCP51    db 'NForce MCP51',13,10, 0
 
msg_NVidia   db 'NVidia', 0
 
szKernel	    db 'KERNEL', 0
sz_sound_srv	    db 'SOUND',0
 
msgInit      db 'detect hardware...',13,10,0
msgFail      db 'device not found',13,10,0
msgAttchIRQ  db 'IRQ line not supported', 13,10, 0
msgInvIRQ    db 'IRQ line not assigned or invalid', 13,10, 0
msgPlay      db 'start play', 13,10,0
msgStop      db 'stop play',  13,10,0
msgNotify    db 'call notify',13,10,0
msgIRQ	     db 'AC97 IRQ', 13,10,0
msgInitCtrl  db 'init controller',13,10,0
msgInitCodec db 'init codec',13,10,0
msgPrimBuff  db 'create primary buffer',13,10,0
msgReg	     db 'set service handler',13,10,0
msgOk	     db 'service installed',13,10,0
msgCold      db 'cold reset',13,10,0
msgWarm      db 'warm reset',13,10,0
msgWRFail    db 'warm reset failed',13,10,0
msgCRFail    db 'cold reset failed',13,10,0
msgCFail     db 'codec not ready',13,10,0
msgResetOk   db 'reset complete',13,10,0
 
section '.data' data readable writable align 16
 
pcmout_bdl       rq 32
buff_list        rd 32
 
codec CODEC
ctrl AC_CNTRL
 
lpc_bus  rd 1
civ_val  rd 1

Rev 188	Rev 198
1	format MS COFF	1	format MS COFF
2		2
3		3
4	include 'proc32.inc'	4	include 'proc32.inc'
5		5
6	DEBUG equ 1	6	DEBUG equ 1
7		7
8	REMAP_IRQ equ 0	8	REMAP_IRQ equ 0
9		9
10	;irq 0,1,2,8,12,13 íåäîñòóïíû	10	;irq 0,1,2,8,12,13 íåäîñòóïíû
11	; FEDCBA9876543210	11	; FEDCBA9876543210
12	VALID_IRQ equ 1100111011111000b	12	VALID_IRQ equ 1100111011111000b
13	ATTCH_IRQ equ 0000111010101000b	13	ATTCH_IRQ equ 0000111010101000b
14		14
15	IRQ_LINE equ 0	15	IRQ_LINE equ 0
16		16
17	CPU_FREQ equ 2600d	17	CPU_FREQ equ 2600d
18		18
19	BIT0 EQU 0x00000001	19	BIT0 EQU 0x00000001
20	BIT1 EQU 0x00000002	20	BIT1 EQU 0x00000002
21	BIT2 EQU 0x00000004	21	BIT2 EQU 0x00000004
22	BIT3 EQU 0x00000008	22	BIT3 EQU 0x00000008
23	BIT4 EQU 0x00000010	23	BIT4 EQU 0x00000010
24	BIT5 EQU 0x00000020	24	BIT5 EQU 0x00000020
25	BIT6 EQU 0x00000040	25	BIT6 EQU 0x00000040
26	BIT7 EQU 0x00000080	26	BIT7 EQU 0x00000080
27	BIT8 EQU 0x00000100	27	BIT8 EQU 0x00000100
28	BIT9 EQU 0x00000200	28	BIT9 EQU 0x00000200
29	BIT10 EQU 0x00000400	29	BIT10 EQU 0x00000400
30	BIT11 EQU 0x00000800	30	BIT11 EQU 0x00000800
31	BIT12 EQU 0x00001000	31	BIT12 EQU 0x00001000
32	BIT13 EQU 0x00002000	32	BIT13 EQU 0x00002000
33	BIT14 EQU 0x00004000	33	BIT14 EQU 0x00004000
34	BIT15 EQU 0x00008000	34	BIT15 EQU 0x00008000
35	BIT16 EQU 0x00010000	35	BIT16 EQU 0x00010000
36	BIT17 EQU 0x00020000	36	BIT17 EQU 0x00020000
37	BIT18 EQU 0x00040000	37	BIT18 EQU 0x00040000
38	BIT19 EQU 0x00080000	38	BIT19 EQU 0x00080000
39	BIT20 EQU 0x00100000	39	BIT20 EQU 0x00100000
40	BIT21 EQU 0x00200000	40	BIT21 EQU 0x00200000
41	BIT22 EQU 0x00400000	41	BIT22 EQU 0x00400000
42	BIT23 EQU 0x00800000	42	BIT23 EQU 0x00800000
43	BIT24 EQU 0x00100000	43	BIT24 EQU 0x00100000
44	BIT25 EQU 0x02000000	44	BIT25 EQU 0x02000000
45	BIT26 EQU 0x04000000	45	BIT26 EQU 0x04000000
46	BIT27 EQU 0x08000000	46	BIT27 EQU 0x08000000
47	BIT28 EQU 0x10000000	47	BIT28 EQU 0x10000000
48	BIT29 EQU 0x20000000	48	BIT29 EQU 0x20000000
49	BIT30 EQU 0x40000000	49	BIT30 EQU 0x40000000
50	BIT31 EQU 0x80000000	50	BIT31 EQU 0x80000000
51		51
52	VID_INTEL equ 0x8086	52	VID_INTEL equ 0x8086
53	VID_NVIDIA equ 0x10DE	53	VID_NVIDIA equ 0x10DE
54		54
55	CTRL_ICH equ 0x2415	55	CTRL_ICH equ 0x2415
56	CTRL_ICH0 equ 0x2425	56	CTRL_ICH0 equ 0x2425
57	CTRL_ICH2 equ 0x2435	57	CTRL_ICH2 equ 0x2435
58	CTRL_ICH3 equ 0x2445	58	CTRL_ICH3 equ 0x2445
59	CTRL_ICH4 equ 0x24C5	59	CTRL_ICH4 equ 0x24C5
60	CTRL_ICH5 equ 0x24D5	60	CTRL_ICH5 equ 0x24D5
61	CTRL_ICH6 equ 0x266E	61	CTRL_ICH6 equ 0x266E
62	CTRL_ICH7 equ 0x27DE	62	CTRL_ICH7 equ 0x27DE
63		63
64	CTRL_NFORCE equ 0x01B1	64	CTRL_NFORCE equ 0x01B1
65	CTRL_NFORCE2 equ 0x006A	65	CTRL_NFORCE2 equ 0x006A
66	CTRL_NFORCE3 equ 0x00DA	66	CTRL_NFORCE3 equ 0x00DA
67		67	CTRL_MCP04 equ 0x003A
-		68	CTRL_CK804 equ 0x0059
-		69	CTRL_CK8 equ 0x008A
-		70	CTRL_CK8S equ 0x00EA
-		71	CTRL_MCP51 equ 0x026B
-		72
68		73
69	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list	74	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list
70	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register	75	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register
71	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index	76	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index
72	PCM_OUT_SR_REG equ 0x16 ; PCM out Status register	77	PCM_OUT_SR_REG equ 0x16 ; PCM out Status register
73	PCM_OUT_PIV_REG equ 0x1a	78	PCM_OUT_PIV_REG equ 0x1a
74	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index	79	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index
75		80
76	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register	81	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register
77	MC_IN_CR_REG equ 0x2b ; MIC in Control Register	82	MC_IN_CR_REG equ 0x2b ; MIC in Control Register
78	RR equ BIT1 ; reset registers. Nukes all regs	83	RR equ BIT1 ; reset registers. Nukes all regs
79		84
80	CODEC_MASTER_VOL_REG equ 0x02	85	CODEC_MASTER_VOL_REG equ 0x02
81	CODEC_AUX_VOL equ 0x04 ;	86	CODEC_AUX_VOL equ 0x04 ;
82	CODEC_PCM_OUT_REG equ 18h ; PCM output volume	87	CODEC_PCM_OUT_REG equ 18h ; PCM output volume
83	CODEC_EXT_AUDIO_REG equ 28h ; extended audio	88	CODEC_EXT_AUDIO_REG equ 28h ; extended audio
84	CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control	89	CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
85	CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate	90	CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
86	CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate	91	CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
87	CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate	92	CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
88		93
89	GLOB_CTRL equ 0x2C ; Global Control	94	GLOB_CTRL equ 0x2C ; Global Control
90	CTRL_STAT equ 0x30 ; Global Status	95	CTRL_STAT equ 0x30 ; Global Status
91	CTRL_CAS equ 0x34 ; Codec Access Semiphore	96	CTRL_CAS equ 0x34 ; Codec Access Semiphore
92		97
93	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit	98	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit
94		99
95	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready	100	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
96		101
97	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status	102	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status
98		103
99	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable	104	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable
100	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off	105	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off
101	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset	106	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset
102	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset	107	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset
103	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable	108	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable
104		109
105	CODEC_REG_POWERDOWN equ 0x26	110	CODEC_REG_POWERDOWN equ 0x26
106	CODEC_REG_ST equ 0x26	111	CODEC_REG_ST equ 0x26
107		112
108	DEV_PLAY equ 1	113	DEV_PLAY equ 1
109	DEV_STOP equ 2	114	DEV_STOP equ 2
110	DEV_CALLBACK equ 3	115	DEV_CALLBACK equ 3
111	DEV_SET_BUFF equ 4	116	DEV_SET_BUFF equ 4
112	DEV_NOTIFY equ 5	117	DEV_NOTIFY equ 5
113	DEV_SET_MASTERVOL equ 6	118	DEV_SET_MASTERVOL equ 6
114	DEV_GET_MASTERVOL equ 7	119	DEV_GET_MASTERVOL equ 7
115	DEV_GET_INFO equ 8	120	DEV_GET_INFO equ 8
116		121
117	struc AC_CNTRL ;AC controller base class	122	struc AC_CNTRL ;AC controller base class
118	{ .bus dd ?	123	{ .bus dd ?
119	.devfn dd ?	124	.devfn dd ?
120		125
121	.vendor dd ?	126	.vendor dd ?
122	.dev_id dd ?	127	.dev_id dd ?
123	.pci_cmd dd ?	128	.pci_cmd dd ?
124	.pci_stat dd ?	129	.pci_stat dd ?
125		130
126	.codec_io_base dd ?	131	.codec_io_base dd ?
127	.codec_mem_base dd ?	132	.codec_mem_base dd ?
128		133
129	.ctrl_io_base dd ?	134	.ctrl_io_base dd ?
130	.ctrl_mem_base dd ?	135	.ctrl_mem_base dd ?
131	.cfg_reg dd ?	136	.cfg_reg dd ?
132	.int_line dd ?	137	.int_line dd ?
133		138
134	.vendor_ids dd ? ;vendor id string	139	.vendor_ids dd ? ;vendor id string
135	.ctrl_ids dd ? ;hub id string	140	.ctrl_ids dd ? ;hub id string
136		141
137	.buffer dd ?	142	.buffer dd ?
138		143
139	.notify_pos dd ?	144	.notify_pos dd ?
140	.notify_task dd ?	145	.notify_task dd ?
141		146
142	.lvi_reg dd ?	147	.lvi_reg dd ?
143	.ctrl_setup dd ?	148	.ctrl_setup dd ?
144	.user_callback dd ?	149	.user_callback dd ?
145	.codec_read16 dd ?	150	.codec_read16 dd ?
146	.codec_write16 dd ?	151	.codec_write16 dd ?
147		152
148	.ctrl_read8 dd ?	153	.ctrl_read8 dd ?
149	.ctrl_read16 dd ?	154	.ctrl_read16 dd ?
150	.ctrl_read32 dd ?	155	.ctrl_read32 dd ?
151		156
152	.ctrl_write8 dd ?	157	.ctrl_write8 dd ?
153	.ctrl_write16 dd ?	158	.ctrl_write16 dd ?
154	.ctrl_write32 dd ?	159	.ctrl_write32 dd ?
155	}	160	}
156		161
157	struc CODEC ;Audio Chip base class	162	struc CODEC ;Audio Chip base class
158	{	163	{
159	.chip_id dd ?	164	.chip_id dd ?
160	.flags dd ?	165	.flags dd ?
161	.status dd ?	166	.status dd ?
162		167
163	.ac_vendor_ids dd ? ;ac vendor id string	168	.ac_vendor_ids dd ? ;ac vendor id string
164	.chip_ids dd ? ;chip model string	169	.chip_ids dd ? ;chip model string
165		170
166	.shadow_flag dd ?	171	.shadow_flag dd ?
167	dd ?	172	dd ?
168		173
169	.regs dw ? ; codec registers	174	.regs dw ? ; codec registers
170	.reg_master_vol dw ? ;0x02	175	.reg_master_vol dw ? ;0x02
171	.reg_aux_out_vol dw ? ;0x04	176	.reg_aux_out_vol dw ? ;0x04
172	.reg_mone_vol dw ? ;0x06	177	.reg_mone_vol dw ? ;0x06
173	.reg_master_tone dw ? ;0x08	178	.reg_master_tone dw ? ;0x08
174	.reg_beep_vol dw ? ;0x0A	179	.reg_beep_vol dw ? ;0x0A
175	.reg_phone_vol dw ? ;0x0C	180	.reg_phone_vol dw ? ;0x0C
176	.reg_mic_vol dw ? ;0x0E	181	.reg_mic_vol dw ? ;0x0E
177	.reg_line_in_vol dw ? ;0x10	182	.reg_line_in_vol dw ? ;0x10
178	.reg_cd_vol dw ? ;0x12	183	.reg_cd_vol dw ? ;0x12
179	.reg_video_vol dw ? ;0x14	184	.reg_video_vol dw ? ;0x14
180	.reg_aux_in_vol dw ? ;0x16	185	.reg_aux_in_vol dw ? ;0x16
181	.reg_pcm_out_vol dw ? ;0x18	186	.reg_pcm_out_vol dw ? ;0x18
182	.reg_rec_select dw ? ;0x1A	187	.reg_rec_select dw ? ;0x1A
183	.reg_rec_gain dw ? ;0x1C	188	.reg_rec_gain dw ? ;0x1C
184	.reg_rec_gain_mic dw ? ;0x1E	189	.reg_rec_gain_mic dw ? ;0x1E
185	.reg_gen dw ? ;0x20	190	.reg_gen dw ? ;0x20
186	.reg_3d_ctrl dw ? ;0X22	191	.reg_3d_ctrl dw ? ;0X22
187	.reg_page dw ? ;0X24	192	.reg_page dw ? ;0X24
188	.reg_powerdown dw ? ;0x26	193	.reg_powerdown dw ? ;0x26
189	.reg_ext_audio dw ? ;0x28	194	.reg_ext_audio dw ? ;0x28
190	.reg_ext_st dw ? ;0x2a	195	.reg_ext_st dw ? ;0x2a
191	.reg_pcm_front_rate dw ? ;0x2c	196	.reg_pcm_front_rate dw ? ;0x2c
192	.reg_pcm_surr_rate dw ? ;0x2e	197	.reg_pcm_surr_rate dw ? ;0x2e
193	.reg_lfe_rate dw ? ;0x30	198	.reg_lfe_rate dw ? ;0x30
194	.reg_pcm_in_rate dw ? ;0x32	199	.reg_pcm_in_rate dw ? ;0x32
195	dw ? ;0x34	200	dw ? ;0x34
196	.reg_cent_lfe_vol dw ? ;0x36	201	.reg_cent_lfe_vol dw ? ;0x36
197	.reg_surr_vol dw ? ;0x38	202	.reg_surr_vol dw ? ;0x38
198	.reg_spdif_ctrl dw ? ;0x3A	203	.reg_spdif_ctrl dw ? ;0x3A
199	dw ? ;0x3C	204	dw ? ;0x3C
200	dw ? ;0x3E	205	dw ? ;0x3E
201	dw ? ;0x40	206	dw ? ;0x40
202	dw ? ;0x42	207	dw ? ;0x42
203	dw ? ;0x44	208	dw ? ;0x44
204	dw ? ;0x46	209	dw ? ;0x46
205	dw ? ;0x48	210	dw ? ;0x48
206	dw ? ;0x4A	211	dw ? ;0x4A
207	dw ? ;0x4C	212	dw ? ;0x4C
208	dw ? ;0x4E	213	dw ? ;0x4E
209	dw ? ;0x50	214	dw ? ;0x50
210	dw ? ;0x52	215	dw ? ;0x52
211	dw ? ;0x54	216	dw ? ;0x54
212	dw ? ;0x56	217	dw ? ;0x56
213	dw ? ;0x58	218	dw ? ;0x58
214	dw ? ;0x5A	219	dw ? ;0x5A
215	dw ? ;0x5C	220	dw ? ;0x5C
216	dw ? ;0x5E	221	dw ? ;0x5E
217	.reg_page_0 dw ? ;0x60	222	.reg_page_0 dw ? ;0x60
218	.reg_page_1 dw ? ;0x62	223	.reg_page_1 dw ? ;0x62
219	.reg_page_2 dw ? ;0x64	224	.reg_page_2 dw ? ;0x64
220	.reg_page_3 dw ? ;0x66	225	.reg_page_3 dw ? ;0x66
221	.reg_page_4 dw ? ;0x68	226	.reg_page_4 dw ? ;0x68
222	.reg_page_5 dw ? ;0x6A	227	.reg_page_5 dw ? ;0x6A
223	.reg_page_6 dw ? ;0x6C	228	.reg_page_6 dw ? ;0x6C
224	.reg_page_7 dw ? ;0x6E	229	.reg_page_7 dw ? ;0x6E
225	dw ? ;0x70	230	dw ? ;0x70
226	dw ? ;0x72	231	dw ? ;0x72
227	dw ? ;0x74	232	dw ? ;0x74
228	dw ? ;0x76	233	dw ? ;0x76
229	dw ? ;0x78	234	dw ? ;0x78
230	dw ? ;0x7A	235	dw ? ;0x7A
231	.reg_vendor_id_1 dw ? ;0x7C	236	.reg_vendor_id_1 dw ? ;0x7C
232	.reg_vendor_id_2 dw ? ;0x7E	237	.reg_vendor_id_2 dw ? ;0x7E
233		238
234		239
235	.reset dd ? ;virual	240	.reset dd ? ;virual
236	.set_master_vol dd ?	241	.set_master_vol dd ?
237	}	242	}
238		243
239	struc CTRL_INFO	244	struc CTRL_INFO
240	{ .pci_cmd dd ?	245	{ .pci_cmd dd ?
241	.irq dd ?	246	.irq dd ?
242	.glob_cntrl dd ?	247	.glob_cntrl dd ?
243	.glob_sta dd ?	248	.glob_sta dd ?
244	.codec_io_base dd ?	249	.codec_io_base dd ?
245	.ctrl_io_base dd ?	250	.ctrl_io_base dd ?
246	.codec_mem_base dd ?	251	.codec_mem_base dd ?
247	.ctrl_mem_base dd ?	252	.ctrl_mem_base dd ?
248	.codec_id dd ?	253	.codec_id dd ?
249	}	254	}
250		255
251	struc IOCTL	256	struc IOCTL
252	{ .handle dd ?	257	{ .handle dd ?
253	.io_code dd ?	258	.io_code dd ?
254	.input dd ?	259	.input dd ?
255	.inp_size dd ?	260	.inp_size dd ?
256	.output dd ?	261	.output dd ?
257	.out_size dd ?	262	.out_size dd ?
258	}	263	}
259		264
260	virtual at 0	265	virtual at 0
261	IOCTL IOCTL	266	IOCTL IOCTL
262	end virtual	267	end virtual
263		268
264	EVENT_NOTIFY equ 0x00000200	269	EVENT_NOTIFY equ 0x00000200
265		270
266	OS_BASE equ 0; 0x80400000	271	OS_BASE equ 0; 0x80400000
267	new_app_base equ 0x60400000; 0x01000000	272	new_app_base equ 0x60400000; 0x01000000
268	PROC_BASE equ OS_BASE+0x0080000	273	PROC_BASE equ OS_BASE+0x0080000
269		274
270	public START	275	public START
271	public STOP	276	public STOP
272	public service_proc	277	public service_proc
273		278
274	extrn AttachIntHandler	279	extrn AttachIntHandler
275	extrn SysMsgBoardStr	280	extrn SysMsgBoardStr
276	extrn PciApi	281	extrn PciApi
277	extrn PciRead32	282	extrn PciRead32
278	extrn PciRead8	283	extrn PciRead8
279	extrn PciWrite8	284	extrn PciWrite8
280	extrn AllocKernelSpace	285	extrn AllocKernelSpace
281	extrn MapPage	286	extrn MapPage
282	extrn RegService	287	extrn RegService
283	extrn KernelAlloc	288	extrn KernelAlloc
284	extrn GetPgAddr	289	extrn GetPgAddr
285	extrn GetCurrentTask	290	extrn GetCurrentTask
286		291
287	section '.flat' code readable align 16	292	section '.flat' code readable align 16
288		293
289	START:	294	START:
290	if DEBUG	295	if DEBUG
291	mov esi, msgInit	296	mov esi, msgInit
292	call SysMsgBoardStr	297	call SysMsgBoardStr
293	end if	298	end if
294		299
295	call detect_controller	300	call detect_controller
296	test eax, eax	301	test eax, eax
297	jz .fail	302	jz .fail
298		303
299	if DEBUG	304	if DEBUG
300	mov esi,[ctrl.vendor_ids]	305	mov esi,[ctrl.vendor_ids]
301	call SysMsgBoardStr	306	call SysMsgBoardStr
302	mov esi, [ctrl.ctrl_ids]	307	mov esi, [ctrl.ctrl_ids]
303	call SysMsgBoardStr	308	call SysMsgBoardStr
304		309
305	end if	310	end if
306		311
307	call init_controller	312	call init_controller
308	test eax, eax	313	test eax, eax
309	jz .fail	314	jz .fail
310		315
311	if DEBUG	316	if DEBUG
312	mov esi, msgInitCodec	317	mov esi, msgInitCodec
313	call SysMsgBoardStr	318	call SysMsgBoardStr
314	end if	319	end if
315		320
316	call init_codec	321	call init_codec
317	test eax, eax	322	test eax, eax
318	jz .fail	323	jz .fail
319		324
320	if DEBUG	325	if DEBUG
321	mov esi, [codec.ac_vendor_ids]	326	mov esi, [codec.ac_vendor_ids]
322	call SysMsgBoardStr	327	call SysMsgBoardStr
323		328
324	mov esi, [codec.chip_ids]	329	mov esi, [codec.chip_ids]
325	call SysMsgBoardStr	330	call SysMsgBoardStr
326	end if	331	end if
327		332
328	call reset_controller	333	call reset_controller
329	call setup_codec	334	call setup_codec
330		335
331	mov esi, msgPrimBuff	336	mov esi, msgPrimBuff
332	call SysMsgBoardStr	337	call SysMsgBoardStr
333		338
334	call create_primary_buff	339	call create_primary_buff
335		340
336	; if REMAP_IRQ	341	; if REMAP_IRQ
337		342
338	; call get_LPC_bus	343	; call get_LPC_bus
339	; cmp eax, -1	344	; cmp eax, -1
340	; jz .fail	345	; jz .fail
341		346
342	; mov [lpc_bus], 0 ;eax	347	; mov [lpc_bus], 0 ;eax
343	; call remap_irq	348	; call remap_irq
344	; end if	349	; end if
345		350
346	mov eax, VALID_IRQ	351	mov eax, VALID_IRQ
347	mov ebx, [ctrl.int_line]	352	mov ebx, [ctrl.int_line]
348	mov esi, msgInvIRQ	353	mov esi, msgInvIRQ
349	bt eax, ebx	354	bt eax, ebx
350	jnc .fail	355	jnc .fail
351	mov eax, ATTCH_IRQ	356	mov eax, ATTCH_IRQ
352	mov esi, msgAttchIRQ	357	mov esi, msgAttchIRQ
353	bt eax, ebx	358	bt eax, ebx
354	jnc .fail	359	jnc .fail
355		360
356	stdcall AttachIntHandler, ebx, ac97_irq	361	stdcall AttachIntHandler, ebx, ac97_irq
357	stdcall RegService, sz_sound_srv, service_proc	362	stdcall RegService, sz_sound_srv, service_proc
358	ret	363	ret
359	.fail:	364	.fail:
360	if DEBUG	365	if DEBUG
361	mov esi, msgFail	366	mov esi, msgFail
362	call SysMsgBoardStr	367	call SysMsgBoardStr
363	end if	368	end if
364	xor eax, eax	369	xor eax, eax
365	STOP:	370	STOP:
366	ret	371	ret
367		372
368	handle equ IOCTL.handle	373	handle equ IOCTL.handle
369	io_code equ IOCTL.io_code	374	io_code equ IOCTL.io_code
370	input equ IOCTL.input	375	input equ IOCTL.input
371	inp_size equ IOCTL.inp_size	376	inp_size equ IOCTL.inp_size
372	output equ IOCTL.output	377	output equ IOCTL.output
373	out_size equ IOCTL.out_size	378	out_size equ IOCTL.out_size
374		379
375	align 4	380	align 4
376	proc service_proc stdcall, ioctl:dword	381	proc service_proc stdcall, ioctl:dword
377		382
378	mov edi, [ioctl]	383	mov edi, [ioctl]
379	mov eax, [edi+io_code]	384	mov eax, [edi+io_code]
380	cmp eax, DEV_PLAY	385	cmp eax, DEV_PLAY
381	jne @F	386	jne @F
382	if DEBUG	387	if DEBUG
383	mov esi, msgPlay	388	mov esi, msgPlay
384	call SysMsgBoardStr	389	call SysMsgBoardStr
385	end if	390	end if
386	call play	391	call play
387	ret	392	ret
388	@@:	393	@@:
389	cmp eax, DEV_STOP	394	cmp eax, DEV_STOP
390	jne @F	395	jne @F
391	if DEBUG	396	if DEBUG
392	mov esi, msgStop	397	mov esi, msgStop
393	call SysMsgBoardStr	398	call SysMsgBoardStr
394	end if	399	end if
395	call stop	400	call stop
396	ret	401	ret
397	@@:	402	@@:
398	cmp eax, DEV_CALLBACK	403	cmp eax, DEV_CALLBACK
399	jne @F	404	jne @F
400	mov ebx, [edi+input]	405	mov ebx, [edi+input]
401	stdcall set_callback, [ebx]	406	stdcall set_callback, [ebx]
402	ret	407	ret
403	@@:	408	@@:
404	cmp eax, DEV_SET_MASTERVOL	409	cmp eax, DEV_SET_MASTERVOL
405	jne @F	410	jne @F
406	mov ebx, [edi+input]	411	mov ebx, [edi+input]
407	stdcall set_master_vol, [ebx]	412	stdcall set_master_vol, [ebx]
408	ret	413	ret
409	@@:	414	@@:
410	cmp eax, DEV_GET_MASTERVOL	415	cmp eax, DEV_GET_MASTERVOL
411	jne @F	416	jne @F
412	mov ebx, [edi+output]	417	mov ebx, [edi+output]
413	test ebx, ebx	418	test ebx, ebx
414	jz .fail	419	jz .fail
415		420
416	stdcall get_master_vol, ebx	421	stdcall get_master_vol, ebx
417	ret	422	ret
418	@@:	423	@@:
419	cmp eax, DEV_GET_INFO	424	cmp eax, DEV_GET_INFO
420	jne @F	425	jne @F
421	mov ebx, [edi+output]	426	mov ebx, [edi+output]
422	stdcall get_dev_info, ebx	427	stdcall get_dev_info, ebx
423	ret	428	ret
424	@@:	429	@@:
425	.fail:	430	.fail:
426	xor eax, eax	431	xor eax, eax
427	ret	432	ret
428	endp	433	endp
429		434
430	restore handle	435	restore handle
431	restore io_code	436	restore io_code
432	restore input	437	restore input
433	restore inp_size	438	restore inp_size
434	restore output	439	restore output
435	restore out_size	440	restore out_size
436		441
437		442
438	align 4	443	align 4
439	proc remap_irq ;for Intel chipsets ONLY !!!	444	proc remap_irq ;for Intel chipsets ONLY !!!
440	mov eax, VALID_IRQ	445	mov eax, VALID_IRQ
441	bt eax, IRQ_LINE	446	bt eax, IRQ_LINE
442	jnc .exit	447	jnc .exit
443		448
444	mov edx, 0x4D0	449	mov edx, 0x4D0
445	in ax,dx	450	in ax,dx
446	bts ax, IRQ_LINE	451	bts ax, IRQ_LINE
447	out dx, aX	452	out dx, aX
448		453
449	stdcall PciWrite8, dword 0, dword 0xF8, dword 0x61, dword IRQ_LINE	454	stdcall PciWrite8, dword 0, dword 0xF8, dword 0x61, dword IRQ_LINE
450	mov [ctrl.int_line], IRQ_LINE	455	mov [ctrl.int_line], IRQ_LINE
451		456
452	.exit:	457	.exit:
453	ret	458	ret
454	endp	459	endp
455		460
456	align 4	461	align 4
457	proc ac97_irq	462	proc ac97_irq
458		463
459	; if DEBUG	464	; if DEBUG
460	; mov esi, msgIRQ	465	; mov esi, msgIRQ
461	; call SysMsgBoardStr	466	; call SysMsgBoardStr
462	; end if	467	; end if
463		468
464	mov edx, PCM_OUT_CR_REG	469	mov edx, PCM_OUT_CR_REG
465	mov al, 0x14	470	mov al, 0x14
466	call [ctrl.ctrl_write8]	471	call [ctrl.ctrl_write8]
467		472
468	mov ax, 0x1c	473	mov ax, 0x1c
469	mov edx, PCM_OUT_SR_REG	474	mov edx, PCM_OUT_SR_REG
470	call [ctrl.ctrl_write16]	475	call [ctrl.ctrl_write16]
471		476
472	mov edx, PCM_OUT_CIV_REG	477	mov edx, PCM_OUT_CIV_REG
473	call [ctrl.ctrl_read8]	478	call [ctrl.ctrl_read8]
474		479
475	and eax, 0x1F	480	and eax, 0x1F
476	cmp eax, [civ_val]	481	cmp eax, [civ_val]
477	je .skip	482	je .skip
478		483
479	mov [civ_val], eax	484	mov [civ_val], eax
480	dec eax	485	dec eax
481	and eax, 0x1F	486	and eax, 0x1F
482	mov [ctrl.lvi_reg], eax	487	mov [ctrl.lvi_reg], eax
483		488
484	mov edx, PCM_OUT_LVI_REG	489	mov edx, PCM_OUT_LVI_REG
485	call [ctrl.ctrl_write8]	490	call [ctrl.ctrl_write8]
486		491
487	mov edx, PCM_OUT_CR_REG	492	mov edx, PCM_OUT_CR_REG
488	mov ax, 0x1D	493	mov ax, 0x1D
489	call [ctrl.ctrl_write8]	494	call [ctrl.ctrl_write8]
490		495
491	mov eax, [civ_val]	496	mov eax, [civ_val]
492	add eax, 2	497	add eax, 2
493	and eax, 31	498	and eax, 31
494	mov ebx, dword [buff_list+eax*4]	499	mov ebx, dword [buff_list+eax*4]
495		500

Subversion Repositories Kolibri OS

(root)/kernel/trunk/drivers/unisound.asm – Rev 188 → 198