WebSVN – Kolibri OS – Diff – /kernel/trunk/drivers/sis.asm


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;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2011. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
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format MS COFF
 
 
DEBUG           equ 1
 
include 'proc32.inc'
include 'imports.inc'
 
API_VERSION     equ 0x01000100
DEBUG_IRQ       equ 0
 
USE_COM_IRQ     equ 0    ;make irq 3 and irq 4 available for PCI devices
IRQ_REMAP       equ 0
IRQ_LINE        equ 0
 
 
;irq 0,1,2,8,12,13 íåäîñòóïíû
;                   FEDCBA9876543210
VALID_IRQ       equ 1100111011111000b
ATTCH_IRQ       equ 0000111010100000b
 
if USE_COM_IRQ
ATTCH_IRQ       equ 0000111010111000b
end if
 
CPU_FREQ        equ  2600d
 
BIT0  EQU 0x00000001
BIT1  EQU 0x00000002
BIT2  EQU 0x00000004
BIT3  EQU 0x00000008
BIT4  EQU 0x00000010
BIT5  EQU 0x00000020
BIT6  EQU 0x00000040
BIT7  EQU 0x00000080
BIT8  EQU 0x00000100
BIT9  EQU 0x00000200
BIT10 EQU 0x00000400
BIT11 EQU 0x00000800
BIT12 EQU 0x00001000
BIT13 EQU 0x00002000
BIT14 EQU 0x00004000
BIT15 EQU 0x00008000
BIT16 EQU 0x00010000
BIT17 EQU 0x00020000
BIT18 EQU 0x00040000
BIT19 EQU 0x00080000
BIT20 EQU 0x00100000
BIT21 EQU 0x00200000
BIT22 EQU 0x00400000
BIT23 EQU 0x00800000
BIT24 EQU 0x00100000
BIT25 EQU 0x02000000
BIT26 EQU 0x04000000
BIT27 EQU 0x08000000
BIT28 EQU 0x10000000
BIT29 EQU 0x20000000
BIT30 EQU 0x40000000
BIT31 EQU 0x80000000
 
VID_SIS           equ 0x1039
CTRL_SIS          equ 0x7012
 
PCM_OUT_BDL       equ  0x10  ; PCM out buffer descriptors list
PCM_OUT_CR_REG    equ  0x1b  ; PCM out Control Register
PCM_OUT_LVI_REG   equ  0x15      ; PCM last valid index
PCM_OUT_SR_REG    equ  0x18  ; PCM out Status register
PCM_OUT_PIV_REG   equ  0x1a      ; PCM out prefetched index
PCM_OUT_CIV_REG   equ  0x14      ; PCM out current index
 
PCM_IN_CR_REG     equ  0x0b      ; PCM in Control Register
MC_IN_CR_REG      equ  0x2b  ; MIC in Control Register
RR                equ  BIT1      ; reset registers.  Nukes all regs
 
CODEC_MASTER_VOL_REG            equ     0x02
CODEC_AUX_VOL                   equ     0x04    ;
CODEC_PCM_OUT_REG            equ 0x18 ; PCM output volume
CODEC_EXT_AUDIO_REG          equ 0x28 ; extended audio
CODEC_EXT_AUDIO_CTRL_REG     equ 0x2a ; extended audio control
CODEC_PCM_FRONT_DACRATE_REG  equ 0x2c ; PCM out sample rate
CODEC_PCM_SURND_DACRATE_REG  equ 0x2e ; surround sound sample rate
CODEC_PCM_LFE_DACRATE_REG    equ 0x30 ; LFE sample rate
 
GLOB_CTRL         equ  0x2C        ;   Global Control
CTRL_STAT         equ  0x30        ;   Global Status
CTRL_CAS          equ  0x34        ;   Codec Access Semiphore
 
CAS_FLAG          equ  0x01        ;   Codec Access Semiphore Bit
 
CTRL_ST_CREADY    equ  BIT8+BIT9+BIT28 ;   Primary Codec Ready
 
CTRL_ST_RCS       equ  0x00008000  ;   Read Completion Status
 
CTRL_CNT_CRIE     equ  BIT4+BIT5+BIT6  ;   Codecs Resume Interrupt Enable
CTRL_CNT_AC_OFF   equ  0x00000008  ;   ACLINK Off
CTRL_CNT_WARM     equ  0x00000004  ;   AC97 Warm Reset
CTRL_CNT_COLD     equ  0x00000002  ;   AC97 Cold Reset
CTRL_CNT_GIE      equ  0x00000001  ;   GPI Interrupt Enable
 
CODEC_REG_POWERDOWN   equ 0x26
CODEC_REG_ST          equ 0x26
 
SRV_GETVERSION        equ  0
DEV_PLAY              equ  1
DEV_STOP              equ  2
DEV_CALLBACK          equ  3
DEV_SET_BUFF          equ  4
DEV_NOTIFY            equ  5
DEV_SET_MASTERVOL     equ  6
DEV_GET_MASTERVOL     equ  7
DEV_GET_INFO          equ  8
 
struc AC_CNTRL              ;AC controller base class
{ .bus                dd ?
  .devfn              dd ?
 
  .vendor             dd ?
  .dev_id             dd ?
  .pci_cmd            dd ?
  .pci_stat           dd ?
 
  .codec_io_base      dd ?
  .codec_mem_base     dd ?
 
  .ctrl_io_base       dd ?
  .ctrl_mem_base      dd ?
  .cfg_reg            dd ?
  .int_line           dd ?
 
  .vendor_ids         dd ?    ;vendor id string
  .ctrl_ids           dd ?    ;hub id string
 
  .buffer             dd ?
 
  .notify_pos         dd ?
  .notify_task        dd ?
 
  .lvi_reg            dd ?
  .ctrl_setup         dd ?
  .user_callback      dd ?
  .codec_read16       dd ?
  .codec_write16      dd ?
 
  .ctrl_read8         dd ?
  .ctrl_read16        dd ?
  .ctrl_read32        dd ?
 
  .ctrl_write8        dd ?
  .ctrl_write16       dd ?
  .ctrl_write32       dd ?
}
 
struc CODEC                ;Audio Chip base class
{
  .chip_id            dd ?
  .flags              dd ?
  .status             dd ?
 
  .ac_vendor_ids      dd ?    ;ac vendor id string
  .chip_ids           dd ?    ;chip model string
 
  .shadow_flag        dd ?
                      dd ?
 
  .regs               dw ?     ; codec registers
  .reg_master_vol     dw ?     ;0x02
  .reg_aux_out_vol    dw ?     ;0x04
  .reg_mone_vol       dw ?     ;0x06
  .reg_master_tone    dw ?     ;0x08
  .reg_beep_vol       dw ?     ;0x0A
  .reg_phone_vol      dw ?     ;0x0C
  .reg_mic_vol        dw ?     ;0x0E
  .reg_line_in_vol    dw ?     ;0x10
  .reg_cd_vol         dw ?     ;0x12
  .reg_video_vol      dw ?     ;0x14
  .reg_aux_in_vol     dw ?     ;0x16
  .reg_pcm_out_vol    dw ?     ;0x18
  .reg_rec_select     dw ?     ;0x1A
  .reg_rec_gain       dw ?     ;0x1C
  .reg_rec_gain_mic   dw ?     ;0x1E
  .reg_gen            dw ?     ;0x20
  .reg_3d_ctrl        dw ?     ;0X22
  .reg_page           dw ?     ;0X24
  .reg_powerdown      dw ?     ;0x26
  .reg_ext_audio      dw ?     ;0x28
  .reg_ext_st         dw ?     ;0x2a
  .reg_pcm_front_rate dw ?     ;0x2c
  .reg_pcm_surr_rate  dw ?     ;0x2e
  .reg_lfe_rate       dw ?     ;0x30
  .reg_pcm_in_rate    dw ?     ;0x32
                      dw ?     ;0x34
  .reg_cent_lfe_vol   dw ?     ;0x36
  .reg_surr_vol       dw ?     ;0x38
  .reg_spdif_ctrl     dw ?     ;0x3A
                      dw ?     ;0x3C
                      dw ?     ;0x3E
                      dw ?     ;0x40
                      dw ?     ;0x42
                      dw ?     ;0x44
                      dw ?     ;0x46
                      dw ?     ;0x48
                      dw ?     ;0x4A
                      dw ?     ;0x4C
                      dw ?     ;0x4E
                      dw ?     ;0x50
                      dw ?     ;0x52
                      dw ?     ;0x54
                      dw ?     ;0x56
                      dw ?     ;0x58
                      dw ?     ;0x5A
                      dw ?     ;0x5C
                      dw ?     ;0x5E
  .reg_page_0         dw ?     ;0x60
  .reg_page_1         dw ?     ;0x62
  .reg_page_2         dw ?     ;0x64
  .reg_page_3         dw ?     ;0x66
  .reg_page_4         dw ?     ;0x68
  .reg_page_5         dw ?     ;0x6A
  .reg_page_6         dw ?     ;0x6C
  .reg_page_7         dw ?     ;0x6E
                      dw ?     ;0x70
                      dw ?     ;0x72
                      dw ?     ;0x74
                      dw ?     ;0x76
                      dw ?     ;0x78
                      dw ?     ;0x7A
  .reg_vendor_id_1    dw ?     ;0x7C
  .reg_vendor_id_2    dw ?     ;0x7E
 
 
  .reset              dd ?    ;virual
  .set_master_vol     dd ?
}
 
struc CTRL_INFO
{   .pci_cmd          dd ?
    .irq              dd ?
    .glob_cntrl       dd ?
    .glob_sta         dd ?
    .codec_io_base    dd ?
    .ctrl_io_base     dd ?
    .codec_mem_base   dd ?
    .ctrl_mem_base    dd ?
    .codec_id         dd ?
}
 
struc IOCTL
{  .handle            dd ?
   .io_code           dd ?
   .input             dd ?
   .inp_size          dd ?
   .output            dd ?
   .out_size          dd ?
}
 
virtual at 0
  IOCTL IOCTL
end virtual
 
EVENT_NOTIFY          equ 0x00000200
 
public START
public service_proc
public version
 
section '.flat' code readable align 16
 
proc START stdcall, state:dword
 
        cmp     [state], 1
        jne     .stop
 
     if DEBUG
        mov     esi, msgInit
        call    SysMsgBoardStr
     end if
 
        call    detect_controller
        test    eax, eax
        jz      .fail
 
     if DEBUG
        mov     esi, [ctrl.vendor_ids]
        call    SysMsgBoardStr
        mov     esi, [ctrl.ctrl_ids]
        call    SysMsgBoardStr
 
     end if
 
        call    init_controller
        test    eax, eax
        jz      .fail
 
        call    init_codec
        test    eax, eax
        jz      .fail
 
        call    reset_controller
        call    setup_codec
 
        mov     esi, msgPrimBuff
        call    SysMsgBoardStr
        call    create_primary_buff
        mov     esi, msgDone
        call    SysMsgBoardStr
 
  if IRQ_REMAP
        pushf
        cli
 
        mov     ebx, [ctrl.int_line]
        in      al, 0xA1
        mov     ah, al
        in      al, 0x21
        test    ebx, ebx
        jz      .skip
        bts     ax, bx                     ;mask old line
.skip
        bts     ax, IRQ_LINE               ;mask new ine
        out     0x21, al
        mov     al, ah
        out     0xA1, al
                                           ;remap IRQ
        stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
 
        mov     dx, 0x4d0                  ;8259 ELCR1
        in      al, dx
        bts     ax, IRQ_LINE
        out     dx, al                     ;set level-triggered mode
        mov     [ctrl.int_line], IRQ_LINE
        popf
        mov     esi, msgRemap
        call    SysMsgBoardStr
  end if
 
        mov     eax, VALID_IRQ
        mov     ebx, [ctrl.int_line]
        mov     esi, msgInvIRQ
        bt      eax, ebx
        jnc     .fail_msg
        mov     eax, ATTCH_IRQ
        mov     esi, msgAttchIRQ
        bt      eax, ebx
        jnc     .fail_msg
 
        stdcall AttachIntHandler, ebx, ac97_irq, dword 0
.reg:
        stdcall RegService, sz_sound_srv, service_proc
        ret
.fail:
   if DEBUG
        mov     esi, msgFail
        call    SysMsgBoardStr
   end if
        xor     eax, eax
        ret
.fail_msg:
        call    SysMsgBoardStr
        xor     eax, eax
        ret
.stop:
        call    stop
        xor     eax, eax
        ret
endp
 
handle     equ  IOCTL.handle
io_code    equ  IOCTL.io_code
input      equ  IOCTL.input
inp_size   equ  IOCTL.inp_size
output     equ  IOCTL.output
out_size   equ  IOCTL.out_size
 
align 4
proc service_proc stdcall, ioctl:dword
 
        mov     edi, [ioctl]
        mov     eax, [edi+io_code]
 
        cmp     eax, SRV_GETVERSION
        jne     @F
 
        mov     eax, [edi+output]
        cmp     [edi+out_size], 4
        jne     .fail
 
        mov     [eax], dword API_VERSION
        xor     eax, eax
        ret
@@:
        cmp     eax, DEV_PLAY
        jne     @F
     if DEBUG
        mov     esi, msgPlay
        call    SysMsgBoardStr
     end if
        call    play
        ret
@@:
        cmp     eax, DEV_STOP
        jne     @F
     if DEBUG
        mov     esi, msgStop
        call    SysMsgBoardStr
     end if
        call    stop
        ret
@@:
        cmp     eax, DEV_CALLBACK
        jne     @F
        mov     ebx, [edi+input]
        stdcall set_callback, [ebx]
        ret
@@:
        cmp     eax, DEV_SET_MASTERVOL
        jne     @F
        mov     eax, [edi+input]
        mov     eax, [eax]
        call    set_master_vol      ;eax= vol
        ret
@@:
        cmp     eax, DEV_GET_MASTERVOL
        jne     @F
        mov     ebx, [edi+output]
        stdcall get_master_vol, ebx
        ret
;@@:
;           cmp eax, DEV_GET_INFO
;           jne @F
;           mov ebx, [edi+output]
;           stdcall get_dev_info, ebx
;           ret
@@:
.fail:
        or      eax, -1
        ret
endp
 
restore   handle
restore   io_code
restore   input
restore   inp_size
restore   output
restore   out_size
 
align 4
proc ac97_irq
 
     if DEBUG_IRQ
        mov     esi, msgIRQ
        call    SysMsgBoardStr
     end if
 
        mov     edx, PCM_OUT_CR_REG
        mov     al, 0x10
        call    [ctrl.ctrl_write8]
 
        mov     ax, 0x1c
        mov     edx, PCM_OUT_SR_REG
        call    [ctrl.ctrl_write16]
 
        mov     edx, PCM_OUT_CIV_REG
        call    [ctrl.ctrl_read8]
 
        and     eax, 0x1F
        cmp     eax, [civ_val]
        je      .skip
 
        mov     [civ_val], eax
        dec     eax
        and     eax, 0x1F
        mov     [ctrl.lvi_reg], eax
 
        mov     edx, PCM_OUT_LVI_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, PCM_OUT_CR_REG
        mov     ax, 0x11
        call    [ctrl.ctrl_write8]
 
        mov     eax, [civ_val]
        add     eax, 1
        and     eax, 31
        mov     ebx, dword [buff_list+eax*4]
 
        cmp     [ctrl.user_callback], 0
        je      @f
 
        stdcall [ctrl.user_callback], ebx
@@:
        ret
 
.skip:
        mov     edx, PCM_OUT_CR_REG
        mov     ax, 0x11
        call    [ctrl.ctrl_write8]
        ret
endp
 
align 4
proc create_primary_buff
 
        stdcall KernelAlloc, 0x10000
        mov     [ctrl.buffer], eax
 
        mov     edi, eax
        mov     ecx, 0x10000/4
        xor     eax, eax
        cld
        rep stosd
 
        mov     eax, [ctrl.buffer]
        call    GetPgAddr
 
        mov     ebx, 0xC0004000
        mov     ecx, 4
        mov     edi, pcmout_bdl
@@:
        mov     [edi], eax
        mov     [edi+4], ebx
 
        mov     [edi+32], eax
        mov     [edi+4+32], ebx
 
        mov     [edi+64], eax
        mov     [edi+4+64], ebx
 
        mov     [edi+96], eax
        mov     [edi+4+96], ebx
 
        mov     [edi+128], eax
        mov     [edi+4+128], ebx
 
        mov     [edi+160], eax
        mov     [edi+4+160], ebx
 
        mov     [edi+192], eax
        mov     [edi+4+192], ebx
 
        mov     [edi+224], eax
        mov     [edi+4+224], ebx
 
        add     eax, 0x4000
        add     edi, 8
        loop    @B
 
        mov     edi, buff_list
        mov     eax, [ctrl.buffer]
        mov     ecx, 4
@@:
        mov     [edi], eax
        mov     [edi+16], eax
        mov     [edi+32], eax
        mov     [edi+48], eax
        mov     [edi+64], eax
        mov     [edi+80], eax
        mov     [edi+96], eax
        mov     [edi+112], eax
 
        add     eax, 0x4000
        add     edi, 4
        loop    @B
 
        mov     eax, pcmout_bdl
        mov     ebx, eax
        call    GetPgAddr     ;eax
        and     ebx, 0xFFF
        add     eax, ebx
 
        mov     edx, PCM_OUT_BDL
        call    [ctrl.ctrl_write32]
 
        mov     eax, 16
        mov     [ctrl.lvi_reg], eax
        mov     edx, PCM_OUT_LVI_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_read32]
        and     eax, not 0x000000C0
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_write32]
 
        ret
endp
 
align 4
proc detect_controller
           locals
             last_bus dd ?
             bus      dd ?
             devfn    dd ?
           endl
 
        xor     eax, eax
        mov     [bus], eax
        inc     eax
        call    PciApi
        cmp     eax, -1
        je      .err
 
        mov     [last_bus], eax
 
.next_bus:
        and     [devfn], 0
.next_dev:
        stdcall PciRead32, [bus], [devfn], dword 0
        test    eax, eax
        jz      .next
        cmp     eax, -1
        je      .next
 
        mov     edi, devices
@@:
        mov     ebx, [edi]
        test    ebx, ebx
        jz      .next
 
        cmp     eax, ebx
        je      .found
        add     edi, 12
        jmp     @B
.next:
        inc     [devfn]
        cmp     [devfn], 256
        jb      .next_dev
        mov     eax, [bus]
        inc     eax
        mov     [bus], eax
        cmp     eax, [last_bus]
        jna     .next_bus
        xor     eax, eax
        ret
.found:
        mov     ebx, [bus]
        mov     [ctrl.bus], ebx
 
        mov     ecx, [devfn]
        mov     [ctrl.devfn], ecx
 
        mov     edx, eax
        and     edx, 0xFFFF
        mov     [ctrl.vendor], edx
        shr     eax, 16
        mov     [ctrl.dev_id], eax
 
        mov     ebx, [edi+4]
        mov     [ctrl.ctrl_ids], ebx
        mov     [ctrl.vendor_ids], msg_SIS
 
        mov     esi, [edi+8]
        mov     [ctrl.ctrl_setup], esi
        ret
.err:
        xor     eax, eax
        ret
endp
 
align 4
proc init_controller
 
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
        mov     ebx, eax
        and     eax, 0xFFFF
        mov     [ctrl.pci_cmd], eax
        shr     ebx, 16
        mov     [ctrl.pci_stat], ebx
 
        mov     esi, msgPciCmd
        call    SysMsgBoardStr
        call    dword2str
        call    SysMsgBoardStr
 
        mov     esi, msgPciStat
        call    SysMsgBoardStr
        mov     eax, [ctrl.pci_stat]
        call    dword2str
        call    SysMsgBoardStr
 
        mov     esi, msgMixIsaIo
        call    SysMsgBoardStr
 
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
 
        call    dword2str
        call    SysMsgBoardStr
 
        and     eax, 0xFFFE
        mov     [ctrl.codec_io_base], eax
 
        mov     esi, msgCtrlIsaIo
        call    SysMsgBoardStr
 
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
 
        call    dword2str
        call    SysMsgBoardStr
 
        and     eax, 0xFFC0
        mov     [ctrl.ctrl_io_base], eax
 
        mov     esi, msgMixMMIo
        call    SysMsgBoardStr
 
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x18
        mov     [ctrl.codec_mem_base], eax
 
        call    dword2str
        call    SysMsgBoardStr
 
        mov     esi, msgCtrlMMIo
        call    SysMsgBoardStr
 
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x1C
        mov     [ctrl.ctrl_mem_base], eax
 
        call    dword2str
        call    SysMsgBoardStr
.default:
        stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
        and     eax, 0xFF
@@:
        mov     [ctrl.int_line], eax
 
        stdcall PciRead8, [ctrl.bus], [ctrl.devfn], dword 0x41
        and     eax, 0xFF
        mov     [ctrl.cfg_reg], eax
 
        call    [ctrl.ctrl_setup]
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc set_SIS
        mov     [ctrl.codec_read16], codec_io_r16    ;virtual
        mov     [ctrl.codec_write16], codec_io_w16   ;virtual
 
        mov     [ctrl.ctrl_read8 ], ctrl_io_r8      ;virtual
        mov     [ctrl.ctrl_read16], ctrl_io_r16      ;virtual
        mov     [ctrl.ctrl_read32], ctrl_io_r32      ;virtual
 
        mov     [ctrl.ctrl_write8 ], ctrl_io_w8     ;virtual
        mov     [ctrl.ctrl_write16], ctrl_io_w16     ;virtual
        mov     [ctrl.ctrl_write32], ctrl_io_w32     ;virtual
        ret
endp
 
align 4
proc reset_controller
 
        xor     eax, eax
        mov     edx, PCM_IN_CR_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, PCM_OUT_CR_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, MC_IN_CR_REG
        call    [ctrl.ctrl_write8]
 
        mov     eax, RR
        mov     edx, PCM_IN_CR_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, PCM_OUT_CR_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, MC_IN_CR_REG
        call    [ctrl.ctrl_write8]
        ret
endp
 
align 4
proc init_codec
           locals
             counter dd ?
           endl
 
        mov     esi, msgControl
        call    SysMsgBoardStr
 
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_read32]
        call    dword2str
        call    SysMsgBoardStr
 
        mov     esi, msgStatus
        call    SysMsgBoardStr
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        push    eax
        call    dword2str
        call    SysMsgBoardStr
        pop     eax
        cmp     eax, 0xFFFFFFFF
        je      .err
 
        test    eax, CTRL_ST_CREADY
        jnz     .done                   ;;;;;.ready
 
        call    reset_codec
        test    eax, eax
        jz      .err
 
.ready:
        xor     edx, edx    ;ac_reg_0
        call    [ctrl.codec_write16]
 
        xor     eax, eax
        mov     edx, CODEC_REG_POWERDOWN
        call    [ctrl.codec_write16]
 
        mov     [counter], 200    ; total 200*5 ms = 1s
.wait:
        mov     eax, 5000  ; wait 5 ms
        call    StallExec
 
        mov     edx, CODEC_REG_POWERDOWN
        call    [ctrl.codec_read16]
        and     eax, 0x0F
        cmp     eax, 0x0F
        je      .done
 
        sub     [counter] , 1
        jnz     .wait
.err:
        xor     eax, eax       ; timeout error
        ret
.done:
        mov     eax, 2     ;force set 16-bit 2-channel PCM
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_write32]
        mov     eax, 5000  ; wait 5 ms
        call    StallExec
 
        call    detect_codec
 
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc reset_codec
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_read32]
 
        test    eax, 0x02
        jz      .cold
 
        call    warm_reset
        jnc     .ok
.cold:
        call    cold_reset
        jnc     .ok
 
     if DEBUG
        mov     esi, msgCFail
        call    SysMsgBoardStr
     end if
        xor     eax, eax    ; timeout error
        ret
.ok:
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc warm_reset
           locals
             counter dd ?
           endl
 
        mov     eax, 0x06
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_write32]
 
     if DEBUG
        mov     esi, msgWarm
        call    SysMsgBoardStr
     end if
 
        mov     [counter], 10   ; total 10*100 ms = 1s
.wait:
        mov     eax, 100000   ; wait 100 ms
        call    StallExec
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        test    eax, CTRL_ST_CREADY
        jnz     .ok
 
        dec     [counter]
        jnz     .wait
 
     if DEBUG
        mov     esi, msgWRFail
        call    SysMsgBoardStr
     end if
.fail:
        stc
        ret
.ok:
        clc
        ret
endp
 
align 4
proc cold_reset
           locals
             counter dd ?
            endl
 
        mov     eax, 0x02
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_write32]
 
     if DEBUG
        mov     esi, msgCold
        call    SysMsgBoardStr
     end if
 
        mov     eax, 400000    ; wait 400 ms
        call    StallExec
 
        mov     [counter], 16   ; total 20*100 ms = 2s
.wait:
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        test    eax, CTRL_ST_CREADY
        jnz     .ok
 
        mov     eax, 100000   ; wait 100 ms
        call    StallExec
 
        dec     [counter]
        jnz     .wait
 
     if DEBUG
        mov     esi, msgCRFail
        call    SysMsgBoardStr
     end if
 
.fail:
        stc
        ret
.ok:
        mov     esi, msgControl
        call    SysMsgBoardStr
 
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_read32]
        call    dword2str
        call    SysMsgBoardStr
 
        mov     esi, msgStatus
        call    SysMsgBoardStr
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        push    eax
        call    dword2str
        call    SysMsgBoardStr
        pop     eax
 
        test    eax, CTRL_ST_CREADY
        jz      .fail
        clc
        ret
endp
 
align 4
play:
        xor     eax, eax
        mov     [civ_val], eax
        mov     edx, PCM_OUT_CIV_REG
        call    [ctrl.ctrl_write8]
 
        mov     eax, 16
        mov     [ctrl.lvi_reg], eax
        mov     edx, PCM_OUT_LVI_REG
        call    [ctrl.ctrl_write8]
 
        mov     edx, PCM_OUT_CR_REG
        mov     ax, 0x1D
        call    [ctrl.ctrl_write8]
        xor     eax, eax
        ret
 
align 4
stop:
        mov     edx, PCM_OUT_CR_REG
        mov     ax, 0x0
        call    [ctrl.ctrl_write8]
 
        mov     ax, 0x1c
        mov     edx, PCM_OUT_SR_REG
        call    [ctrl.ctrl_write16]
        xor     eax, eax
        ret
 
align 4
proc get_dev_info stdcall, p_info:dword
           virtual at esi
             CTRL_INFO CTRL_INFO
           end virtual
 
        mov     esi, [p_info]
        mov     eax, [ctrl.int_line]
        mov     ebx, [ctrl.codec_io_base]
        mov     ecx, [ctrl.ctrl_io_base]
        mov     edx, [ctrl.codec_mem_base]
        mov     edi, [ctrl.ctrl_mem_base]
 
        mov     [CTRL_INFO.irq], eax
        mov     [CTRL_INFO.codec_io_base], ebx
        mov     [CTRL_INFO.ctrl_io_base], ecx
        mov     [CTRL_INFO.codec_mem_base], edx
        mov     [CTRL_INFO.ctrl_mem_base], edi
 
        mov     eax, [codec.chip_id]
        mov     [CTRL_INFO.codec_id], eax
 
        mov     edx, GLOB_CTRL
        call    [ctrl.ctrl_read32]
        mov     [CTRL_INFO.glob_cntrl], eax
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        mov     [CTRL_INFO.glob_sta], eax
 
        mov     ebx, [ctrl.pci_cmd]
        mov     [CTRL_INFO.pci_cmd], ebx
        ret
endp
 
align 4
proc set_callback stdcall, handler:dword
        mov     eax, [handler]
        mov     [ctrl.user_callback], eax
        ret
endp
 
align 4
proc codec_read stdcall, ac_reg:dword      ; reg = edx, reval = eax
 
        mov     edx, [ac_reg]
 
        mov     ebx, edx
        shr     ebx, 1
        bt      [codec.shadow_flag], ebx
        jc      .use_shadow
 
        call    [ctrl.codec_read16]  ;change edx !!!
        mov     ecx, eax
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_read32]
        test    eax, CTRL_ST_RCS
        jz      .read_ok
 
        mov     edx, CTRL_STAT
        call    [ctrl.ctrl_write32]
        xor     eax, eax
        not     eax ;timeout
        ret
.read_ok:
        mov     edx, [ac_reg]
        mov     [codec.regs+edx], cx
        bts     [codec.shadow_flag], ebx
        mov     eax, ecx
        ret
.use_shadow:
        movzx   eax, word [codec.regs+edx]
        ret
endp
 
align 4
proc codec_write stdcall, ac_reg:dword
        push    eax
        call    check_semafore
        and     eax, eax
        jz      .err
        pop     eax
 
        mov     esi, [ac_reg]
        mov     edx, esi
        call    [ctrl.codec_write16]
        mov     [codec.regs+esi], ax
        shr     esi, 1
        bts     [codec.shadow_flag], esi
        ret
.err:
        pop     eax
        ret
endp
 
align 4
proc codec_check_ready
 
        mov     edx, CTRL_ST
        call    [ctrl.ctrl_read32]
        and     eax, CTRL_ST_CREADY
        jz      .not_ready
 
        xor     eax, wax
        inc     eax
        ret
.not_ready:
        xor     eax, eax
        ret
endp
 
align 4
proc check_semafore
           local counter:DWORD
 
        mov     [counter], 100
.l1:
        mov     edx, CTRL_CAS
        call    [ctrl.ctrl_read8]
        and     eax, CAS_FLAG
        jz      .ok
 
        mov     eax, 1
        call    StallExec
        sub     [counter], 1
        jnz     .l1
        xor     eax, eax
        ret
align 4
.ok:
        xor     eax, eax
        inc     eax
        ret
endp
 
align 4
proc StallExec
        push    ecx
        push    edx
        push    ebx
        push    eax
 
        mov     ecx, CPU_FREQ
        mul     ecx
        mov     ebx, eax      ;low
        mov     ecx, edx      ;high
        rdtsc
        add     ebx, eax
        adc     ecx, edx
@@:
        rdtsc
        sub     eax, ebx
        sbb     edx, ecx
        js      @B
 
        pop     eax
        pop     ebx
        pop     edx
        pop     ecx
        ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;          CONTROLLER IO functions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
proc codec_io_r16
        add     edx, [ctrl.codec_io_base]
        in      ax, dx
        ret
endp
 
align 4
proc codec_io_w16
        add     edx, [ctrl.codec_io_base]
        out     dx, ax
        ret
endp
 
align 4
proc ctrl_io_r8
        add     edx, [ctrl.ctrl_io_base]
        in      al, dx
        ret
endp
 
align 4
proc ctrl_io_r16
        add     edx, [ctrl.ctrl_io_base]
        in      ax, dx
        ret
endp
 
align 4
proc ctrl_io_r32
        add     edx, [ctrl.ctrl_io_base]
        in      eax, dx
        ret
endp
 
align 4
proc ctrl_io_w8
        add     edx, [ctrl.ctrl_io_base]
        out     dx, al
        ret
endp
 
align 4
proc ctrl_io_w16
        add     edx, [ctrl.ctrl_io_base]
        out     dx, ax
        ret
endp
 
align 4
proc ctrl_io_w32
        add     edx, [ctrl.ctrl_io_base]
        out     dx, eax
        ret
endp
 
align 4
dword2str:
        mov     esi, hex_buff
        mov     ecx, -8
@@:
        rol     eax, 4
        mov     ebx, eax
        and     ebx, 0x0F
        mov     bl, [ebx+hexletters]
        mov     [8+esi+ecx], bl
        inc     ecx
        jnz     @B
        ret
 
hexletters   db '0123456789ABCDEF'
hex_buff     db 8 dup(0),13,10,0
 
include "codec.inc"
 
align 4
devices dd (CTRL_SIS  shl 16)+VID_SIS,msg_AC, set_SIS
        dd 0
 
version      dd (5 shl 16) or (API_VERSION and 0xFFFF)
 
msg_AC       db '7012 AC97 controller',13,10, 0
msg_SIS      db 'Silicon Integrated Systems',13,10, 0
 
sz_sound_srv        db 'SOUND',0
 
msgInit      db 'detect hardware...',13,10,0
msgFail      db 'device not found',13,10,0
msgAttchIRQ  db 'IRQ line not supported', 13,10, 0
msgInvIRQ    db 'IRQ line not assigned or invalid', 13,10, 0
msgPlay      db 'start play', 13,10,0
msgStop      db 'stop play',  13,10,0
;msgNotify    db 'call notify',13,10,0
msgIRQ       db 'AC97 IRQ', 13,10,0
msgInitCtrl  db 'init controller',13,10,0
;msgInitCodec db 'init codec',13,10,0
msgPrimBuff  db 'create primary buffer ...',0
msgDone      db 'done',13,10,0
msgRemap     db 'Remap IRQ',13,10,0
;msgReg       db 'set service handler',13,10,0
msgOk        db 'service installed',13,10,0
msgCold      db 'cold reset',13,10,0
msgWarm      db 'warm reset',13,10,0
msgWRFail    db 'warm reset failed',13,10,0
msgCRFail    db 'cold reset failed',13,10,0
msgCFail     db 'codec not ready',13,10,0
msgResetOk   db 'reset complete',13,10,0
msgStatus    db 'global status   ',0
msgControl   db 'global control  ',0
msgPciCmd    db 'PCI command     ',0
msgPciStat   db 'PCI status      ',0
msgCtrlIsaIo db 'controller io base   ',0
msgMixIsaIo  db 'codec io base        ',0
msgCtrlMMIo  db 'controller mmio base ',0
msgMixMMIo   db 'codec mmio base      ',0
msgIrqMap    db 'AC97 irq map as      ',0
 
section '.data' data readable writable align 16
 
pcmout_bdl       rq 32
buff_list        rd 32
 
codec CODEC
ctrl AC_CNTRL
 
lpc_bus  rd 1
civ_val  rd 1

Rev 2288	Rev 2455
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2011. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7		7
8	format MS COFF	8	format MS COFF
9		9
10		10
11	DEBUG equ 1	11	DEBUG equ 1
12		12
13	include 'proc32.inc'	13	include 'proc32.inc'
14	include 'imports.inc'	14	include 'imports.inc'
15		15
16	API_VERSION equ 0x01000100	16	API_VERSION equ 0x01000100
17	DEBUG_IRQ equ 0	17	DEBUG_IRQ equ 0
18		18
19	USE_COM_IRQ equ 0 ;make irq 3 and irq 4 available for PCI devices	19	USE_COM_IRQ equ 0 ;make irq 3 and irq 4 available for PCI devices
20	IRQ_REMAP equ 0	20	IRQ_REMAP equ 0
21	IRQ_LINE equ 0	21	IRQ_LINE equ 0
22		22
23		23
24	;irq 0,1,2,8,12,13 íåäîñòóïíû	24	;irq 0,1,2,8,12,13 íåäîñòóïíû
25	; FEDCBA9876543210	25	; FEDCBA9876543210
26	VALID_IRQ equ 1100111011111000b	26	VALID_IRQ equ 1100111011111000b
27	ATTCH_IRQ equ 0000111010100000b	27	ATTCH_IRQ equ 0000111010100000b
28		28
29	if USE_COM_IRQ	29	if USE_COM_IRQ
30	ATTCH_IRQ equ 0000111010111000b	30	ATTCH_IRQ equ 0000111010111000b
31	end if	31	end if
32		32
33	CPU_FREQ equ 2600d	33	CPU_FREQ equ 2600d
34		34
35	BIT0 EQU 0x00000001	35	BIT0 EQU 0x00000001
36	BIT1 EQU 0x00000002	36	BIT1 EQU 0x00000002
37	BIT2 EQU 0x00000004	37	BIT2 EQU 0x00000004
38	BIT3 EQU 0x00000008	38	BIT3 EQU 0x00000008
39	BIT4 EQU 0x00000010	39	BIT4 EQU 0x00000010
40	BIT5 EQU 0x00000020	40	BIT5 EQU 0x00000020
41	BIT6 EQU 0x00000040	41	BIT6 EQU 0x00000040
42	BIT7 EQU 0x00000080	42	BIT7 EQU 0x00000080
43	BIT8 EQU 0x00000100	43	BIT8 EQU 0x00000100
44	BIT9 EQU 0x00000200	44	BIT9 EQU 0x00000200
45	BIT10 EQU 0x00000400	45	BIT10 EQU 0x00000400
46	BIT11 EQU 0x00000800	46	BIT11 EQU 0x00000800
47	BIT12 EQU 0x00001000	47	BIT12 EQU 0x00001000
48	BIT13 EQU 0x00002000	48	BIT13 EQU 0x00002000
49	BIT14 EQU 0x00004000	49	BIT14 EQU 0x00004000
50	BIT15 EQU 0x00008000	50	BIT15 EQU 0x00008000
51	BIT16 EQU 0x00010000	51	BIT16 EQU 0x00010000
52	BIT17 EQU 0x00020000	52	BIT17 EQU 0x00020000
53	BIT18 EQU 0x00040000	53	BIT18 EQU 0x00040000
54	BIT19 EQU 0x00080000	54	BIT19 EQU 0x00080000
55	BIT20 EQU 0x00100000	55	BIT20 EQU 0x00100000
56	BIT21 EQU 0x00200000	56	BIT21 EQU 0x00200000
57	BIT22 EQU 0x00400000	57	BIT22 EQU 0x00400000
58	BIT23 EQU 0x00800000	58	BIT23 EQU 0x00800000
59	BIT24 EQU 0x00100000	59	BIT24 EQU 0x00100000
60	BIT25 EQU 0x02000000	60	BIT25 EQU 0x02000000
61	BIT26 EQU 0x04000000	61	BIT26 EQU 0x04000000
62	BIT27 EQU 0x08000000	62	BIT27 EQU 0x08000000
63	BIT28 EQU 0x10000000	63	BIT28 EQU 0x10000000
64	BIT29 EQU 0x20000000	64	BIT29 EQU 0x20000000
65	BIT30 EQU 0x40000000	65	BIT30 EQU 0x40000000
66	BIT31 EQU 0x80000000	66	BIT31 EQU 0x80000000
67		67
68	VID_SIS equ 0x1039	68	VID_SIS equ 0x1039
69	CTRL_SIS equ 0x7012	69	CTRL_SIS equ 0x7012
70		70
71	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list	71	PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list
72	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register	72	PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register
73	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index	73	PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index
74	PCM_OUT_SR_REG equ 0x18 ; PCM out Status register	74	PCM_OUT_SR_REG equ 0x18 ; PCM out Status register
75	PCM_OUT_PIV_REG equ 0x1a ; PCM out prefetched index	75	PCM_OUT_PIV_REG equ 0x1a ; PCM out prefetched index
76	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index	76	PCM_OUT_CIV_REG equ 0x14 ; PCM out current index
77		77
78	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register	78	PCM_IN_CR_REG equ 0x0b ; PCM in Control Register
79	MC_IN_CR_REG equ 0x2b ; MIC in Control Register	79	MC_IN_CR_REG equ 0x2b ; MIC in Control Register
80	RR equ BIT1 ; reset registers. Nukes all regs	80	RR equ BIT1 ; reset registers. Nukes all regs
81		81
82	CODEC_MASTER_VOL_REG equ 0x02	82	CODEC_MASTER_VOL_REG equ 0x02
83	CODEC_AUX_VOL equ 0x04 ;	83	CODEC_AUX_VOL equ 0x04 ;
84	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume	84	CODEC_PCM_OUT_REG equ 0x18 ; PCM output volume
85	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio	85	CODEC_EXT_AUDIO_REG equ 0x28 ; extended audio
86	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control	86	CODEC_EXT_AUDIO_CTRL_REG equ 0x2a ; extended audio control
87	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate	87	CODEC_PCM_FRONT_DACRATE_REG equ 0x2c ; PCM out sample rate
88	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate	88	CODEC_PCM_SURND_DACRATE_REG equ 0x2e ; surround sound sample rate
89	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate	89	CODEC_PCM_LFE_DACRATE_REG equ 0x30 ; LFE sample rate
90		90
91	GLOB_CTRL equ 0x2C ; Global Control	91	GLOB_CTRL equ 0x2C ; Global Control
92	CTRL_STAT equ 0x30 ; Global Status	92	CTRL_STAT equ 0x30 ; Global Status
93	CTRL_CAS equ 0x34 ; Codec Access Semiphore	93	CTRL_CAS equ 0x34 ; Codec Access Semiphore
94		94
95	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit	95	CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit
96		96
97	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready	97	CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
98		98
99	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status	99	CTRL_ST_RCS equ 0x00008000 ; Read Completion Status
100		100
101	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable	101	CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable
102	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off	102	CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off
103	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset	103	CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset
104	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset	104	CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset
105	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable	105	CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable
106		106
107	CODEC_REG_POWERDOWN equ 0x26	107	CODEC_REG_POWERDOWN equ 0x26
108	CODEC_REG_ST equ 0x26	108	CODEC_REG_ST equ 0x26
109		109
110	SRV_GETVERSION equ 0	110	SRV_GETVERSION equ 0
111	DEV_PLAY equ 1	111	DEV_PLAY equ 1
112	DEV_STOP equ 2	112	DEV_STOP equ 2
113	DEV_CALLBACK equ 3	113	DEV_CALLBACK equ 3
114	DEV_SET_BUFF equ 4	114	DEV_SET_BUFF equ 4
115	DEV_NOTIFY equ 5	115	DEV_NOTIFY equ 5
116	DEV_SET_MASTERVOL equ 6	116	DEV_SET_MASTERVOL equ 6
117	DEV_GET_MASTERVOL equ 7	117	DEV_GET_MASTERVOL equ 7
118	DEV_GET_INFO equ 8	118	DEV_GET_INFO equ 8
119		119
120	struc AC_CNTRL ;AC controller base class	120	struc AC_CNTRL ;AC controller base class
121	{ .bus dd ?	121	{ .bus dd ?
122	.devfn dd ?	122	.devfn dd ?
123		123
124	.vendor dd ?	124	.vendor dd ?
125	.dev_id dd ?	125	.dev_id dd ?
126	.pci_cmd dd ?	126	.pci_cmd dd ?
127	.pci_stat dd ?	127	.pci_stat dd ?
128		128
129	.codec_io_base dd ?	129	.codec_io_base dd ?
130	.codec_mem_base dd ?	130	.codec_mem_base dd ?
131		131
132	.ctrl_io_base dd ?	132	.ctrl_io_base dd ?
133	.ctrl_mem_base dd ?	133	.ctrl_mem_base dd ?
134	.cfg_reg dd ?	134	.cfg_reg dd ?
135	.int_line dd ?	135	.int_line dd ?
136		136
137	.vendor_ids dd ? ;vendor id string	137	.vendor_ids dd ? ;vendor id string
138	.ctrl_ids dd ? ;hub id string	138	.ctrl_ids dd ? ;hub id string
139		139
140	.buffer dd ?	140	.buffer dd ?
141		141
142	.notify_pos dd ?	142	.notify_pos dd ?
143	.notify_task dd ?	143	.notify_task dd ?
144		144
145	.lvi_reg dd ?	145	.lvi_reg dd ?
146	.ctrl_setup dd ?	146	.ctrl_setup dd ?
147	.user_callback dd ?	147	.user_callback dd ?
148	.codec_read16 dd ?	148	.codec_read16 dd ?
149	.codec_write16 dd ?	149	.codec_write16 dd ?
150		150
151	.ctrl_read8 dd ?	151	.ctrl_read8 dd ?
152	.ctrl_read16 dd ?	152	.ctrl_read16 dd ?
153	.ctrl_read32 dd ?	153	.ctrl_read32 dd ?
154		154
155	.ctrl_write8 dd ?	155	.ctrl_write8 dd ?
156	.ctrl_write16 dd ?	156	.ctrl_write16 dd ?
157	.ctrl_write32 dd ?	157	.ctrl_write32 dd ?
158	}	158	}
159		159
160	struc CODEC ;Audio Chip base class	160	struc CODEC ;Audio Chip base class
161	{	161	{
162	.chip_id dd ?	162	.chip_id dd ?
163	.flags dd ?	163	.flags dd ?
164	.status dd ?	164	.status dd ?
165		165
166	.ac_vendor_ids dd ? ;ac vendor id string	166	.ac_vendor_ids dd ? ;ac vendor id string
167	.chip_ids dd ? ;chip model string	167	.chip_ids dd ? ;chip model string
168		168
169	.shadow_flag dd ?	169	.shadow_flag dd ?
170	dd ?	170	dd ?
171		171
172	.regs dw ? ; codec registers	172	.regs dw ? ; codec registers
173	.reg_master_vol dw ? ;0x02	173	.reg_master_vol dw ? ;0x02
174	.reg_aux_out_vol dw ? ;0x04	174	.reg_aux_out_vol dw ? ;0x04
175	.reg_mone_vol dw ? ;0x06	175	.reg_mone_vol dw ? ;0x06
176	.reg_master_tone dw ? ;0x08	176	.reg_master_tone dw ? ;0x08
177	.reg_beep_vol dw ? ;0x0A	177	.reg_beep_vol dw ? ;0x0A
178	.reg_phone_vol dw ? ;0x0C	178	.reg_phone_vol dw ? ;0x0C
179	.reg_mic_vol dw ? ;0x0E	179	.reg_mic_vol dw ? ;0x0E
180	.reg_line_in_vol dw ? ;0x10	180	.reg_line_in_vol dw ? ;0x10
181	.reg_cd_vol dw ? ;0x12	181	.reg_cd_vol dw ? ;0x12
182	.reg_video_vol dw ? ;0x14	182	.reg_video_vol dw ? ;0x14
183	.reg_aux_in_vol dw ? ;0x16	183	.reg_aux_in_vol dw ? ;0x16
184	.reg_pcm_out_vol dw ? ;0x18	184	.reg_pcm_out_vol dw ? ;0x18
185	.reg_rec_select dw ? ;0x1A	185	.reg_rec_select dw ? ;0x1A
186	.reg_rec_gain dw ? ;0x1C	186	.reg_rec_gain dw ? ;0x1C
187	.reg_rec_gain_mic dw ? ;0x1E	187	.reg_rec_gain_mic dw ? ;0x1E
188	.reg_gen dw ? ;0x20	188	.reg_gen dw ? ;0x20
189	.reg_3d_ctrl dw ? ;0X22	189	.reg_3d_ctrl dw ? ;0X22
190	.reg_page dw ? ;0X24	190	.reg_page dw ? ;0X24
191	.reg_powerdown dw ? ;0x26	191	.reg_powerdown dw ? ;0x26
192	.reg_ext_audio dw ? ;0x28	192	.reg_ext_audio dw ? ;0x28
193	.reg_ext_st dw ? ;0x2a	193	.reg_ext_st dw ? ;0x2a
194	.reg_pcm_front_rate dw ? ;0x2c	194	.reg_pcm_front_rate dw ? ;0x2c
195	.reg_pcm_surr_rate dw ? ;0x2e	195	.reg_pcm_surr_rate dw ? ;0x2e
196	.reg_lfe_rate dw ? ;0x30	196	.reg_lfe_rate dw ? ;0x30
197	.reg_pcm_in_rate dw ? ;0x32	197	.reg_pcm_in_rate dw ? ;0x32
198	dw ? ;0x34	198	dw ? ;0x34
199	.reg_cent_lfe_vol dw ? ;0x36	199	.reg_cent_lfe_vol dw ? ;0x36
200	.reg_surr_vol dw ? ;0x38	200	.reg_surr_vol dw ? ;0x38
201	.reg_spdif_ctrl dw ? ;0x3A	201	.reg_spdif_ctrl dw ? ;0x3A
202	dw ? ;0x3C	202	dw ? ;0x3C
203	dw ? ;0x3E	203	dw ? ;0x3E
204	dw ? ;0x40	204	dw ? ;0x40
205	dw ? ;0x42	205	dw ? ;0x42
206	dw ? ;0x44	206	dw ? ;0x44
207	dw ? ;0x46	207	dw ? ;0x46
208	dw ? ;0x48	208	dw ? ;0x48
209	dw ? ;0x4A	209	dw ? ;0x4A
210	dw ? ;0x4C	210	dw ? ;0x4C
211	dw ? ;0x4E	211	dw ? ;0x4E
212	dw ? ;0x50	212	dw ? ;0x50
213	dw ? ;0x52	213	dw ? ;0x52
214	dw ? ;0x54	214	dw ? ;0x54
215	dw ? ;0x56	215	dw ? ;0x56
216	dw ? ;0x58	216	dw ? ;0x58
217	dw ? ;0x5A	217	dw ? ;0x5A
218	dw ? ;0x5C	218	dw ? ;0x5C
219	dw ? ;0x5E	219	dw ? ;0x5E
220	.reg_page_0 dw ? ;0x60	220	.reg_page_0 dw ? ;0x60
221	.reg_page_1 dw ? ;0x62	221	.reg_page_1 dw ? ;0x62
222	.reg_page_2 dw ? ;0x64	222	.reg_page_2 dw ? ;0x64
223	.reg_page_3 dw ? ;0x66	223	.reg_page_3 dw ? ;0x66
224	.reg_page_4 dw ? ;0x68	224	.reg_page_4 dw ? ;0x68
225	.reg_page_5 dw ? ;0x6A	225	.reg_page_5 dw ? ;0x6A
226	.reg_page_6 dw ? ;0x6C	226	.reg_page_6 dw ? ;0x6C
227	.reg_page_7 dw ? ;0x6E	227	.reg_page_7 dw ? ;0x6E
228	dw ? ;0x70	228	dw ? ;0x70
229	dw ? ;0x72	229	dw ? ;0x72
230	dw ? ;0x74	230	dw ? ;0x74
231	dw ? ;0x76	231	dw ? ;0x76
232	dw ? ;0x78	232	dw ? ;0x78
233	dw ? ;0x7A	233	dw ? ;0x7A
234	.reg_vendor_id_1 dw ? ;0x7C	234	.reg_vendor_id_1 dw ? ;0x7C
235	.reg_vendor_id_2 dw ? ;0x7E	235	.reg_vendor_id_2 dw ? ;0x7E
236		236
237		237
238	.reset dd ? ;virual	238	.reset dd ? ;virual
239	.set_master_vol dd ?	239	.set_master_vol dd ?
240	}	240	}
241		241
242	struc CTRL_INFO	242	struc CTRL_INFO
243	{ .pci_cmd dd ?	243	{ .pci_cmd dd ?
244	.irq dd ?	244	.irq dd ?
245	.glob_cntrl dd ?	245	.glob_cntrl dd ?
246	.glob_sta dd ?	246	.glob_sta dd ?
247	.codec_io_base dd ?	247	.codec_io_base dd ?
248	.ctrl_io_base dd ?	248	.ctrl_io_base dd ?
249	.codec_mem_base dd ?	249	.codec_mem_base dd ?
250	.ctrl_mem_base dd ?	250	.ctrl_mem_base dd ?
251	.codec_id dd ?	251	.codec_id dd ?
252	}	252	}
253		253
254	struc IOCTL	254	struc IOCTL
255	{ .handle dd ?	255	{ .handle dd ?
256	.io_code dd ?	256	.io_code dd ?
257	.input dd ?	257	.input dd ?
258	.inp_size dd ?	258	.inp_size dd ?
259	.output dd ?	259	.output dd ?
260	.out_size dd ?	260	.out_size dd ?
261	}	261	}
262		262
263	virtual at 0	263	virtual at 0
264	IOCTL IOCTL	264	IOCTL IOCTL
265	end virtual	265	end virtual
266		266
267	EVENT_NOTIFY equ 0x00000200	267	EVENT_NOTIFY equ 0x00000200
268		268
269	public START	269	public START
270	public service_proc	270	public service_proc
271	public version	271	public version
272		272
273	section '.flat' code readable align 16	273	section '.flat' code readable align 16
274		274
275	proc START stdcall, state:dword	275	proc START stdcall, state:dword
276		276
277	cmp [state], 1	277	cmp [state], 1
278	jne .stop	278	jne .stop
279		279
280	if DEBUG	280	if DEBUG
281	mov esi, msgInit	281	mov esi, msgInit
282	call SysMsgBoardStr	282	call SysMsgBoardStr
283	end if	283	end if
284		284
285	call detect_controller	285	call detect_controller
286	test eax, eax	286	test eax, eax
287	jz .fail	287	jz .fail
288		288
289	if DEBUG	289	if DEBUG
290	mov esi, [ctrl.vendor_ids]	290	mov esi, [ctrl.vendor_ids]
291	call SysMsgBoardStr	291	call SysMsgBoardStr
292	mov esi, [ctrl.ctrl_ids]	292	mov esi, [ctrl.ctrl_ids]
293	call SysMsgBoardStr	293	call SysMsgBoardStr
294		294
295	end if	295	end if
296		296
297	call init_controller	297	call init_controller
298	test eax, eax	298	test eax, eax
299	jz .fail	299	jz .fail
300		300
301	call init_codec	301	call init_codec
302	test eax, eax	302	test eax, eax
303	jz .fail	303	jz .fail
304		304
305	call reset_controller	305	call reset_controller
306	call setup_codec	306	call setup_codec
307		307
308	mov esi, msgPrimBuff	308	mov esi, msgPrimBuff
309	call SysMsgBoardStr	309	call SysMsgBoardStr
310	call create_primary_buff	310	call create_primary_buff
311	mov esi, msgDone	311	mov esi, msgDone
312	call SysMsgBoardStr	312	call SysMsgBoardStr
313		313
314	if IRQ_REMAP	314	if IRQ_REMAP
315	pushf	315	pushf
316	cli	316	cli
317		317
318	mov ebx, [ctrl.int_line]	318	mov ebx, [ctrl.int_line]
319	in al, 0xA1	319	in al, 0xA1
320	mov ah, al	320	mov ah, al
321	in al, 0x21	321	in al, 0x21
322	test ebx, ebx	322	test ebx, ebx
323	jz .skip	323	jz .skip
324	bts ax, bx ;mask old line	324	bts ax, bx ;mask old line
325	.skip	325	.skip
326	bts ax, IRQ_LINE ;mask new ine	326	bts ax, IRQ_LINE ;mask new ine
327	out 0x21, al	327	out 0x21, al
328	mov al, ah	328	mov al, ah
329	out 0xA1, al	329	out 0xA1, al
330	;remap IRQ	330	;remap IRQ
331	stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE	331	stdcall PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
332		332
333	mov dx, 0x4d0 ;8259 ELCR1	333	mov dx, 0x4d0 ;8259 ELCR1
334	in al, dx	334	in al, dx
335	bts ax, IRQ_LINE	335	bts ax, IRQ_LINE
336	out dx, al ;set level-triggered mode	336	out dx, al ;set level-triggered mode
337	mov [ctrl.int_line], IRQ_LINE	337	mov [ctrl.int_line], IRQ_LINE
338	popf	338	popf
339	mov esi, msgRemap	339	mov esi, msgRemap
340	call SysMsgBoardStr	340	call SysMsgBoardStr
341	end if	341	end if
342		342
343	mov eax, VALID_IRQ	343	mov eax, VALID_IRQ
344	mov ebx, [ctrl.int_line]	344	mov ebx, [ctrl.int_line]
345	mov esi, msgInvIRQ	345	mov esi, msgInvIRQ
346	bt eax, ebx	346	bt eax, ebx
347	jnc .fail_msg	347	jnc .fail_msg
348	mov eax, ATTCH_IRQ	348	mov eax, ATTCH_IRQ
349	mov esi, msgAttchIRQ	349	mov esi, msgAttchIRQ
350	bt eax, ebx	350	bt eax, ebx
351	jnc .fail_msg	351	jnc .fail_msg
352		352
353	stdcall AttachIntHandler, ebx, ac97_irq, dword 0	353	stdcall AttachIntHandler, ebx, ac97_irq, dword 0
354	.reg:	354	.reg:
355	stdcall RegService, sz_sound_srv, service_proc	355	stdcall RegService, sz_sound_srv, service_proc
356	ret	356	ret
357	.fail:	357	.fail:
358	if DEBUG	358	if DEBUG
359	mov esi, msgFail	359	mov esi, msgFail
360	call SysMsgBoardStr	360	call SysMsgBoardStr
361	end if	361	end if
362	xor eax, eax	362	xor eax, eax
363	ret	363	ret
364	.fail_msg:	364	.fail_msg:
365	call SysMsgBoardStr	365	call SysMsgBoardStr
366	xor eax, eax	366	xor eax, eax
367	ret	367	ret
368	.stop:	368	.stop:
369	call stop	369	call stop
370	xor eax, eax	370	xor eax, eax
371	ret	371	ret
372	endp	372	endp
373		373
374	handle equ IOCTL.handle	374	handle equ IOCTL.handle
375	io_code equ IOCTL.io_code	375	io_code equ IOCTL.io_code
376	input equ IOCTL.input	376	input equ IOCTL.input
377	inp_size equ IOCTL.inp_size	377	inp_size equ IOCTL.inp_size
378	output equ IOCTL.output	378	output equ IOCTL.output
379	out_size equ IOCTL.out_size	379	out_size equ IOCTL.out_size
380		380
381	align 4	381	align 4
382	proc service_proc stdcall, ioctl:dword	382	proc service_proc stdcall, ioctl:dword
383		383
384	mov edi, [ioctl]	384	mov edi, [ioctl]
385	mov eax, [edi+io_code]	385	mov eax, [edi+io_code]
386		386
387	cmp eax, SRV_GETVERSION	387	cmp eax, SRV_GETVERSION
388	jne @F	388	jne @F
389		389
390	mov eax, [edi+output]	390	mov eax, [edi+output]
391	cmp [edi+out_size], 4	391	cmp [edi+out_size], 4
392	jne .fail	392	jne .fail
393		393
394	mov [eax], dword API_VERSION	394	mov [eax], dword API_VERSION
395	xor eax, eax	395	xor eax, eax
396	ret	396	ret
397	@@:	397	@@:
398	cmp eax, DEV_PLAY	398	cmp eax, DEV_PLAY
399	jne @F	399	jne @F
400	if DEBUG	400	if DEBUG
401	mov esi, msgPlay	401	mov esi, msgPlay
402	call SysMsgBoardStr	402	call SysMsgBoardStr
403	end if	403	end if
404	call play	404	call play
405	ret	405	ret
406	@@:	406	@@:
407	cmp eax, DEV_STOP	407	cmp eax, DEV_STOP
408	jne @F	408	jne @F
409	if DEBUG	409	if DEBUG
410	mov esi, msgStop	410	mov esi, msgStop
411	call SysMsgBoardStr	411	call SysMsgBoardStr
412	end if	412	end if
413	call stop	413	call stop
414	ret	414	ret
415	@@:	415	@@:
416	cmp eax, DEV_CALLBACK	416	cmp eax, DEV_CALLBACK
417	jne @F	417	jne @F
418	mov ebx, [edi+input]	418	mov ebx, [edi+input]
419	stdcall set_callback, [ebx]	419	stdcall set_callback, [ebx]
420	ret	420	ret
421	@@:	421	@@:
422	cmp eax, DEV_SET_MASTERVOL	422	cmp eax, DEV_SET_MASTERVOL
423	jne @F	423	jne @F
424	mov eax, [edi+input]	424	mov eax, [edi+input]
425	mov eax, [eax]	425	mov eax, [eax]
426	call set_master_vol ;eax= vol	426	call set_master_vol ;eax= vol
427	ret	427	ret
428	@@:	428	@@:
429	cmp eax, DEV_GET_MASTERVOL	429	cmp eax, DEV_GET_MASTERVOL
430	jne @F	430	jne @F
431	mov ebx, [edi+output]	431	mov ebx, [edi+output]
432	stdcall get_master_vol, ebx	432	stdcall get_master_vol, ebx
433	ret	433	ret
434	;@@:	434	;@@:
435	; cmp eax, DEV_GET_INFO	435	; cmp eax, DEV_GET_INFO
436	; jne @F	436	; jne @F
437	; mov ebx, [edi+output]	437	; mov ebx, [edi+output]
438	; stdcall get_dev_info, ebx	438	; stdcall get_dev_info, ebx
439	; ret	439	; ret
440	@@:	440	@@:
441	.fail:	441	.fail:
442	or eax, -1	442	or eax, -1
443	ret	443	ret
444	endp	444	endp
445		445
446	restore handle	446	restore handle
447	restore io_code	447	restore io_code
448	restore input	448	restore input
449	restore inp_size	449	restore inp_size
450	restore output	450	restore output
451	restore out_size	451	restore out_size
452		452
453	align 4	453	align 4
454	proc ac97_irq	454	proc ac97_irq
455		455
456	if DEBUG_IRQ	456	if DEBUG_IRQ
457	mov esi, msgIRQ	457	mov esi, msgIRQ
458	call SysMsgBoardStr	458	call SysMsgBoardStr
459	end if	459	end if
460		460
461	mov edx, PCM_OUT_CR_REG	461	mov edx, PCM_OUT_CR_REG
462	mov al, 0x10	462	mov al, 0x10
463	call [ctrl.ctrl_write8]	463	call [ctrl.ctrl_write8]
464		464
465	mov ax, 0x1c	465	mov ax, 0x1c
466	mov edx, PCM_OUT_SR_REG	466	mov edx, PCM_OUT_SR_REG
467	call [ctrl.ctrl_write16]	467	call [ctrl.ctrl_write16]
468		468
469	mov edx, PCM_OUT_CIV_REG	469	mov edx, PCM_OUT_CIV_REG
470	call [ctrl.ctrl_read8]	470	call [ctrl.ctrl_read8]
471		471
472	and eax, 0x1F	472	and eax, 0x1F
473	cmp eax, [civ_val]	473	cmp eax, [civ_val]
474	je .skip	474	je .skip
475		475
476	mov [civ_val], eax	476	mov [civ_val], eax
477	dec eax	477	dec eax
478	and eax, 0x1F	478	and eax, 0x1F
479	mov [ctrl.lvi_reg], eax	479	mov [ctrl.lvi_reg], eax
480		480
481	mov edx, PCM_OUT_LVI_REG	481	mov edx, PCM_OUT_LVI_REG
482	call [ctrl.ctrl_write8]	482	call [ctrl.ctrl_write8]
483		483
484	mov edx, PCM_OUT_CR_REG	484	mov edx, PCM_OUT_CR_REG
485	mov ax, 0x11	485	mov ax, 0x11
486	call [ctrl.ctrl_write8]	486	call [ctrl.ctrl_write8]
487		487
488	mov eax, [civ_val]	488	mov eax, [civ_val]
489	add eax, 1	489	add eax, 1
490	and eax, 31	490	and eax, 31
491	mov ebx, dword [buff_list+eax*4]	491	mov ebx, dword [buff_list+eax*4]
492		492
493	cmp [ctrl.user_callback], 0	493	cmp [ctrl.user_callback], 0
494	je @f	494	je @f
495		495
496	stdcall [ctrl.user_callback], ebx	496	stdcall [ctrl.user_callback], ebx
497	@@:	497	@@:
498	ret	498	ret
499		499
500	.skip:	500	.skip:

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