WebSVN – Kolibri OS – Diff – /kernel/trunk/detect/init_ata.inc


;-----------------------------------------------------------------------------
; find the IDE controller in the device list
;-----------------------------------------------------------------------------
        mov     ecx, IDE_controller_1
        mov     esi, pcidev_list
;--------------------------------------
align 4
.loop:
        mov     esi, [esi+PCIDEV.fd]
        cmp     esi, pcidev_list
        jz      find_IDE_controller_done
 
        mov     eax, [esi+PCIDEV.class]
        shr     eax, 4
        cmp     eax, 0x01018
        jnz     .loop
;--------------------------------------
.found:
        mov     eax, [esi+PCIDEV.class]
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
        mov     [ecx+IDE_DATA.ProgrammingInterface], eax
 
        mov     ah, [esi+PCIDEV.bus]
        mov     al, 2
        mov     bh, [esi+PCIDEV.devfn]
;--------------------------------------
        mov     bl, 0x10
        push    eax
        call    pci_read_reg
        and     eax, 0xFFFC
        cmp     ax, 0
        je      @f
 
        cmp     ax, 1
        jne     .show_BAR0
;--------------------------------------
@@:
        mov     ax, 0x1F0
;--------------------------------------
.show_BAR0:
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', ax
        mov     [StandardATABases], ax
        mov     [ecx+IDE_DATA.BAR0_val], ax
        pop     eax
;--------------------------------------
        mov     bl, 0x14
        push    eax
        call    pci_read_reg
        and     eax, 0xFFFC
        cmp     ax, 0
        je      @f
 
        cmp     ax, 1
        jne     .show_BAR1
;--------------------------------------
@@:
        mov     ax, 0x3F4
;--------------------------------------
.show_BAR1:
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', ax
        mov     [ecx+IDE_DATA.BAR1_val], ax
        pop     eax
;--------------------------------------
        mov     bl, 0x18
        push    eax
        call    pci_read_reg
        and     eax, 0xFFFC
        cmp     ax, 0
        je      @f
 
        cmp     ax, 1
        jne     .show_BAR2
;--------------------------------------
@@:
        mov     ax, 0x170
;--------------------------------------
.show_BAR2:
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', ax
        mov     [StandardATABases+2], ax
        mov     [ecx+IDE_DATA.BAR2_val], ax
        pop     eax
;--------------------------------------
        mov     bl, 0x1C
        push    eax
        call    pci_read_reg
        and     eax, 0xFFFC
        cmp     ax, 0
        je      @f
 
        cmp     ax, 1
        jne     .show_BAR3
;--------------------------------------
@@:
        mov     ax, 0x374
;--------------------------------------
.show_BAR3:
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', ax
        mov     [ecx+IDE_DATA.BAR3_val], ax
        pop     eax
;--------------------------------------
        mov     bl, 0x20
        push    eax
        call    pci_read_reg
        and     eax, 0xFFFC
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
        mov     [ecx+IDE_DATA.RegsBaseAddres], ax
        pop     eax
;--------------------------------------
        mov     bl, 0x3C
        push    eax
        call    pci_read_reg
        and     eax, 0xFF
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
        mov     [ecx+IDE_DATA.Interrupt], ax
        pop     eax
 
        add     ecx, sizeof.IDE_DATA
;--------------------------------------
        jmp     .loop
;-----------------------------------------------------------------------------
uglobal
align 4
;--------------------------------------
IDE_controller_pointer dd ?
;--------------------------------------
IDE_controller_1 IDE_DATA
IDE_controller_2 IDE_DATA
IDE_controller_3 IDE_DATA
;--------------------------------------
cache_ide0  IDE_CACHE
cache_ide1  IDE_CACHE
cache_ide2  IDE_CACHE
cache_ide3  IDE_CACHE
cache_ide4  IDE_CACHE
cache_ide5  IDE_CACHE
cache_ide6  IDE_CACHE
cache_ide7  IDE_CACHE
cache_ide8  IDE_CACHE
cache_ide9  IDE_CACHE
cache_ide10 IDE_CACHE
cache_ide11 IDE_CACHE
;--------------------------------------
endg
;-----------------------------------------------------------------------------
; START of initialisation IDE ATA code
;-----------------------------------------------------------------------------
Init_IDE_ATA_controller:
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
        jne     @f
 
        ret
;--------------------------------------
@@:
        mov     esi, boot_disabling_ide
        call    boot_log
;--------------------------------------
; Disable IDE interrupts, because the search
; for IDE partitions is in the PIO mode.
;--------------------------------------
.disable_IDE_interrupt:
; Disable interrupts in IDE controller for PIO
        mov     al, 2
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
        add     dx, 2 ;0x3F6
        out     dx, al
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
        add     dx, 2 ;0x376
        out     dx, al
;-----------------------------------------------------------------------------
; set current ata bases
@@:
        mov     ax, [ecx+IDE_DATA.BAR0_val]
        mov     [StandardATABases], ax
        mov     ax, [ecx+IDE_DATA.BAR2_val]
        mov     [StandardATABases+2], ax
 
        mov     esi, boot_detecthdcd
        call    boot_log
;--------------------------------------
include 'dev_hdcd.inc'
;--------------------------------------
        ret
;-----------------------------------------------------------------------------
Init_IDE_ATA_controller_2:
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
        jne     @f
 
        ret
;--------------------------------------
@@:
        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
; test whether it is our interrupt?
        add     dx, 2
        in      al, dx
        test    al, 100b
        jz      @f
; clear Bus Master IDE Status register
; clear Interrupt bit
        out     dx, al
;--------------------------------------
@@:
        add     dx, 8
; test whether it is our interrupt?
        in      al, dx
        test    al, 100b
        jz      @f
; clear Bus Master IDE Status register
; clear Interrupt bit
        out     dx, al
;--------------------------------------
@@:
; read status register and remove the interrupt request
        mov     dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
        add     dx, 0x7 ;0x1F7
        in      al, dx
        mov     dx, [ecx+IDE_DATA.BAR2_val] ;0x170
        add     dx, 0x7 ;0x177
        in      al, dx
;-----------------------------------------------------------------------------
;        push    eax edx
;        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
;        xor     eax, eax
;        add     dx, 2
;        in      al, dx
;        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
 
;        add     dx, 8
;        in      al, dx
;        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
;        pop     edx eax
 
;        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
;        setnz   [ecx+IDE_DATA.dma_hdd]
;-----------------------------------------------------------------------------
; set interrupts for IDE Controller
;-----------------------------------------------------------------------------
        mov     esi, boot_set_int_IDE
        call    boot_log
.set_interrupts_for_IDE_controllers:
        mov     eax, [ecx+IDE_DATA.ProgrammingInterface]
        cmp     ax, 0x0180
        je      .pata_ide
 
        cmp     ax, 0x018a
        jne     .sata_ide
;--------------------------------------
.pata_ide:
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
        je      .end_set_interrupts
 
        push    ecx
        stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
        stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
        pop     ecx
 
        jmp     .enable_IDE_interrupt
;--------------------------------------
.sata_ide:
        cmp     ax, 0x0185
        je      .sata_ide_1
 
        cmp     ax, 0x018f
        jne     .end_set_interrupts
;--------------------------------------
.sata_ide_1:
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
        je      .end_set_interrupts
 
        mov     ax, [ecx+IDE_DATA.Interrupt]
        movzx   eax, al
        push    ecx
        stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
        pop     ecx
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
;--------------------------------------
.enable_IDE_interrupt:
        mov     esi, boot_enabling_ide
        call    boot_log
; Enable interrupts in IDE controller for DMA
        xor     ebx, ebx
        cmp     ecx, IDE_controller_2
        jne     @f
 
        add     ebx, 5
        jmp     .check_DRIVE_DATA
;--------------------------------------
@@:
        cmp     ecx, IDE_controller_3
        jne     .check_DRIVE_DATA
 
        add     ebx, 10
;--------------------------------------
.check_DRIVE_DATA:
        mov     al, 0
        mov     ah, [ebx+DRIVE_DATA+1]
        test    ah, 10100000b
        jz      @f
 
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], byte 0
 
        jmp     .ch2_check
;--------------------------------------
@@:
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
        add     dx, 2 ;0x3F6
        out     dx, al
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], byte 1
;--------------------------------------
.ch2_check:
        test    ah, 1010b
        jz      @f
 
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], byte 0
 
        jmp     .end_set_interrupts
;--------------------------------------
@@:
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
        add     dx, 2 ;0x376
        out     dx, al
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], byte 1
;--------------------------------------
.end_set_interrupts:
 
 
 
 
 
 
 
 
 
 
 
        ret
;-----------------------------------------------------------------------------
; END of initialisation IDE ATA code
;-----------------------------------------------------------------------------
find_IDE_controller_done:
        mov     ecx, IDE_controller_1
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller
        mov     ecx, IDE_controller_2
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller
        mov     ecx, IDE_controller_3
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller
;-----------------------------------------------------------------------------
        mov     esi, boot_getcache
        call    boot_log
include 'getcache.inc'
;-----------------------------------------------------------------------------
        mov     esi, boot_detectpart
        call    boot_log
include 'sear_par.inc'
;-----------------------------------------------------------------------------
        mov     ecx, IDE_controller_1
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller_2
        mov     ecx, IDE_controller_2
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller_2
        mov     ecx, IDE_controller_3
        mov     [IDE_controller_pointer], ecx
        call    Init_IDE_ATA_controller_2
;-----------------------------------------------------------------------------

Rev 4711	Rev 4720
1	;-----------------------------------------------------------------------------	1	;-----------------------------------------------------------------------------
2	; find the IDE controller in the device list	2	; find the IDE controller in the device list
3	;-----------------------------------------------------------------------------	3	;-----------------------------------------------------------------------------
4	mov ecx, IDE_controller_1	4	mov ecx, IDE_controller_1
5	mov esi, pcidev_list	5	mov esi, pcidev_list
6	;--------------------------------------	6	;--------------------------------------
7	align 4	7	align 4
8	.loop:	8	.loop:
9	mov esi, [esi+PCIDEV.fd]	9	mov esi, [esi+PCIDEV.fd]
10	cmp esi, pcidev_list	10	cmp esi, pcidev_list
11	jz find_IDE_controller_done	11	jz find_IDE_controller_done
12		12
13	mov eax, [esi+PCIDEV.class]	13	mov eax, [esi+PCIDEV.class]
14	shr eax, 4	14	shr eax, 4
15	cmp eax, 0x01018	15	cmp eax, 0x01018
16	jnz .loop	16	jnz .loop
17	;--------------------------------------	17	;--------------------------------------
18	.found:	18	.found:
19	mov eax, [esi+PCIDEV.class]	19	mov eax, [esi+PCIDEV.class]
20	DEBUGF 1, 'K : IDE controller programming interface %x\n', eax	20	DEBUGF 1, 'K : IDE controller programming interface %x\n', eax
21	mov [ecx+IDE_DATA.ProgrammingInterface], eax	21	mov [ecx+IDE_DATA.ProgrammingInterface], eax
22		22
23	mov ah, [esi+PCIDEV.bus]	23	mov ah, [esi+PCIDEV.bus]
24	mov al, 2	24	mov al, 2
25	mov bh, [esi+PCIDEV.devfn]	25	mov bh, [esi+PCIDEV.devfn]
26	;--------------------------------------	26	;--------------------------------------
27	mov bl, 0x10	27	mov bl, 0x10
28	push eax	28	push eax
29	call pci_read_reg	29	call pci_read_reg
30	and eax, 0xFFFC	30	and eax, 0xFFFC
31	cmp ax, 0	31	cmp ax, 0
32	je @f	32	je @f
33		33
34	cmp ax, 1	34	cmp ax, 1
35	jne .show_BAR0	35	jne .show_BAR0
36	;--------------------------------------	36	;--------------------------------------
37	@@:	37	@@:
38	mov ax, 0x1F0	38	mov ax, 0x1F0
39	;--------------------------------------	39	;--------------------------------------
40	.show_BAR0:	40	.show_BAR0:
41	DEBUGF 1, 'K : BAR0 IDE base addr %x\n', ax	41	DEBUGF 1, 'K : BAR0 IDE base addr %x\n', ax
42	mov [StandardATABases], ax	42	mov [StandardATABases], ax
43	mov [ecx+IDE_DATA.BAR0_val], ax	43	mov [ecx+IDE_DATA.BAR0_val], ax
44	pop eax	44	pop eax
45	;--------------------------------------	45	;--------------------------------------
46	mov bl, 0x14	46	mov bl, 0x14
47	push eax	47	push eax
48	call pci_read_reg	48	call pci_read_reg
49	and eax, 0xFFFC	49	and eax, 0xFFFC
50	cmp ax, 0	50	cmp ax, 0
51	je @f	51	je @f
52		52
53	cmp ax, 1	53	cmp ax, 1
54	jne .show_BAR1	54	jne .show_BAR1
55	;--------------------------------------	55	;--------------------------------------
56	@@:	56	@@:
57	mov ax, 0x3F4	57	mov ax, 0x3F4
58	;--------------------------------------	58	;--------------------------------------
59	.show_BAR1:	59	.show_BAR1:
60	DEBUGF 1, 'K : BAR1 IDE base addr %x\n', ax	60	DEBUGF 1, 'K : BAR1 IDE base addr %x\n', ax
61	mov [ecx+IDE_DATA.BAR1_val], ax	61	mov [ecx+IDE_DATA.BAR1_val], ax
62	pop eax	62	pop eax
63	;--------------------------------------	63	;--------------------------------------
64	mov bl, 0x18	64	mov bl, 0x18
65	push eax	65	push eax
66	call pci_read_reg	66	call pci_read_reg
67	and eax, 0xFFFC	67	and eax, 0xFFFC
68	cmp ax, 0	68	cmp ax, 0
69	je @f	69	je @f
70		70
71	cmp ax, 1	71	cmp ax, 1
72	jne .show_BAR2	72	jne .show_BAR2
73	;--------------------------------------	73	;--------------------------------------
74	@@:	74	@@:
75	mov ax, 0x170	75	mov ax, 0x170
76	;--------------------------------------	76	;--------------------------------------
77	.show_BAR2:	77	.show_BAR2:
78	DEBUGF 1, 'K : BAR2 IDE base addr %x\n', ax	78	DEBUGF 1, 'K : BAR2 IDE base addr %x\n', ax
79	mov [StandardATABases+2], ax	79	mov [StandardATABases+2], ax
80	mov [ecx+IDE_DATA.BAR2_val], ax	80	mov [ecx+IDE_DATA.BAR2_val], ax
81	pop eax	81	pop eax
82	;--------------------------------------	82	;--------------------------------------
83	mov bl, 0x1C	83	mov bl, 0x1C
84	push eax	84	push eax
85	call pci_read_reg	85	call pci_read_reg
86	and eax, 0xFFFC	86	and eax, 0xFFFC
87	cmp ax, 0	87	cmp ax, 0
88	je @f	88	je @f
89		89
90	cmp ax, 1	90	cmp ax, 1
91	jne .show_BAR3	91	jne .show_BAR3
92	;--------------------------------------	92	;--------------------------------------
93	@@:	93	@@:
94	mov ax, 0x374	94	mov ax, 0x374
95	;--------------------------------------	95	;--------------------------------------
96	.show_BAR3:	96	.show_BAR3:
97	DEBUGF 1, 'K : BAR3 IDE base addr %x\n', ax	97	DEBUGF 1, 'K : BAR3 IDE base addr %x\n', ax
98	mov [ecx+IDE_DATA.BAR3_val], ax	98	mov [ecx+IDE_DATA.BAR3_val], ax
99	pop eax	99	pop eax
100	;--------------------------------------	100	;--------------------------------------
101	mov bl, 0x20	101	mov bl, 0x20
102	push eax	102	push eax
103	call pci_read_reg	103	call pci_read_reg
104	and eax, 0xFFFC	104	and eax, 0xFFFC
105	DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax	105	DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax
106	mov [ecx+IDE_DATA.RegsBaseAddres], ax	106	mov [ecx+IDE_DATA.RegsBaseAddres], ax
107	pop eax	107	pop eax
108	;--------------------------------------	108	;--------------------------------------
109	mov bl, 0x3C	109	mov bl, 0x3C
110	push eax	110	push eax
111	call pci_read_reg	111	call pci_read_reg
112	and eax, 0xFF	112	and eax, 0xFF
113	DEBUGF 1, 'K : IDE Interrupt %x\n', al	113	DEBUGF 1, 'K : IDE Interrupt %x\n', al
114	mov [ecx+IDE_DATA.Interrupt], ax	114	mov [ecx+IDE_DATA.Interrupt], ax
115	pop eax	115	pop eax
116		116
117	add ecx, sizeof.IDE_DATA	117	add ecx, sizeof.IDE_DATA
118	;--------------------------------------	118	;--------------------------------------
119	jmp .loop	119	jmp .loop
120	;-----------------------------------------------------------------------------	120	;-----------------------------------------------------------------------------
121	uglobal	121	uglobal
122	align 4	122	align 4
123	;--------------------------------------	123	;--------------------------------------
124	IDE_controller_pointer dd ?	124	IDE_controller_pointer dd ?
125	;--------------------------------------	125	;--------------------------------------
126	IDE_controller_1 IDE_DATA	126	IDE_controller_1 IDE_DATA
127	IDE_controller_2 IDE_DATA	127	IDE_controller_2 IDE_DATA
128	IDE_controller_3 IDE_DATA	128	IDE_controller_3 IDE_DATA
129	;--------------------------------------	129	;--------------------------------------
130	cache_ide0 IDE_CACHE	130	cache_ide0 IDE_CACHE
131	cache_ide1 IDE_CACHE	131	cache_ide1 IDE_CACHE
132	cache_ide2 IDE_CACHE	132	cache_ide2 IDE_CACHE
133	cache_ide3 IDE_CACHE	133	cache_ide3 IDE_CACHE
134	cache_ide4 IDE_CACHE	134	cache_ide4 IDE_CACHE
135	cache_ide5 IDE_CACHE	135	cache_ide5 IDE_CACHE
136	cache_ide6 IDE_CACHE	136	cache_ide6 IDE_CACHE
137	cache_ide7 IDE_CACHE	137	cache_ide7 IDE_CACHE
138	cache_ide8 IDE_CACHE	138	cache_ide8 IDE_CACHE
139	cache_ide9 IDE_CACHE	139	cache_ide9 IDE_CACHE
140	cache_ide10 IDE_CACHE	140	cache_ide10 IDE_CACHE
141	cache_ide11 IDE_CACHE	141	cache_ide11 IDE_CACHE
142	;--------------------------------------	142	;--------------------------------------
143	endg	143	endg
144	;-----------------------------------------------------------------------------	144	;-----------------------------------------------------------------------------
145	; START of initialisation IDE ATA code	145	; START of initialisation IDE ATA code
146	;-----------------------------------------------------------------------------	146	;-----------------------------------------------------------------------------
147	Init_IDE_ATA_controller:	147	Init_IDE_ATA_controller:
148	cmp [ecx+IDE_DATA.ProgrammingInterface], 0	148	cmp [ecx+IDE_DATA.ProgrammingInterface], 0
149	je set_interrupts_for_IDE_controllers.continue	149	jne @f
-		150
-		151	ret
-		152	;--------------------------------------
150		153	@@:
151	mov esi, boot_disabling_ide	154	mov esi, boot_disabling_ide
152	call boot_log	155	call boot_log
153	;--------------------------------------	156	;--------------------------------------
154	; Disable IDE interrupts, because the search	157	; Disable IDE interrupts, because the search
155	; for IDE partitions is in the PIO mode.	158	; for IDE partitions is in the PIO mode.
156	;--------------------------------------	159	;--------------------------------------
157	.disable_IDE_interrupt:	160	.disable_IDE_interrupt:
158	; Disable interrupts in IDE controller for PIO	161	; Disable interrupts in IDE controller for PIO
159	mov al, 2	162	mov al, 2
160	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4	163	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
161	add dx, 2 ;0x3F6	164	add dx, 2 ;0x3F6
162	out dx, al	165	out dx, al
163	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374	166	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374
164	add dx, 2 ;0x376	167	add dx, 2 ;0x376
165	out dx, al	168	out dx, al
166	;-----------------------------------------------------------------------------	169	;-----------------------------------------------------------------------------
167	; set current ata bases	170	; set current ata bases
168	@@:	171	@@:
169	mov ax, [ecx+IDE_DATA.BAR0_val]	172	mov ax, [ecx+IDE_DATA.BAR0_val]
170	mov [StandardATABases], ax	173	mov [StandardATABases], ax
171	mov ax, [ecx+IDE_DATA.BAR2_val]	174	mov ax, [ecx+IDE_DATA.BAR2_val]
172	mov [StandardATABases+2], ax	175	mov [StandardATABases+2], ax
173		176
174	mov esi, boot_detecthdcd	177	mov esi, boot_detecthdcd
175	call boot_log	178	call boot_log
-		179	;--------------------------------------
176	include 'dev_hdcd.inc'	180	include 'dev_hdcd.inc'
-		181	;--------------------------------------
-		182	ret
177	;-----------------------------------------------------------------------------	183	;-----------------------------------------------------------------------------
-		184	Init_IDE_ATA_controller_2:
-		185	cmp [ecx+IDE_DATA.ProgrammingInterface], 0
-		186	jne @f
-		187
-		188	ret
-		189	;--------------------------------------
-		190	@@:
178	mov dx, [ecx+IDE_DATA.RegsBaseAddres]	191	mov dx, [ecx+IDE_DATA.RegsBaseAddres]
179	; test whether it is our interrupt?	192	; test whether it is our interrupt?
180	add dx, 2	193	add dx, 2
181	in al, dx	194	in al, dx
182	test al, 100b	195	test al, 100b
183	jz @f	196	jz @f
184	; clear Bus Master IDE Status register	197	; clear Bus Master IDE Status register
185	; clear Interrupt bit	198	; clear Interrupt bit
186	out dx, al	199	out dx, al
187	;--------------------------------------	200	;--------------------------------------
188	@@:	201	@@:
189	add dx, 8	202	add dx, 8
190	; test whether it is our interrupt?	203	; test whether it is our interrupt?
191	in al, dx	204	in al, dx
192	test al, 100b	205	test al, 100b
193	jz @f	206	jz @f
194	; clear Bus Master IDE Status register	207	; clear Bus Master IDE Status register
195	; clear Interrupt bit	208	; clear Interrupt bit
196	out dx, al	209	out dx, al
197	;--------------------------------------	210	;--------------------------------------
198	@@:	211	@@:
199	; read status register and remove the interrupt request	212	; read status register and remove the interrupt request
200	mov dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0	213	mov dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
201	add dx, 0x7 ;0x1F7	214	add dx, 0x7 ;0x1F7
202	in al, dx	215	in al, dx
203	mov dx, [ecx+IDE_DATA.BAR2_val] ;0x170	216	mov dx, [ecx+IDE_DATA.BAR2_val] ;0x170
204	add dx, 0x7 ;0x177	217	add dx, 0x7 ;0x177
205	in al, dx	218	in al, dx
206	;-----------------------------------------------------------------------------	219	;-----------------------------------------------------------------------------
207	push eax edx	220	; push eax edx
208	mov dx, [ecx+IDE_DATA.RegsBaseAddres]	221	; mov dx, [ecx+IDE_DATA.RegsBaseAddres]
209	xor eax, eax	222	; xor eax, eax
210	add dx, 2	223	; add dx, 2
211	in al, dx	224	; in al, dx
212	; DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax	225	; DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax
213		226
214	add dx, 8	227	; add dx, 8
215	in al, dx	228	; in al, dx
216	; DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax	229	; DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax
217	pop edx eax	230	; pop edx eax
218		231
219	cmp [ecx+IDE_DATA.RegsBaseAddres], 0	232	; cmp [ecx+IDE_DATA.RegsBaseAddres], 0
220	setnz [ecx+IDE_DATA.dma_hdd]	233	; setnz [ecx+IDE_DATA.dma_hdd]
221	;-----------------------------------------------------------------------------	234	;-----------------------------------------------------------------------------
222	; set interrupts for IDE Controller	235	; set interrupts for IDE Controller
223	;-----------------------------------------------------------------------------	236	;-----------------------------------------------------------------------------
224	mov esi, boot_set_int_IDE	237	mov esi, boot_set_int_IDE
225	call boot_log	238	call boot_log
226	set_interrupts_for_IDE_controllers:	239	.set_interrupts_for_IDE_controllers:
227	mov eax, [ecx+IDE_DATA.ProgrammingInterface]	240	mov eax, [ecx+IDE_DATA.ProgrammingInterface]
228	cmp ax, 0x0180	241	cmp ax, 0x0180
229	je .pata_ide	242	je .pata_ide
230		243
231	cmp ax, 0x018a	244	cmp ax, 0x018a
232	jne .sata_ide	245	jne .sata_ide
233	;--------------------------------------	246	;--------------------------------------
234	.pata_ide:	247	.pata_ide:
235	cmp [ecx+IDE_DATA.RegsBaseAddres], 0	248	cmp [ecx+IDE_DATA.RegsBaseAddres], 0
236	je .end_set_interrupts	249	je .end_set_interrupts
237		250
238	push ecx	251	push ecx
239	stdcall attach_int_handler, 14, IDE_irq_14_handler, 0	252	stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
240	DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax	253	DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax
241	stdcall attach_int_handler, 15, IDE_irq_15_handler, 0	254	stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
242	DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax	255	DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax
243	pop ecx	256	pop ecx
244		257
245	jmp .enable_IDE_interrupt	258	jmp .enable_IDE_interrupt
246	;--------------------------------------	259	;--------------------------------------
247	.sata_ide:	260	.sata_ide:
248	cmp ax, 0x0185	261	cmp ax, 0x0185
249	je .sata_ide_1	262	je .sata_ide_1
250		263
251	cmp ax, 0x018f	264	cmp ax, 0x018f
252	jne .end_set_interrupts	265	jne .end_set_interrupts
253	;--------------------------------------	266	;--------------------------------------
254	.sata_ide_1:	267	.sata_ide_1:
255	cmp [ecx+IDE_DATA.RegsBaseAddres], 0	268	cmp [ecx+IDE_DATA.RegsBaseAddres], 0
256	je .end_set_interrupts	269	je .end_set_interrupts
257		270
258	mov ax, [ecx+IDE_DATA.Interrupt]	271	mov ax, [ecx+IDE_DATA.Interrupt]
259	movzx eax, al	272	movzx eax, al
260	push ecx	273	push ecx
261	stdcall attach_int_handler, eax, IDE_common_irq_handler, 0	274	stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
262	pop ecx	275	pop ecx
263	DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax	276	DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
264	;--------------------------------------	277	;--------------------------------------
265	.enable_IDE_interrupt:	278	.enable_IDE_interrupt:
266	mov esi, boot_enabling_ide	279	mov esi, boot_enabling_ide
267	call boot_log	280	call boot_log
268	; Enable interrupts in IDE controller for DMA	281	; Enable interrupts in IDE controller for DMA
269	xor ebx, ebx	282	xor ebx, ebx
270	cmp ecx, IDE_controller_2	283	cmp ecx, IDE_controller_2
271	jne @f	284	jne @f
272		285
273	add ebx, 5	286	add ebx, 5
274	jmp .check_DRIVE_DATA	287	jmp .check_DRIVE_DATA
275	;--------------------------------------	288	;--------------------------------------
276	@@:	289	@@:
277	cmp ecx, IDE_controller_3	290	cmp ecx, IDE_controller_3
278	jne .check_DRIVE_DATA	291	jne .check_DRIVE_DATA
279		292
280	add ebx, 10	293	add ebx, 10
281	;--------------------------------------	294	;--------------------------------------
282	.check_DRIVE_DATA:	295	.check_DRIVE_DATA:
283	mov al, 0	296	mov al, 0
284	mov ah, [ebx+DRIVE_DATA+1]	297	mov ah, [ebx+DRIVE_DATA+1]
285	test ah, 10100000b	298	test ah, 10100000b
286	jz @f	299	jz @f
287		300
288	DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"	301	DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"
-		302	mov [ecx+IDE_DATA.dma_hdd_channel_1], byte 0
-		303
289	jmp .ch2_check	304	jmp .ch2_check
290	;--------------------------------------	305	;--------------------------------------
291	@@:	306	@@:
292	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4	307	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
293	add dx, 2 ;0x3F6	308	add dx, 2 ;0x3F6
294	out dx, al	309	out dx, al
295	DEBUGF 1, "K : IDE CH1 DMA enabled\n"	310	DEBUGF 1, "K : IDE CH1 DMA enabled\n"
-		311	mov [ecx+IDE_DATA.dma_hdd_channel_1], byte 1
296	;--------------------------------------	312	;--------------------------------------
297	.ch2_check:	313	.ch2_check:
298	test ah, 1010b	314	test ah, 1010b
299	jz @f	315	jz @f
300		316
301	DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"	317	DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"
-		318	mov [ecx+IDE_DATA.dma_hdd_channel_2], byte 0
-		319
302	jmp .end_set_interrupts	320	jmp .end_set_interrupts
303	;--------------------------------------	321	;--------------------------------------
304	@@:	322	@@:
305	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374	323	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374
306	add dx, 2 ;0x376	324	add dx, 2 ;0x376
307	out dx, al	325	out dx, al
308	DEBUGF 1, "K : IDE CH2 DMA enabled\n"	326	DEBUGF 1, "K : IDE CH2 DMA enabled\n"
-		327	mov [ecx+IDE_DATA.dma_hdd_channel_2], byte 1
309	;--------------------------------------	328	;--------------------------------------
310	.end_set_interrupts:	329	.end_set_interrupts:
311	;-----------------------------------------------------------------------------	-
312	cmp [ecx+IDE_DATA.dma_hdd], 0	-
313	je .print_pio	-
314	;--------------------------------------	-
315	.print_dma:	-
316	DEBUGF 1, "K : IDE DMA mode\n"	-
317	jmp .continue	-
318	;--------------------------------------	-
319	.print_pio:	-
320	DEBUGF 1, "K : IDE PIO mode\n"	-
321	.continue:	-
322	ret	330	ret
323	;-----------------------------------------------------------------------------	331	;-----------------------------------------------------------------------------
324	; END of initialisation IDE ATA code	332	; END of initialisation IDE ATA code
325	;-----------------------------------------------------------------------------	333	;-----------------------------------------------------------------------------
326	find_IDE_controller_done:	334	find_IDE_controller_done:
327	mov ecx, IDE_controller_1	335	mov ecx, IDE_controller_1
328	mov [IDE_controller_pointer], ecx	336	mov [IDE_controller_pointer], ecx
329	call Init_IDE_ATA_controller	337	call Init_IDE_ATA_controller
330	mov ecx, IDE_controller_2	338	mov ecx, IDE_controller_2
331	mov [IDE_controller_pointer], ecx	339	mov [IDE_controller_pointer], ecx
332	call Init_IDE_ATA_controller	340	call Init_IDE_ATA_controller
333	mov ecx, IDE_controller_3	341	mov ecx, IDE_controller_3
334	mov [IDE_controller_pointer], ecx	342	mov [IDE_controller_pointer], ecx
335	call Init_IDE_ATA_controller	343	call Init_IDE_ATA_controller
336	;-----------------------------------------------------------------------------	344	;-----------------------------------------------------------------------------
337	mov esi, boot_getcache	345	mov esi, boot_getcache
338	call boot_log	346	call boot_log
339	include 'getcache.inc'	347	include 'getcache.inc'
340	;-----------------------------------------------------------------------------	348	;-----------------------------------------------------------------------------
341	mov esi, boot_detectpart	349	mov esi, boot_detectpart
342	call boot_log	350	call boot_log
343	include 'sear_par.inc'	351	include 'sear_par.inc'
344	;-----------------------------------------------------------------------------	352	;-----------------------------------------------------------------------------
-		353	mov ecx, IDE_controller_1
-		354	mov [IDE_controller_pointer], ecx
-		355	call Init_IDE_ATA_controller_2
-		356	mov ecx, IDE_controller_2
-		357	mov [IDE_controller_pointer], ecx
-		358	call Init_IDE_ATA_controller_2
-		359	mov ecx, IDE_controller_3
-		360	mov [IDE_controller_pointer], ecx
-		361	call Init_IDE_ATA_controller_2
-		362	;-----------------------------------------------------------------------------

Subversion Repositories Kolibri OS

(root)/kernel/trunk/detect/init_ata.inc – Rev 4711 → 4720