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Line 1... Line 1...
1
;-----------------------------------------------------------------------------
1
;-----------------------------------------------------------------------------
2
; find the IDE controller in the device list
2
; find the IDE controller in the device list
3
;-----------------------------------------------------------------------------
3
;-----------------------------------------------------------------------------
-
 
4
        mov     ecx, IDE_controller_1
4
        mov     esi, pcidev_list
5
        mov     esi, pcidev_list
-
 
6
;--------------------------------------
-
 
7
align 4
5
.loop:
8
.loop:
6
        mov     esi, [esi+PCIDEV.fd]
9
        mov     esi, [esi+PCIDEV.fd]
7
        cmp     esi, pcidev_list
10
        cmp     esi, pcidev_list
8
        jz      .done
11
        jz      find_IDE_controller_done
-
 
12
 
9
        mov     eax, [esi+PCIDEV.class]
13
        mov     eax, [esi+PCIDEV.class]
10
        shr     eax, 4
14
        shr     eax, 4
11
        cmp     eax, 0x01018
15
        cmp     eax, 0x01018
12
        jnz     .loop
16
        jnz     .loop
-
 
17
;--------------------------------------
13
.found:
18
.found:
14
        mov     eax, [esi+PCIDEV.class]
19
        mov     eax, [esi+PCIDEV.class]
15
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
20
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
16
        mov     [IDEContrProgrammingInterface], eax
21
        mov     [ecx+IDE_DATA.ProgrammingInterface], eax
Line 17... Line 22...
17
 
22
 
18
        mov     ah, [esi+PCIDEV.bus]
23
        mov     ah, [esi+PCIDEV.bus]
19
        mov     al, 2
24
        mov     al, 2
20
        mov     bh, [esi+PCIDEV.devfn]
25
        mov     bh, [esi+PCIDEV.devfn]
21
;-----------------------------------------------------------------------------
26
;--------------------------------------
22
        mov     bl, 0x10
27
        mov     bl, 0x10
23
        push    eax
28
        push    eax
24
        call    pci_read_reg
29
        call    pci_read_reg
25
        and     eax, 0xFFFC
30
        and     eax, 0xFFFC
26
        cmp     ax, 0
31
        cmp     ax, 0
-
 
32
        je      @f
27
        je      @f
33
 
28
        cmp     ax, 1
34
        cmp     ax, 1
-
 
35
        jne     .show_BAR0
29
        jne     .show_BAR0
36
;--------------------------------------
30
@@:
37
@@:
-
 
38
        mov     ax, 0x1F0
31
        mov     ax, 0x1F0
39
;--------------------------------------
32
.show_BAR0:
40
.show_BAR0:
33
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', ax
41
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', ax
34
        mov     [StandardATABases], ax
-
 
35
        mov     [hd_address_table], eax
-
 
36
        mov     [hd_address_table+8], eax
42
        mov     [StandardATABases], ax
37
        mov     [IDE_BAR0_val], ax
43
        mov     [ecx+IDE_DATA.BAR0_val], ax
38
        pop     eax
44
        pop     eax
39
;-----------------------------------------------------------------------------
45
;--------------------------------------
40
        mov     bl, 0x14
46
        mov     bl, 0x14
41
        push    eax
47
        push    eax
42
        call    pci_read_reg
48
        call    pci_read_reg
43
        and     eax, 0xFFFC
49
        and     eax, 0xFFFC
44
        cmp     ax, 0
50
        cmp     ax, 0
-
 
51
        je      @f
45
        je      @f
52
 
46
        cmp     ax, 1
53
        cmp     ax, 1
-
 
54
        jne     .show_BAR1
47
        jne     .show_BAR1
55
;--------------------------------------
48
@@:
56
@@:
-
 
57
        mov     ax, 0x3F4
49
        mov     ax, 0x3F4
58
;--------------------------------------
50
.show_BAR1:
59
.show_BAR1:
51
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', ax
60
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', ax
52
        mov     [IDE_BAR1_val], ax
61
        mov     [ecx+IDE_DATA.BAR1_val], ax
53
        pop     eax
62
        pop     eax
54
;-----------------------------------------------------------------------------
63
;--------------------------------------
55
        mov     bl, 0x18
64
        mov     bl, 0x18
56
        push    eax
65
        push    eax
57
        call    pci_read_reg
66
        call    pci_read_reg
58
        and     eax, 0xFFFC
67
        and     eax, 0xFFFC
59
        cmp     ax, 0
68
        cmp     ax, 0
-
 
69
        je      @f
60
        je      @f
70
 
61
        cmp     ax, 1
71
        cmp     ax, 1
-
 
72
        jne     .show_BAR2
62
        jne     .show_BAR2
73
;--------------------------------------
63
@@:
74
@@:
-
 
75
        mov     ax, 0x170
64
        mov     ax, 0x170
76
;--------------------------------------
65
.show_BAR2:
77
.show_BAR2:
66
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', ax
78
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', ax
67
        mov     [StandardATABases+2], ax
-
 
68
        mov     [hd_address_table+16], eax
-
 
69
        mov     [hd_address_table+24], eax
79
        mov     [StandardATABases+2], ax
70
        mov     [IDE_BAR2_val], ax
80
        mov     [ecx+IDE_DATA.BAR2_val], ax
71
        pop     eax
81
        pop     eax
72
;-----------------------------------------------------------------------------
82
;--------------------------------------
73
        mov     bl, 0x1C
83
        mov     bl, 0x1C
74
        push    eax
84
        push    eax
75
        call    pci_read_reg
85
        call    pci_read_reg
76
        and     eax, 0xFFFC
86
        and     eax, 0xFFFC
77
        cmp     ax, 0
87
        cmp     ax, 0
-
 
88
        je      @f
78
        je      @f
89
 
79
        cmp     ax, 1
90
        cmp     ax, 1
-
 
91
        jne     .show_BAR3
80
        jne     .show_BAR3
92
;--------------------------------------
81
@@:
93
@@:
-
 
94
        mov     ax, 0x374
82
        mov     ax, 0x374
95
;--------------------------------------
83
.show_BAR3:
96
.show_BAR3:
84
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', ax
97
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', ax
85
        mov     [IDE_BAR3_val], ax
98
        mov     [ecx+IDE_DATA.BAR3_val], ax
86
        pop     eax
99
        pop     eax
87
;-----------------------------------------------------------------------------
100
;--------------------------------------
88
        mov     bl, 0x20
101
        mov     bl, 0x20
89
        push    eax
102
        push    eax
90
        call    pci_read_reg
103
        call    pci_read_reg
91
        and     eax, 0xFFFC
104
        and     eax, 0xFFFC
92
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
105
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
93
        mov     [IDEContrRegsBaseAddr], ax
106
        mov     [ecx+IDE_DATA.RegsBaseAddres], ax
94
        pop     eax
107
        pop     eax
95
;-----------------------------------------------------------------------------
108
;--------------------------------------
96
        mov     bl, 0x3C
109
        mov     bl, 0x3C
97
        push    eax
110
        push    eax
98
        call    pci_read_reg
111
        call    pci_read_reg
99
        and     eax, 0xFF
112
        and     eax, 0xFF
100
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
113
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
101
        mov     [IDE_Interrupt], ax
114
        mov     [ecx+IDE_DATA.Interrupt], ax
-
 
115
        pop     eax
-
 
116
 
-
 
117
        add     ecx, sizeof.IDE_DATA
-
 
118
;--------------------------------------
102
        pop     eax
119
        jmp     .loop
-
 
120
;-----------------------------------------------------------------------------
103
;-----------------------------------------------------------------------------
121
uglobal
-
 
122
align 4
-
 
123
;--------------------------------------
-
 
124
IDE_controller_pointer dd ?
-
 
125
;--------------------------------------
-
 
126
IDE_controller_1 IDE_DATA
-
 
127
IDE_controller_2 IDE_DATA
-
 
128
IDE_controller_3 IDE_DATA
-
 
129
;--------------------------------------
-
 
130
cache_ide0  IDE_CACHE
-
 
131
cache_ide1  IDE_CACHE
-
 
132
cache_ide2  IDE_CACHE
-
 
133
cache_ide3  IDE_CACHE
-
 
134
cache_ide4  IDE_CACHE
-
 
135
cache_ide5  IDE_CACHE
-
 
136
cache_ide6  IDE_CACHE
-
 
137
cache_ide7  IDE_CACHE
-
 
138
cache_ide8  IDE_CACHE
-
 
139
cache_ide9  IDE_CACHE
-
 
140
cache_ide10 IDE_CACHE
-
 
141
cache_ide11 IDE_CACHE
-
 
142
;--------------------------------------
104
.done:
143
endg
105
;-----------------------------------------------------------------------------
144
;-----------------------------------------------------------------------------
106
; START of initialisation IDE ATA code
145
; START of initialisation IDE ATA code
-
 
146
;-----------------------------------------------------------------------------
107
;-----------------------------------------------------------------------------
147
Init_IDE_ATA_controller:
108
        cmp     [IDEContrProgrammingInterface], 0
148
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
Line 109... Line 149...
109
        je      set_interrupts_for_IDE_controllers.continue
149
        je      set_interrupts_for_IDE_controllers.continue
110
 
150
 
111
        mov     esi, boot_disabling_ide
151
        mov     esi, boot_disabling_ide
Line 115... Line 155...
115
; for IDE partitions is in the PIO mode.
155
; for IDE partitions is in the PIO mode.
116
;--------------------------------------
156
;--------------------------------------
117
.disable_IDE_interrupt:
157
.disable_IDE_interrupt:
118
; Disable interrupts in IDE controller for PIO
158
; Disable interrupts in IDE controller for PIO
119
        mov     al, 2
159
        mov     al, 2
120
        mov     dx, [IDE_BAR1_val] ;0x3F4
160
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
121
        add     dx, 2 ;0x3F6
161
        add     dx, 2 ;0x3F6
122
        out     dx, al
162
        out     dx, al
123
        mov     dx, [IDE_BAR3_val] ;0x374
163
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
124
        add     dx, 2 ;0x376
164
        add     dx, 2 ;0x376
125
        out     dx, al
165
        out     dx, al
126
@@:
-
 
127
; show base variables of IDE controller 
-
 
128
;        DEBUGF  1, "K : BAR0 %x \n", [IDE_BAR0_val]:4
-
 
129
;        DEBUGF  1, "K : BAR1 %x \n", [IDE_BAR1_val]:4
-
 
130
;        DEBUGF  1, "K : BAR2 %x \n", [IDE_BAR2_val]:4
-
 
131
;        DEBUGF  1, "K : BAR3 %x \n", [IDE_BAR3_val]:4
-
 
132
;        DEBUGF  1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4
-
 
133
;        DEBUGF  1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4
-
 
134
;        DEBUGF  1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4
-
 
135
;-----------------------------------------------------------------------------
166
;-----------------------------------------------------------------------------
-
 
167
; set current ata bases
-
 
168
@@:
-
 
169
        mov     ax, [ecx+IDE_DATA.BAR0_val]
-
 
170
        mov     [StandardATABases], ax
-
 
171
        mov     ax, [ecx+IDE_DATA.BAR2_val]
-
 
172
        mov     [StandardATABases+2], ax
-
 
173
 
136
        mov     esi, boot_detecthdcd
174
        mov     esi, boot_detecthdcd
137
        call    boot_log
175
        call    boot_log
138
include 'dev_hdcd.inc'
176
include 'dev_hdcd.inc'
139
        mov     esi, boot_getcache
-
 
140
        call    boot_log
-
 
141
include 'getcache.inc'
-
 
142
        mov     esi, boot_detectpart
-
 
143
        call    boot_log
-
 
144
include 'sear_par.inc'
-
 
145
;-----------------------------------------------------------------------------
177
;-----------------------------------------------------------------------------
146
        mov     dx, [IDEContrRegsBaseAddr]
178
        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
147
; test whether it is our interrupt?
179
; test whether it is our interrupt?
148
        add     dx, 2
180
        add     dx, 2
149
        in      al, dx
181
        in      al, dx
150
        test    al, 100b
182
        test    al, 100b
151
        jz      @f
183
        jz      @f
152
; clear Bus Master IDE Status register
184
; clear Bus Master IDE Status register
153
; clear Interrupt bit
185
; clear Interrupt bit
154
        out     dx, al
186
        out     dx, al
-
 
187
;--------------------------------------
155
@@:
188
@@:
156
        add     dx, 8
189
        add     dx, 8
157
; test whether it is our interrupt?
190
; test whether it is our interrupt?
158
        in      al, dx
191
        in      al, dx
159
        test    al, 100b
192
        test    al, 100b
160
        jz      @f
193
        jz      @f
161
; clear Bus Master IDE Status register
194
; clear Bus Master IDE Status register
162
; clear Interrupt bit
195
; clear Interrupt bit
163
        out     dx, al
196
        out     dx, al
-
 
197
;--------------------------------------
164
@@:
198
@@:
165
; read status register and remove the interrupt request
199
; read status register and remove the interrupt request
166
        mov     dx, [IDE_BAR0_val] ;0x1F0
200
        mov     dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
167
        add     dx, 0x7 ;0x1F7
201
        add     dx, 0x7 ;0x1F7
168
        in      al, dx
202
        in      al, dx
169
        mov     dx, [IDE_BAR2_val] ;0x170
203
        mov     dx, [ecx+IDE_DATA.BAR2_val] ;0x170
170
        add     dx, 0x7 ;0x177
204
        add     dx, 0x7 ;0x177
171
        in      al, dx
205
        in      al, dx
172
;-----------------------------------------------------------------------------
206
;-----------------------------------------------------------------------------
173
        push    eax edx
207
        push    eax edx
174
        mov     dx, [IDEContrRegsBaseAddr]
208
        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
175
        xor     eax, eax
209
        xor     eax, eax
176
        add     dx, 2
210
        add     dx, 2
177
        in      al, dx
211
        in      al, dx
178
        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
212
        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
Line 179... Line 213...
179
 
213
 
180
        add     dx, 8
214
        add     dx, 8
181
        in      al, dx
215
        in      al, dx
182
        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
216
        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
Line 183... Line 217...
183
        pop     edx eax
217
        pop     edx eax
184
 
218
 
185
        cmp     [IDEContrRegsBaseAddr], 0
219
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
186
        setnz   [dma_hdd]
220
        setnz   [ecx+IDE_DATA.dma_hdd]
187
;-----------------------------------------------------------------------------
221
;-----------------------------------------------------------------------------
188
; set interrupts for IDE Controller
222
; set interrupts for IDE Controller
189
;-----------------------------------------------------------------------------
223
;-----------------------------------------------------------------------------
190
        mov     esi, boot_set_int_IDE
224
        mov     esi, boot_set_int_IDE
191
        call    boot_log
225
        call    boot_log
192
set_interrupts_for_IDE_controllers:
226
set_interrupts_for_IDE_controllers:
193
        mov     eax, [IDEContrProgrammingInterface]
227
        mov     eax, [ecx+IDE_DATA.ProgrammingInterface]
Line 194... Line 228...
194
        cmp     ax, 0x0180
228
        cmp     ax, 0x0180
195
        je      .pata_ide
229
        je      .pata_ide
196
 
230
 
197
        cmp     ax, 0x018a
231
        cmp     ax, 0x018a
198
        jne     .sata_ide
232
        jne     .sata_ide
199
;--------------------------------------
233
;--------------------------------------
Line -... Line 234...
-
 
234
.pata_ide:
200
.pata_ide:
235
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
201
        cmp     [IDEContrRegsBaseAddr], 0
236
        je      .end_set_interrupts
202
        je      .end_set_interrupts
237
 
203
 
238
        push    ecx
-
 
239
        stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
-
 
240
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
204
        stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
241
        stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
205
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
242
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
206
        stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
243
        pop     ecx
207
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
244
 
208
        jmp     .enable_IDE_interrupt
245
        jmp     .enable_IDE_interrupt
Line 209... Line 246...
209
;--------------------------------------
246
;--------------------------------------
210
.sata_ide:
247
.sata_ide:
211
        cmp     ax, 0x0185
248
        cmp     ax, 0x0185
212
        je      .sata_ide_1
249
        je      .sata_ide_1
213
 
250
 
214
        cmp     ax, 0x018f
251
        cmp     ax, 0x018f
Line 215... Line 252...
215
        jne     .end_set_interrupts
252
        jne     .end_set_interrupts
216
;--------------------------------------
253
;--------------------------------------
-
 
254
.sata_ide_1:
217
.sata_ide_1:
255
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
-
 
256
        je      .end_set_interrupts
218
        cmp     [IDEContrRegsBaseAddr], 0
257
 
219
        je      .end_set_interrupts
258
        mov     ax, [ecx+IDE_DATA.Interrupt]
220
 
259
        movzx   eax, al
221
        mov     ax, [IDE_Interrupt]
260
        push    ecx
222
        movzx   eax, al
261
        stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
223
        stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
262
        pop     ecx
-
 
263
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
-
 
264
;--------------------------------------
-
 
265
.enable_IDE_interrupt:
-
 
266
        mov     esi, boot_enabling_ide
-
 
267
        call    boot_log
-
 
268
; Enable interrupts in IDE controller for DMA
-
 
269
        xor     ebx, ebx
-
 
270
        cmp     ecx, IDE_controller_2
-
 
271
        jne     @f
-
 
272
 
-
 
273
        add     ebx, 5
-
 
274
        jmp     .check_DRIVE_DATA
-
 
275
;--------------------------------------
-
 
276
@@:
224
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax
277
        cmp     ecx, IDE_controller_3
225
;--------------------------------------
278
        jne     .check_DRIVE_DATA
226
.enable_IDE_interrupt:
279
 
227
        mov     esi, boot_enabling_ide
280
        add     ebx, 10
Line 228... Line 281...
228
        call    boot_log
281
;--------------------------------------
229
; Enable interrupts in IDE controller for DMA
282
.check_DRIVE_DATA:
-
 
283
        mov     al, 0
230
        mov     al, 0
284
        mov     ah, [ebx+DRIVE_DATA+1]
231
        mov     ah, [DRIVE_DATA+1]
285
        test    ah, 10100000b
232
        test    ah, 10100000b
286
        jz      @f
233
        jz      @f
287
 
234
 
288
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
-
 
289
        jmp     .ch2_check
235
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
290
;--------------------------------------
236
        jmp     .ch2_check
291
@@:
237
@@:
292
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
Line 238... Line 293...
238
        mov     dx, [IDE_BAR1_val] ;0x3F4
293
        add     dx, 2 ;0x3F6
239
        add     dx, 2 ;0x3F6
294
        out     dx, al
-
 
295
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
240
        out     dx, al
296
;--------------------------------------
241
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
297
.ch2_check:
242
.ch2_check:
298
        test    ah, 1010b
243
        test    ah, 1010b
299
        jz      @f
244
        jz      @f
300
 
245
 
301
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
246
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
302
        jmp     .end_set_interrupts
247
        jmp     .end_set_interrupts
303
;--------------------------------------
248
@@:
304
@@:
249
        mov     dx, [IDE_BAR3_val] ;0x374
305
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
-
 
306
        add     dx, 2 ;0x376
250
        add     dx, 2 ;0x376
307
        out     dx, al
251
        out     dx, al
308
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
252
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
309
;--------------------------------------
253
;--------------------------------------
-
 
-
 
310
.end_set_interrupts:
254
.end_set_interrupts:
311
;-----------------------------------------------------------------------------
255
;-----------------------------------------------------------------------------
312
        cmp     [ecx+IDE_DATA.dma_hdd], 0
256
        cmp     [dma_hdd], 0
313
        je      .print_pio
-
 
314
;--------------------------------------
257
        je      .print_pio
315
.print_dma:
258
.print_dma:
316
        DEBUGF  1, "K : IDE DMA mode\n"
259
        DEBUGF  1, "K : IDE DMA mode\n"
317
        jmp     .continue
-
 
318
;--------------------------------------
-
 
319
.print_pio:
-
 
320
        DEBUGF  1, "K : IDE PIO mode\n"
-
 
321
.continue:
-
 
322
        ret
-
 
323
;-----------------------------------------------------------------------------
-
 
324
; END of initialisation IDE ATA code
-
 
325
;-----------------------------------------------------------------------------
-
 
326
find_IDE_controller_done:
-
 
327
        mov     ecx, IDE_controller_1
-
 
328
        mov     [IDE_controller_pointer], ecx
-
 
329
        call    Init_IDE_ATA_controller
-
 
330
        mov     ecx, IDE_controller_2
-
 
331
        mov     [IDE_controller_pointer], ecx
-
 
332
        call    Init_IDE_ATA_controller
-
 
333
        mov     ecx, IDE_controller_3
-
 
334
        mov     [IDE_controller_pointer], ecx
-
 
335
        call    Init_IDE_ATA_controller
-
 
336
;-----------------------------------------------------------------------------