WebSVN – Kolibri OS – Diff – /kernel/trunk/bus/pci/pci32.inc

 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;                                                              ;;
-;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
+;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;;
 ;; Distributed under terms of the GNU General Public License    ;;
 ;;                                                              ;;
 ;;                                                              ;;
 ;;  PCI32.INC                                                   ;;
 ;;                                                              ;;
 ;;                                                              ;;
 ;;  See file COPYING for details                                ;;
 ;;                                                              ;;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-$Revision: 1462 $
+$Revision: 1591 $
 ;***************************************************************************
 ;   Function
 ;      pci_api:
+;
 ;   Description
 ;       entry point for system PCI calls
 ;***************************************************************************
 ;mmio_pci_addr	equ  0x400		 ; set actual PCI address here to activate user-MMIO
+iglobal
+align 4
+f62call:
+	dd	pci_api.0
+	dd	pci_api.1
+	dd	pci_api.2
+	dd	pci_api.not_support	;3
+	dd	pci_read_reg		;4 byte
+	dd	pci_read_reg            ;5 word
+	dd	pci_read_reg            ;6 dword
+	dd	pci_api.not_support     ;7
+	dd	pci_write_reg           ;8 byte
+	dd	pci_write_reg           ;9 word
+	dd	pci_write_reg           ;10 dword
+if defined mmio_pci_addr
+	dd	pci_mmio_init		;11
+	dd	pci_mmio_map		;12
+	dd	pci_mmio_unmap		;13
+end if
+f62_rcall:
+	dd	pci_read_reg.0		;4 byte
+	dd	pci_read_reg.1		;5 word
+	dd	pci_read_reg.2		;6 dword
+f62_rcall2:
+	dd	pci_read_reg_2.0	;4 byte
+	dd	pci_read_reg_2.1	;5 word
+	dd	pci_read_reg_2.2	;6 dword
+f62_wcall:
+	dd	pci_write_reg.0		;4 byte
+	dd	pci_write_reg.1		;5 word
+	dd	pci_write_reg.2		;6 dword
+f62_wcall2:
+	dd	pci_write_reg_2.0	;4 byte
+	dd	pci_write_reg_2.1	;5 word
+	dd	pci_write_reg_2.2	;6 dword
+endg
-align 4
+align 4
+pci_api:
+        movzx	eax,bl
+	cmp  [pci_access_enabled],1
+	jne  .no_pci_access_for_applications
+if defined mmio_pci_addr
+        cmp eax, 13
+        jb .not_support
+else
+        cmp eax, 10
+        jb .not_support
+end if
+        call dword [f62call+eax*4]
-pci_api:
+        mov	dword [esp+32],eax
         ret
 	cmp  [pci_access_enabled],1
 	jne  no_pci_access_for_applications
+;	or al,al
-	or al,al
+;	jnz pci_fn_1
-	jnz pci_fn_1
+	; PCI function 0: get pci version (AH.AL)
-	; PCI function 0: get pci version (AH.AL)
+.0:
+	movzx	eax, word [BOOT_VAR+0x9022]
-	movzx eax,word [BOOT_VAR+0x9022]
+	ret
 	ret
+;pci_fn_1:
-pci_fn_1:
+;	cmp al,1
-	cmp al,1
+;	jnz pci_fn_2
 	jnz pci_fn_2
+	; PCI function 1: get last bus in AL
+.1:
-	; PCI function 1: get last bus in AL
+	movzx	eax, byte [BOOT_VAR+0x9021]
-	mov al,[BOOT_VAR+0x9021]
+	ret
-	ret
-pci_fn_2:
-	cmp al,2
-	jne pci_fn_3
-	; PCI function 2: get pci access mechanism
-	mov al,[BOOT_VAR+0x9020]
-	ret
-pci_fn_3:
-	cmp al,4
-	jz pci_read_reg   ;byte
-	cmp al,5
-	jz pci_read_reg   ;word
+;pci_fn_2:
+;	cmp al,2
+;	jne pci_fn_3
+	; PCI function 2: get pci access mechanism
+.2:
+	movzx	eax, byte [BOOT_VAR+0x9020]
+	ret
+;pci_fn_3:
+;	cmp al,4
+;	jz pci_read_reg   ;byte
+;	cmp al,5
+;	jz pci_read_reg   ;word
-	cmp al,6
+;	cmp al,6
-	jz pci_read_reg   ;dword
+;	jz pci_read_reg   ;dword
-	cmp al,8
+;	cmp al,8
-	jz pci_write_reg  ;byte
+;	jz pci_write_reg  ;byte
-	cmp al,9
+;	cmp al,9
-	jz pci_write_reg  ;word
+;	jz pci_write_reg  ;word
-	cmp al,10
+;	cmp al,10
-	jz pci_write_reg  ;dword
+;	jz pci_write_reg  ;dword
-if defined mmio_pci_addr
+;if defined mmio_pci_addr
-	cmp al,11	    ;  user-level MMIO functions
-	jz pci_mmio_init
+;	cmp al,11	    ;  user-level MMIO functions
-	cmp al,12
+;	jz pci_mmio_init
-	jz pci_mmio_map
+;	cmp al,12
-	cmp al,13
+;	jz pci_mmio_map
-	jz pci_mmio_unmap
+;	cmp al,13
-end if
+;	jz pci_mmio_unmap
 ;end if
-      no_pci_access_for_applications:
+.not_support:
-	or eax,-1
+.no_pci_access_for_applications:
 	or 	eax,-1
 	ret
 ;***************************************************************************
 ;   Function
 ;      pci_make_config_cmd
 ;
 ;   Description
 ;       creates a command dword  for use with the PCI bus
-;       bus # in ah
+;       bus # in bh;ah
-;       device+func in bh (dddddfff)
+;       device+func in ch;bh (dddddfff)
-;       register in bl
+;       register in cl;bl
+;
 pci_read_reg:
 	cmp	byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
 	je	pci_read_reg_2
 		; mechanism 1
-	push	esi   ; save register size into ESI
+;	push	esi   ; save register size into ESI
-	mov	esi,eax
+	mov	esi,ebx;eax
 	and	esi,3
 	call	pci_make_config_cmd
-	mov	ebx,eax
+	mov	eax,ebx;ebx,eax
 		; get current state
 	mov	dx,0xcf8
 	in	eax, dx
 		; get requested DWORD of config data
 	mov	dl,0xfc
 	and	bl,3
 	or	dl,bl	 ; add to port address first 2 bits of register address
-	or	esi,esi
+;	or	esi,esi
-	jz	pci_read_byte1
+;	jz	pci_read_byte1
-	cmp	esi,1
+;	cmp	esi,1
-	jz	pci_read_word1
+;	jz	pci_read_word1
-	cmp	esi,2
+;	cmp	esi,2
-	jz	pci_read_dword1
+;	jz	pci_read_dword1
+;	jmp	pci_fin_read1
-	jmp	pci_fin_read1
+	jmp	dword [f62_rcall+esi*4]
-pci_read_byte1:
+.0:
 	in	al,dx
-	jmp pci_fin_read1
+	jmp .pci_fin_read1
-pci_read_word1:
+.1:
 	in	ax,dx
-	jmp pci_fin_read1
+	jmp .pci_fin_read1
-pci_read_dword1:
+.2:
 	in	eax,dx
-	jmp	pci_fin_read1
+;	jmp	pci_fin_read1
-pci_fin_read1:
+.pci_fin_read1:
 		; restore configuration control
 	xchg	eax,[esp]
 	mov	dx,0xcf8
 	out	dx,eax
 	pop	eax
-	pop	esi
+	;pop	esi
 	ret
 pci_read_reg_2:
-	test	bh,128	;mech#2 only supports 16 devices per bus
+	test	ch,128;bh,128	;mech#2 only supports 16 devices per bus
-	jnz	pci_read_reg_err
+	jnz	pci_api.not_support
 ;	push esi   ; save register size into ESI
-	push esi   ; save register size into ESI
+	mov esi,ebx;eax
-	mov esi,eax
+	and esi,3
 	and esi,3
 	push	ebx;eax
 		; out 0xcf8,0x80
 	mov	dl,0xf8
 	mov	al,0x80
 	out	dx,al
 		; compute addr
-	shr	bh,3 ; func is ignored in mechanism 2
+	shr	ch,3;bh,3 ; func is ignored in mechanism 2
-	or	bh,0xc0
+	or	ch,0xc0;bh,0xc0
-	mov	dx,bx
+	mov	dx,cx;bx
-	or	esi,esi
+;	or	esi,esi
-	jz	pci_read_byte2
+;	jz	pci_read_byte2
-	cmp	esi,1
+;	cmp	esi,1
-	jz	pci_read_word2
+;	jz	pci_read_word2
-	cmp	esi,2
+;	cmp	esi,2
-	jz	pci_read_dword2
+;	jz	pci_read_dword2
-	jmp	pci_fin_read2
+;	jmp	pci_fin_read2
+	jmp	dword [f62_rcall2+esi*4]
-pci_read_byte2:
+.0:
 	in	al,dx
-	jmp pci_fin_read2
+	jmp .pci_fin_read2
-pci_read_word2:
+.1:
 	in	ax,dx
-	jmp pci_fin_read2
+	jmp .pci_fin_read2
-pci_read_dword2:
+.2:
 	in	eax,dx
+;       jmp pci_fin_read2
-;       jmp pci_fin_read2
-pci_fin_read2:
+.pci_fin_read2:
 		; restore configuration space
 	xchg	eax,[esp]
 	mov	dx,0xcfa
 	out	dx,al
 	mov	dl,0xf8
 	mov	al,ah
 	out	dx,al
 	pop	eax
-	pop	esi
+;	pop	esi
-	ret
+	ret
 pci_read_reg_err:
-	xor	eax,eax
+;pci_read_reg_err:
-	dec	eax
+;	or 	dword [esp+32],-1
 pci_write_reg:
 	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
 	je pci_write_reg_2
 		; mechanism 1
-	push	esi   ; save register size into ESI
+;	push	esi   ; save register size into ESI
-	mov	esi,eax
+	mov	esi,ebx;eax
-	and	esi,3
+	and	esi,3	;not need
+	call	pci_make_config_cmd
-	call	pci_make_config_cmd
+	mov	eax,ebx;ebx,eax
-	mov	ebx,eax
+	mov	ecx,edx		;cross registers
 		; get current state into ecx
 	mov	dx,0xcf8
 	in	eax, dx
 	mov	dl,0xfc
 	and	bl,3
 	or	dl,bl
 	mov	eax,ecx
-	or	esi,esi
+;	or	esi,esi
-	jz	pci_write_byte1
+;	jz	pci_write_byte1
-	cmp	esi,1
+;	cmp	esi,1
-	jz	pci_write_word1
+;	jz	pci_write_word1
-	cmp	esi,2
+;	cmp	esi,2
-	jz	pci_write_dword1
+;	jz	pci_write_dword1
+;	jmp	pci_fin_write1
-	jmp	pci_fin_write1
+	jmp	dword [f62_wcall+esi*4]
-pci_write_byte1:
+.0:
 	out	dx,al
-	jmp pci_fin_write1
+	jmp .pci_fin_write1
-pci_write_word1:
+.1:
 	out	dx,ax
-	jmp pci_fin_write1
+	jmp .pci_fin_write1
-pci_write_dword1:
+.2:
-	out	dx,eax
-	jmp	pci_fin_write1
+	out	dx,eax
-pci_fin_write1:
+.pci_fin_write1:
 		; restore configuration control
 	pop	eax
 	mov	dl,0xf8
 	out	dx,eax
 	xor	eax,eax
-	pop	esi
+	xor	eax,eax
+	;pop	esi
 	ret
 pci_write_reg_2:
-	test	bh,128	;mech#2 only supports 16 devices per bus
+	test	ch,128;bh,128	;mech#2 only supports 16 devices per bus
-	jnz	pci_write_reg_err
+	jnz	pci_api.not_support
 ;	push esi   ; save register size into ESI
-	push esi   ; save register size into ESI
+	mov esi,eax
-	mov esi,eax
+	and esi,3	;not need
 	and esi,3
 	or	bh,0xc0
 	mov	dx,bx
 		; write register
 	mov	eax,ecx
-	or	esi,esi
+;	or	esi,esi
-	jz	pci_write_byte2
+;	jz	pci_write_byte2
-	cmp	esi,1
+;	cmp	esi,1
-	jz	pci_write_word2
+;	jz	pci_write_word2
-	cmp	esi,2
+;	cmp	esi,2
-	jz	pci_write_dword2
+;	jz	pci_write_dword2
+;	jmp	pci_fin_write2
-	jmp	pci_fin_write2
+	jmp	dword [f62_wcall2+esi*4]
-pci_write_byte2:
+.0:
 	out	dx,al
-	jmp pci_fin_write2
+	jmp .pci_fin_write2
-pci_write_word2:
+.1:
 	out	dx,ax
-	jmp pci_fin_write2
+	jmp .pci_fin_write2
-pci_write_dword2:
+.2:
-	out	dx,eax
-	jmp	pci_fin_write2
+	out	dx,eax
-pci_fin_write2:
+.pci_fin_write2:
 		; restore configuration space
 	pop	eax
 	mov	dx,0xcfa
 	out	dx,al
 	mov	dl,0xf8
 	mov	al,ah
 	out	dx,al
 	xor	eax,eax
-	pop	esi
+	;pop	esi
 	ret
-pci_write_reg_err:
+;pci_write_reg_err:
-	xor	eax,eax
+;	xor	eax,eax
-	dec	eax
+;	dec	eax
-	ret
+;	ret
 if defined mmio_pci_addr	; must be set above
 ;***************************************************************************
 ;   Function
 ;      pci_mmio_init
+;
 ;   Description
-;       IN:  bx = device's PCI bus address (bbbbbbbbdddddfff)
+;       IN:  cx = device's PCI bus address (bbbbbbbbdddddfff)
 ;   Returns  eax = user heap space available (bytes)
 ;   Error codes
 ;       eax = -1 : PCI user access blocked,
 ;       eax = -2 : device not registered for uMMIO service
 ;       eax = -3 : user heap initialization failure
 ;***************************************************************************
 pci_mmio_init:
-    cmp     bx, mmio_pci_addr
+    cmp     cx, mmio_pci_addr
     jz	    @f
 ;       eax = -4 : a port i/o BAR register referred
 ;       eax = -5 : dynamic userspace allocation problem
 ;***************************************************************************
+pci_mmio_map:
+;cross
+	mov	eax,ebx
+	mov	ebx,ecx
+	mov	ecx,edx
-pci_mmio_map:
+;;;;;;;;;;;;;;;;;;;
     and     edx,0x0ffff
     cmp     ah,6
     jc     .bar_0_5
     jz     .bar_rom
 ;       eax = -1 if no user PCI access allowed,
 ;       eax =  0 if unmapping failed
 ;***************************************************************************
 pci_mmio_unmap:
-    stdcall user_free, ebx
+    stdcall user_free, ecx;ebx
     ret

Subversion Repositories Kolibri OS

(root)/kernel/trunk/bus/pci/pci32.inc @ 1598 – Rev 1462 → 1591