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Rev 3205 Rev 3346
Line 30... Line 30...
30
        __DEBUG_LEVEL__         = 1
30
        __DEBUG_LEVEL__         = 1
Line 31... Line 31...
31
 
31
 
32
include 'proc32.inc'
32
include 'proc32.inc'
33
include 'imports.inc'
33
include 'imports.inc'
34
include 'fdo.inc'
-
 
35
include '../struct.inc'
34
include 'fdo.inc'
Line 36... Line 35...
36
include 'netdrv.inc'
35
include 'netdrv.inc'
37
 
36
 
38
public START
37
public START
Line 57... Line 56...
57
        REG_MSR                 = 0x58
56
        REG_MSR                 = 0x58
58
        REG_CONFIG4             = 0x5a ; configuration register 4
57
        REG_CONFIG4             = 0x5a ; configuration register 4
59
        REG_HLTCLK              = 0x5b ; undocumented halt clock register
58
        REG_HLTCLK              = 0x5b ; undocumented halt clock register
60
        REG_BMCR                = 0x62 ; basic mode control register
59
        REG_BMCR                = 0x62 ; basic mode control register
61
        REG_ANAR                = 0x66 ; auto negotiation advertisement register
60
        REG_ANAR                = 0x66 ; auto negotiation advertisement register
62
        REG_9346CR_WE           = 11b SHL 6
61
        REG_9346CR_WE           = 11b shl 6
Line 63... Line 62...
63
 
62
 
64
        BIT_RUNT                = 4 ; total packet length < 64 bytes
63
        BIT_RUNT                = 4 ; total packet length < 64 bytes
65
        BIT_LONG                = 3 ; total packet length > 4k
64
        BIT_LONG                = 3 ; total packet length > 4k
66
        BIT_CRC                 = 2 ; crc error occured
65
        BIT_CRC                 = 2 ; crc error occured
Line 164... Line 163...
164
        IDX_RTL8100             = 4
163
        IDX_RTL8100             = 4
165
        IDX_RTL8139D            = 5
164
        IDX_RTL8139D            = 5
166
        IDX_RTL8139D            = 6
165
        IDX_RTL8139D            = 6
167
        IDX_RTL8101             = 7
166
        IDX_RTL8101             = 7
Line 168... Line 167...
168
 
167
 
169
        ISR_SERR                = 1 SHL 15
168
        ISR_SERR                = 1 shl 15
170
        ISR_TIMEOUT             = 1 SHL 14
169
        ISR_TIMEOUT             = 1 shl 14
171
        ISR_LENCHG              = 1 SHL 13
170
        ISR_LENCHG              = 1 shl 13
172
        ISR_FIFOOVW             = 1 SHL 6
171
        ISR_FIFOOVW             = 1 shl 6
173
        ISR_PUN                 = 1 SHL 5
172
        ISR_PUN                 = 1 shl 5
174
        ISR_RXOVW               = 1 SHL 4
173
        ISR_RXOVW               = 1 shl 4
175
        ISR_TER                 = 1 SHL 3
174
        ISR_TER                 = 1 shl 3
176
        ISR_TOK                 = 1 SHL 2
175
        ISR_TOK                 = 1 shl 2
177
        ISR_RER                 = 1 SHL 1
176
        ISR_RER                 = 1 shl 1
Line 178... Line 177...
178
        ISR_ROK                 = 1 SHL 0
177
        ISR_ROK                 = 1 shl 0
179
 
178
 
180
        INTERRUPT_MASK          = ISR_ROK or \
179
        INTERRUPT_MASK          = ISR_ROK or \
181
                                  ISR_RXOVW or \
180
                                  ISR_RXOVW or \
182
                                  ISR_PUN or \
181
                                  ISR_PUN or \
183
                                  ISR_FIFOOVW or \
182
                                  ISR_FIFOOVW or \
184
                                  ISR_LENCHG or \
183
                                  ISR_LENCHG or \
Line 185... Line 184...
185
                                  ISR_TOK or \
184
                                  ISR_TOK or \
186
                                  ISR_TER
185
                                  ISR_TER
187
 
186
 
188
        TSR_OWN                 = 1 SHL 13
187
        TSR_OWN                 = 1 shl 13
189
        TSR_TUN                 = 1 SHL 14
188
        TSR_TUN                 = 1 shl 14
190
        TSR_TOK                 = 1 SHL 15
189
        TSR_TOK                 = 1 shl 15
191
 
190
 
192
        TSR_CDH                 = 1 SHL 28
191
        TSR_CDH                 = 1 shl 28
Line 193... Line 192...
193
        TSR_OWC                 = 1 SHL 29
192
        TSR_OWC                 = 1 shl 29
Line 194... Line 193...
194
        TSR_TABT                = 1 SHL 30
193
        TSR_TABT                = 1 shl 30
Line 195... Line 194...
195
        TSR_CRS                 = 1 SHL 31
194
        TSR_CRS                 = 1 shl 31
Line 196... Line 195...
196
 
195
 
197
 
-
 
Line 198... Line 196...
198
virtual at ebx
196
 
199
 
197
virtual at ebx
Line 200... Line 198...
200
        device:
198
 
Line 316... Line 314...
316
 
314
 
Line 317... Line 315...
317
; Fill in the direct call addresses into the struct
315
; Fill in the direct call addresses into the struct
318
 
316
 
319
        mov     [device.reset], reset
-
 
320
        mov     [device.transmit], transmit
-
 
321
        mov     [device.get_MAC], read_mac
317
        mov     [device.reset], reset
322
        mov     [device.set_MAC], write_mac
318
        mov     [device.transmit], transmit
Line 323... Line 319...
323
        mov     [device.unload], unload
319
        mov     [device.unload], unload
Line 337... Line 333...
337
 
333
 
Line 338... Line 334...
338
; We've found the io address, find IRQ now
334
; We've found the io address, find IRQ now
Line 339... Line 335...
339
 
335
 
340
        PCI_find_irq
336
        PCI_find_irq
Line 341... Line 337...
341
 
337
 
Line 342... Line 338...
342
        DEBUGF  2, "Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
338
        DEBUGF  2, "Hooking into device, dev:%x, bus:%x, irq:%x, I/O addr:%x\n",\
Line 426... Line 422...
426
        DEBUGF  2, "Probing %s device\n", my_service
422
        DEBUGF  2, "Probing %s device\n", my_service
Line 427... Line 423...
427
 
423
 
Line 428... Line 424...
428
        PCI_make_bus_master
424
        PCI_make_bus_master
429
 
-
 
430
; get chip version
425
 
431
 
426
; get chip version
432
        set_io  0
427
        set_io  0
433
        set_io  REG_TXCONFIG + 2
428
        set_io  REG_TXCONFIG + 2
434
        in      ax, dx
429
        in      ax, dx
435
        shr     ah, 2
430
        shr     ah, 2
Line -... Line 431...
-
 
431
        shr     ax, 6
436
        shr     ax, 6
432
        and     al, 01111111b
437
        and     al, 01111111b
433
 
438
 
434
; now find it in our array
439
        mov     ecx, HW_VER_ARRAY_SIZE-1
435
        mov     ecx, HW_VER_ARRAY_SIZE-1
440
  .chip_ver_loop:
436
  .chip_ver_loop:
Line 454... Line 450...
454
        mov     [device.name], ecx
450
        mov     [device.name], ecx
Line 455... Line 451...
455
 
451
 
Line 456... Line 452...
456
        DEBUGF  2, "Chip version: %s\n", ecx
452
        DEBUGF  2, "Chip version: %s\n", ecx
457
 
-
 
458
; wake up the chip
453
 
459
 
454
; wake up the chip
460
        set_io  0
455
        set_io  0
461
        set_io  REG_HLTCLK
456
        set_io  REG_HLTCLK
Line 462... Line 457...
462
        mov     al, 'R'         ; run the clock
457
        mov     al, 'R'         ; run the clock
463
        out     dx, al
-
 
464
 
458
        out     dx, al
465
; unlock config and BMCR registers
459
 
466
 
460
; unlock config and BMCR registers
Line 467... Line 461...
467
        set_io  REG_9346CR
461
        set_io  REG_9346CR
468
        mov     al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
-
 
469
        out     dx, al
462
        mov     al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
470
 
463
        out     dx, al
471
; enable power management
464
 
472
 
465
; enable power management
-
 
466
        set_io  REG_CONFIG1
-
 
467
        in      al, dx
-
 
468
        cmp     [device.hw_ver_id], IDX_RTL8139B
-
 
469
        jae     .new_chip
Line 473... Line 470...
473
        set_io  REG_CONFIG1
470
; wake up older chips
474
        in      al, dx
471
        and     al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
475
        cmp     [device.hw_ver_id], IDX_RTL8139B
472
        out     dx, al
476
        jb      .old_chip
473
        jmp     .finish_wake_up
477
 
474
 
478
; set LWAKE pin to active high (default value).
475
; set LWAKE pin to active high (default value).
479
; it is for Wake-On-LAN functionality of some motherboards.
476
; it is for Wake-On-LAN functionality of some motherboards.
480
; this signal is used to inform the motherboard to execute a wake-up process.
477
; this signal is used to inform the motherboard to execute a wake-up process.
Line 481... Line 478...
481
; only at newer chips.
478
; only at newer chips.
482
 
479
  .new_chip:
483
        or      al, (1 shl BIT_PMEn)
480
        or      al, (1 shl BIT_PMEn)
484
        and     al, not (1 shl BIT_LWACT)
481
        and     al, not (1 shl BIT_LWACT)
Line 485... Line -...
485
        out     dx, al
-
 
486
 
-
 
487
        set_io  REG_CONFIG4
-
 
488
        in      al, dx
-
 
489
        and     al, not (1 shl BIT_LWPTN)
-
 
490
        out     dx, al
-
 
491
 
-
 
492
        jmp     .finish_wake_up
-
 
493
  .old_chip:
-
 
494
 
482
        out     dx, al
495
; wake up older chips
-
 
-
 
483
 
496
 
484
        set_io  REG_CONFIG4
497
        and     al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
485
        in      al, dx
498
        out     dx, al
486
        and     al, not (1 shl BIT_LWPTN)
499
  .finish_wake_up:
487
        out     dx, al
500
 
488
 
Line 512... Line 500...
512
;;   reset: Set up all registers and descriptors, clear some values
500
;;   reset: Set up all registers and descriptors, clear some values
513
;;
501
;;
514
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
502
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Line 515... Line 503...
515
 
503
 
516
reset:
504
reset:
Line 517... Line 505...
517
        DEBUGF  2, "Resetting\n"
505
        DEBUGF  2, "Reset\n"
518
 
-
 
519
; attach int handler
506
 
520
 
507
; attach int handler
521
        movzx   eax, [device.irq_line]
508
        movzx   eax, [device.irq_line]
522
        DEBUGF  1, "Attaching int handler to irq %x, ", eax:1
509
        DEBUGF  1, "Attaching int handler to irq %x\n", eax:1
523
        stdcall AttachIntHandler, eax, int_handler, dword 0
510
        stdcall AttachIntHandler, eax, int_handler, dword 0
524
        test    eax, eax
511
        test    eax, eax
525
        jnz     @f
512
        jnz     @f
526
        DEBUGF  1, "\nCould not attach int handler!\n"
513
        DEBUGF  1, "\nCould not attach int handler!\n"
527
;        or      eax, -1
514
;        or      eax, -1
Line 528... Line 515...
528
;        ret
515
;        ret
529
       @@:
-
 
530
 
516
       @@:
531
; reset chip
517
 
532
 
518
; reset chip
533
        DEBUGF  1, "Resetting chip\n"
519
        DEBUGF  1, "Resetting chip\n"
534
        set_io  0
520
        set_io  0
Line 540... Line 526...
540
        in      al , dx
526
        in      al, dx
541
        test    al , 1 shl BIT_RST
527
        test    al, 1 shl BIT_RST
542
        jz      .reset_completed        ; RST remains 1 during reset
528
        jz      .reset_completed        ; RST remains 1 during reset
543
        dec     cx
529
        dec     cx
544
        jns     .wait_for_reset
530
        jns     .wait_for_reset
-
 
531
        DEBUGF  1, "Reset timeout!\n"
545
  .reset_completed:
532
  .reset_completed:
Line 546... Line 533...
546
 
533
 
547
; unlock config and BMCR registers
-
 
548
 
534
; unlock config and BMCR registers
549
        set_io  REG_9346CR
535
        set_io  REG_9346CR
550
        mov     al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
536
        mov     al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
Line 551... Line 537...
551
        out     dx, al
537
        out     dx, al
552
 
-
 
553
; initialize multicast registers (no filtering)
538
 
554
 
539
; initialize multicast registers (no filtering)
555
        mov     eax, 0xffffffff
540
        mov     eax, 0xffffffff
556
        set_io  REG_MAR0
541
        set_io  REG_MAR0
557
        out     dx, eax
542
        out     dx, eax
Line 558... Line -...
558
        set_io  REG_MAR4
-
 
559
        out     dx, eax
-
 
560
 
-
 
561
; enable Rx/Tx
-
 
562
 
-
 
563
        mov     al, (1 shl BIT_RE) or (1 shl BIT_TE)
-
 
564
        set_io  REG_COMMAND
543
        set_io  REG_MAR4
565
        out     dx, al
544
        out     dx, eax
566
 
-
 
567
; Rxbuffer size, unlimited dma burst, no wrapping, no rx threshold
545
 
568
; accept broadcast packets, accept physical match packets
546
; Rxbuffer size, unlimited dma burst, no wrapping, no rx threshold
569
 
547
; accept broadcast packets, accept physical match packets
Line 570... Line -...
570
        mov     ax, RX_CONFIG
-
 
571
        set_io  REG_RXCONFIG
548
        mov     ax, RX_CONFIG
572
        out     dx, ax
-
 
573
 
549
        set_io  REG_RXCONFIG
574
 
550
        out     dx, ax
575
; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
551
 
Line 576... Line 552...
576
 
552
; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
577
        mov     eax, (TX_MXDMA shl BIT_TX_MXDMA) or (TXRR shl BIT_TXRR) or BIT_IFG1 or BIT_IFG0
-
 
578
        set_io  REG_TXCONFIG
553
        mov     eax, (TX_MXDMA shl BIT_TX_MXDMA) or (TXRR shl BIT_TXRR) or BIT_IFG1 or BIT_IFG0
579
        out     dx, eax
554
        set_io  REG_TXCONFIG
580
 
555
        out     dx, eax
581
; enable auto negotiation
556
 
Line 582... Line 557...
582
 
557
; enable auto negotiation
583
        set_io  REG_BMCR
-
 
584
        in      ax, dx
558
        set_io  REG_BMCR
585
        or      ax, (1 shl BIT_ANE)
559
        in      ax, dx
586
        out     dx, ax
560
        or      ax, (1 shl BIT_ANE)
587
 
561
        out     dx, ax
Line 588... Line 562...
588
; set auto negotiation advertisement
562
 
589
 
-
 
590
        set_io  REG_ANAR
563
; set auto negotiation advertisement
591
        in      ax, dx
564
        set_io  REG_ANAR
592
        or      ax, (1 shl BIT_SELECTOR) or (1 shl BIT_10) or (1 shl BIT_10FD) or (1 shl BIT_TX) or (1 shl BIT_TXFD)
565
        in      ax, dx
Line 593... Line 566...
593
        out     dx, ax
566
        or      ax, (1 shl BIT_SELECTOR) or (1 shl BIT_10) or (1 shl BIT_10FD) or (1 shl BIT_TX) or (1 shl BIT_TXFD)
594
 
-
 
595
; lock config and BMCR registers
567
        out     dx, ax
596
 
568
 
597
        xor     eax, eax
-
 
598
        set_io  REG_9346CR
569
; lock config and BMCR registers
599
        out     dx, al
570
        xor     eax, eax
Line 600... Line 571...
600
 
571
        set_io  REG_9346CR
601
; init RX/TX pointers
-
 
602
 
572
        out     dx, al
603
        mov     [device.rx_data_offset], eax
573
 
604
        mov     [device.curr_tx_desc], al
574
; init RX/TX pointers
Line 605... Line 575...
605
 
575
        mov     [device.rx_data_offset], eax
606
;        set_io  REG_CAPR
-
 
607
;        out     dx, ax
576
        mov     [device.curr_tx_desc], al
608
 
577
;        set_io  REG_CAPR
Line 609... Line 578...
609
; clear packet/byte counters
578
;        out     dx, ax
610
 
-
 
611
        lea     edi, [device.bytes_tx]
579
 
612
        mov     ecx, 6
580
; clear packet/byte counters
613
        rep     stosd
581
        lea     edi, [device.bytes_tx]
614
 
582
        mov     ecx, 6
615
; clear missing packet counter
583
        rep     stosd
616
 
584
 
617
        set_io  REG_MPC
585
; clear missing packet counter
Line 618... Line 586...
618
        out     dx, eax
586
        set_io  REG_MPC
619
 
-
 
620
; set RxBuffer address, init RX buffer offset
587
        out     dx, eax
Line 621... Line 588...
621
 
588
 
622
        mov     eax, [device.rx_buffer]
-
 
623
        mov     dword[eax], 0
589
; set RxBuffer address, init RX buffer offset
-
 
590
        mov     eax, [device.rx_buffer]
-
 
591
        mov     dword[eax], 0                   ; clear receive flags for first packet (really needed??)
-
 
592
        DEBUGF  2, "RX buffer virtual addr=0x%x\n", eax
-
 
593
        GetRealAddr
-
 
594
        DEBUGF  2, "RX buffer real addr=0x%x\n", eax
624
        DEBUGF  2, "RX buffer: %x\n", eax
595
        set_io  REG_RBSTART
625
        GetRealAddr
596
        out     dx, eax
626
        DEBUGF  2, "RX buffer: %x\n", eax
597
 
Line 627... Line 598...
627
        set_io  REG_RBSTART
598
; Read MAC address
628
        out     dx, eax
599
        call    read_mac
Line 629... Line 600...
629
 
600
 
Line 630... Line 601...
630
; Read MAC address
601
; enable Rx/Tx
631
 
602
        set_io  0
632
        call    read_mac
-
 
633
 
603
        mov     al, (1 shl BIT_RE) or (1 shl BIT_TE)
Line 634... Line 604...
634
; enable interrupts
604
        set_io  REG_COMMAND
635
 
605
        out     dx, al
Line 748... Line 718...
748
int_handler:
718
int_handler:
Line 749... Line 719...
749
 
719
 
Line 750... Line 720...
750
        DEBUGF  1, "\n%s int\n", my_service
720
        DEBUGF  1, "\n%s int\n", my_service
751
 
-
 
752
; find pointer of device wich made IRQ occur
721
 
753
 
722
; find pointer of device wich made IRQ occur
754
        mov     ecx, [devices]
723
        mov     ecx, [devices]
755
        test    ecx, ecx
724
        test    ecx, ecx
756
        jz      .nothing
725
        jz      .nothing
757
        mov     esi, device_list
726
        mov     esi, device_list
Line 758... Line 727...
758
  .nextdevice:
727
  .nextdevice:
759
        mov     ebx, [esi]
728
        mov     ebx, [esi]
760
 
729
 
761
        set_io  0
730
        set_io  0
762
        set_io  REG_ISR
731
        set_io  REG_ISR
763
        in      ax, dx
732
        in      ax, dx                          ; Get interrupt status
764
        out     dx, ax                              ; send it back to ACK
733
        out     dx, ax                          ; send it back to ACK
765
        test    ax, ax
734
        test    ax, ax
Line 785... Line 754...
785
  .receive:
754
  .receive:
786
        set_io  0
755
        set_io  0
787
        set_io  REG_COMMAND
756
        set_io  REG_COMMAND
788
        in      al , dx
757
        in      al, dx
789
        test    al , BUFE                           ; test if RX buffer is empty
758
        test    al, BUFE                        ; test if RX buffer is empty
790
        jnz     .finish                             ;
759
        jnz     .finish
Line 791... Line 760...
791
 
760
 
Line 792... Line 761...
792
        DEBUGF  1, "RX: "
761
        DEBUGF  1, "RX: "
793
 
762
 
794
        mov     eax, [device.rx_buffer]
763
        mov     eax, [device.rx_buffer]
795
        add     eax, [device.rx_data_offset]
764
        add     eax, [device.rx_data_offset]
Line 796... Line 765...
796
        test    byte [eax], (1 shl BIT_ROK)         ; check if packet is ok
765
        test    byte [eax], (1 shl BIT_ROK)     ; check if packet is ok
797
        jz      .reset_rx
766
        jz      .reset_rx
798
 
-
 
799
; packet is ok, copy it
767
 
Line 800... Line 768...
800
        movzx   ecx, word [eax+2]                   ; packet length
768
; packet is ok, copy it
801
 
769
        movzx   ecx, word [eax+2]               ; packet length
802
        sub     ecx, 4                              ; don't copy CRC
770
        sub     cx, 4                           ; don't copy CRC
803
 
771
 
Line 804... Line 772...
804
; Update stats
772
; Update stats
Line 805... Line 773...
805
        add     dword [device.bytes_rx], ecx
773
        add     dword [device.bytes_rx], ecx
806
        adc     dword [device.bytes_rx + 4], 0
774
        adc     dword [device.bytes_rx + 4], 0
Line 872... Line 840...
872
 
840
 
873
  .no_fae_error:
841
  .no_fae_error:
874
        DEBUGF  1, "Reset RX\n"
842
        DEBUGF  1, "Reset RX\n"
875
        in      al, dx                              ; read command register
843
        in      al, dx                          ; read command register
876
        push    ax
-
 
877
 
844
        push    ax
878
        and     al, not (1 shl BIT_RE)              ; Clear the RE bit
845
        and     al, not (1 shl BIT_RE)          ; Clear the RE bit
879
        out     dx, al
-
 
880
 
846
        out     dx, al
881
        pop     ax
847
        pop     ax
Line 882... Line 848...
882
        out     dx, al                              ; write original command back
848
        out     dx, al                          ; write original command back
883
 
849
 
Line 983... Line 949...
983
; Something about Cable changed ?
949
; Something about Cable changed ?
984
  @@:
950
  @@:
985
        test    ax, ISR_LENCHG
951
        test    ax, ISR_LENCHG
986
        jz      .fail
952
        jz      .fail
Line 987... Line -...
987
 
-
 
988
        DEBUGF  2, "Cable changed!\n"
953
 
Line 989... Line 954...
989
        call    cable
954
        call    cable
990
 
955
 
991
  .fail:
956
  .fail:
Line 1001... Line 966...
1001
;;                     ;;
966
;;                     ;;
1002
;;;;;;;;;;;;;;;;;;;;;;;;;
967
;;;;;;;;;;;;;;;;;;;;;;;;;
Line 1003... Line 968...
1003
 
968
 
1004
align 4
969
align 4
1005
cable:
970
cable:
Line 1006... Line 971...
1006
        DEBUGF  1, "Checking Cable status: "
971
        DEBUGF  1, "Updating Cable status\n"
1007
 
972
 
1008
        mov     edx, dword [device.io_addr]
973
        set_io  0
Line 1009... Line 974...
1009
        add     edx, REG_MSR
974
        set_io  REG_MSR
1010
        in      al , dx
975
        in      al, dx
Line 1011... Line 976...
1011
 
976
 
1012
;        test    al , 1 SHL 2     ; 0 = link ok 1 = link fail
977
        test    al, 1 shl 2             ; 0 = link ok 1 = link fail
Line -... Line 978...
-
 
978
        jnz     .notconnected
-
 
979
 
1013
;        jnz     .notconnected
980
        test    al, 1 shl 3             ; 0 = 100 Mbps 1 = 10 Mbps
-
 
981
        jnz     .10mbps
-
 
982
 
-
 
983
  .100mbps:
-
 
984
        mov     [device.state], ETH_LINK_100M
-
 
985
        call    NetLinkChanged
-
 
986
 
-
 
987
        ret
-
 
988
 
-
 
989
  .10mbps:
-
 
990
        mov     [device.state], ETH_LINK_10M
-
 
991
        call    NetLinkChanged
1014
 
992
 
Line 1015... Line -...
1015
;        test    al , 1 SHL 3     ; 0 = 100 Mbps 1 = 10 Mbps
-
 
1016
;        jnz     .10mbps
-
 
1017
 
993
        ret
Line 1018... Line 994...
1018
        shr     al, 2
994
 
Line 1034... Line 1010...
1034
write_mac:      ; in: mac pushed onto stack (as 3 words)
1010
write_mac:      ; in: mac pushed onto stack (as 3 words)
Line 1035... Line 1011...
1035
 
1011
 
Line 1036... Line 1012...
1036
        DEBUGF  2, "Writing MAC: "
1012
        DEBUGF  2, "Writing MAC: "
1037
 
-
 
1038
; disable all in command registers
1013
 
1039
 
1014
; disable all in command registers
1040
        set_io  0
1015
        set_io  0
1041
        set_io  REG_9346CR
1016
        set_io  REG_9346CR
Line 1049... Line 1024...
1049
        set_io  REG_ISR
1024
        set_io  REG_ISR
1050
        mov     eax, -1
1025
        mov     eax, -1
1051
        out     dx, ax
1026
        out     dx, ax
Line 1052... Line 1027...
1052
 
1027
 
1053
; enable writing
-
 
1054
 
1028
; enable writing
1055
        set_io  REG_9346CR
1029
        set_io  REG_9346CR
1056
        mov     eax, REG_9346CR_WE
1030
        mov     eax, REG_9346CR_WE
Line 1057... Line 1031...
1057
        out     dx, al
1031
        out     dx, al
1058
 
-
 
1059
 ; write the mac ...
1032
 
1060
 
1033
 ; write the mac ...
1061
        set_io  REG_IDR0
1034
        set_io  REG_IDR0
Line 1062... Line 1035...
1062
        pop     eax
1035
        pop     eax
1063
        out     dx, eax
1036
        out     dx, eax
1064
 
1037
 
1065
        set_io  REG_IDR0+4
1038
        set_io  REG_IDR0+4
Line 1066... Line 1039...
1066
        xor     eax, eax
1039
        xor     eax, eax
1067
        pop     ax
-
 
1068
        out     dx, eax
1040
        pop     ax
1069
 
1041
        out     dx, eax
1070
; disable writing
1042
 
Line 1071... Line 1043...
1071
 
1043
; disable writing