Rev 839 | Rev 841 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 839 | Rev 840 | ||
---|---|---|---|
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
7 | 7 | ||
8 | $Revision: 839 $ |
8 | $Revision: 840 $ |
9 | 9 | ||
10 | 10 | ||
11 | dpl0 equ 10010000b ; data read dpl0 |
11 | dpl0 equ 10010000b ; data read dpl0 |
12 | drw0 equ 10010010b ; data read/write dpl0 |
12 | drw0 equ 10010010b ; data read/write dpl0 |
13 | drw3 equ 11110010b ; data read/write dpl3 |
13 | drw3 equ 11110010b ; data read/write dpl3 |
14 | cpl0 equ 10011010b ; code read dpl0 |
14 | cpl0 equ 10011010b ; code read dpl0 |
15 | cpl3 equ 11111010b ; code read dpl3 |
15 | cpl3 equ 11111010b ; code read dpl3 |
16 | 16 | ||
17 | D32 equ 01000000b ; 32bit segment |
17 | D32 equ 01000000b ; 32bit segment |
18 | G32 equ 10000000b ; page gran |
18 | G32 equ 10000000b ; page gran |
19 | 19 | ||
20 | 20 | ||
21 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
21 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
22 | 22 | ||
23 | CPU_386 equ 3 |
23 | CPU_386 equ 3 |
24 | CPU_486 equ 4 |
24 | CPU_486 equ 4 |
25 | CPU_PENTIUM equ 5 |
25 | CPU_PENTIUM equ 5 |
26 | CPU_P6 equ 6 |
26 | CPU_P6 equ 6 |
27 | CPU_PENTIUM4 equ 0x0F |
27 | CPU_PENTIUM4 equ 0x0F |
28 | 28 | ||
29 | CAPS_FPU equ 00 ;on-chip x87 floating point unit |
29 | CAPS_FPU equ 00 ;on-chip x87 floating point unit |
30 | CAPS_VME equ 01 ;virtual-mode enhancements |
30 | CAPS_VME equ 01 ;virtual-mode enhancements |
31 | CAPS_DE equ 02 ;debugging extensions |
31 | CAPS_DE equ 02 ;debugging extensions |
32 | CAPS_PSE equ 03 ;page-size extensions |
32 | CAPS_PSE equ 03 ;page-size extensions |
33 | CAPS_TSC equ 04 ;time stamp counter |
33 | CAPS_TSC equ 04 ;time stamp counter |
34 | CAPS_MSR equ 05 ;model-specific registers |
34 | CAPS_MSR equ 05 ;model-specific registers |
35 | CAPS_PAE equ 06 ;physical-address extensions |
35 | CAPS_PAE equ 06 ;physical-address extensions |
36 | CAPS_MCE equ 07 ;machine check exception |
36 | CAPS_MCE equ 07 ;machine check exception |
37 | CAPS_CX8 equ 08 ;CMPXCHG8B instruction |
37 | CAPS_CX8 equ 08 ;CMPXCHG8B instruction |
38 | CAPS_APIC equ 09 ;on-chip advanced programmable |
38 | CAPS_APIC equ 09 ;on-chip advanced programmable |
39 | ; interrupt controller |
39 | ; interrupt controller |
40 | ; 10 ;unused |
40 | ; 10 ;unused |
41 | CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions |
41 | CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions |
42 | CAPS_MTRR equ 12 ;memory-type range registers |
42 | CAPS_MTRR equ 12 ;memory-type range registers |
43 | CAPS_PGE equ 13 ;page global extension |
43 | CAPS_PGE equ 13 ;page global extension |
44 | CAPS_MCA equ 14 ;machine check architecture |
44 | CAPS_MCA equ 14 ;machine check architecture |
45 | CAPS_CMOV equ 15 ;conditional move instructions |
45 | CAPS_CMOV equ 15 ;conditional move instructions |
46 | CAPS_PAT equ 16 ;page attribute table |
46 | CAPS_PAT equ 16 ;page attribute table |
47 | 47 | ||
48 | CAPS_PSE36 equ 17 ;page-size extensions |
48 | CAPS_PSE36 equ 17 ;page-size extensions |
49 | CAPS_PSN equ 18 ;processor serial number |
49 | CAPS_PSN equ 18 ;processor serial number |
50 | CAPS_CLFLUSH equ 19 ;CLFUSH instruction |
50 | CAPS_CLFLUSH equ 19 ;CLFUSH instruction |
51 | 51 | ||
52 | CAPS_DS equ 21 ;debug store |
52 | CAPS_DS equ 21 ;debug store |
53 | CAPS_ACPI equ 22 ;thermal monitor and software |
53 | CAPS_ACPI equ 22 ;thermal monitor and software |
54 | ;controlled clock supported |
54 | ;controlled clock supported |
55 | CAPS_MMX equ 23 ;MMX instructions |
55 | CAPS_MMX equ 23 ;MMX instructions |
56 | CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions |
56 | CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions |
57 | CAPS_SSE equ 25 ;SSE instructions |
57 | CAPS_SSE equ 25 ;SSE instructions |
58 | CAPS_SSE2 equ 26 ;SSE2 instructions |
58 | CAPS_SSE2 equ 26 ;SSE2 instructions |
59 | CAPS_SS equ 27 ;self-snoop |
59 | CAPS_SS equ 27 ;self-snoop |
60 | CAPS_HTT equ 28 ;hyper-threading technology |
60 | CAPS_HTT equ 28 ;hyper-threading technology |
61 | CAPS_TM equ 29 ;thermal monitor supported |
61 | CAPS_TM equ 29 ;thermal monitor supported |
62 | CAPS_IA64 equ 30 ;IA64 capabilities |
62 | CAPS_IA64 equ 30 ;IA64 capabilities |
63 | CAPS_PBE equ 31 ;pending break enable |
63 | CAPS_PBE equ 31 ;pending break enable |
64 | 64 | ||
65 | ;ecx |
65 | ;ecx |
66 | CAPS_SSE3 equ 32 ;SSE3 instructions |
66 | CAPS_SSE3 equ 32 ;SSE3 instructions |
67 | ; 33 |
67 | ; 33 |
68 | ; 34 |
68 | ; 34 |
69 | CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions |
69 | CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions |
70 | CAPS_DS_CPL equ 36 ; |
70 | CAPS_DS_CPL equ 36 ; |
71 | CAPS_VMX equ 37 ;virtual mode extensions |
71 | CAPS_VMX equ 37 ;virtual mode extensions |
72 | ; 38 ; |
72 | ; 38 ; |
73 | CAPS_EST equ 39 ;enhansed speed step |
73 | CAPS_EST equ 39 ;enhansed speed step |
74 | CAPS_TM2 equ 40 ;thermal monitor2 supported |
74 | CAPS_TM2 equ 40 ;thermal monitor2 supported |
75 | ; 41 |
75 | ; 41 |
76 | CAPS_CID equ 42 ; |
76 | CAPS_CID equ 42 ; |
77 | ; 43 |
77 | ; 43 |
78 | ; 44 |
78 | ; 44 |
79 | CAPS_CX16 equ 45 ;CMPXCHG16B instruction |
79 | CAPS_CX16 equ 45 ;CMPXCHG16B instruction |
80 | CAPS_xTPR equ 46 ; |
80 | CAPS_xTPR equ 46 ; |
81 | ; |
81 | ; |
82 | ;reserved |
82 | ;reserved |
83 | ; |
83 | ; |
84 | ;ext edx /ecx |
84 | ;ext edx /ecx |
85 | CAPS_SYSCAL equ 64 ; |
85 | CAPS_SYSCAL equ 64 ; |
86 | CAPS_XD equ 65 ;execution disable |
86 | CAPS_XD equ 65 ;execution disable |
87 | CAPS_FFXSR equ 66 ; |
87 | CAPS_FFXSR equ 66 ; |
88 | CAPS_RDTSCP equ 67 ; |
88 | CAPS_RDTSCP equ 67 ; |
89 | CAPS_X64 equ 68 ; |
89 | CAPS_X64 equ 68 ; |
90 | CAPS_3DNOW equ 69 ; |
90 | CAPS_3DNOW equ 69 ; |
91 | CAPS_3DNOWEXT equ 70 ; |
91 | CAPS_3DNOWEXT equ 70 ; |
92 | CAPS_LAHF equ 71 ; |
92 | CAPS_LAHF equ 71 ; |
93 | CAPS_CMP_LEG equ 72 ; |
93 | CAPS_CMP_LEG equ 72 ; |
94 | CAPS_SVM equ 73 ;secure virual machine |
94 | CAPS_SVM equ 73 ;secure virual machine |
95 | CAPS_ALTMOVCR8 equ 74 ; |
95 | CAPS_ALTMOVCR8 equ 74 ; |
96 | 96 | ||
97 | ; CPU MSR names |
97 | ; CPU MSR names |
98 | MSR_SYSENTER_CS equ 0x174 |
98 | MSR_SYSENTER_CS equ 0x174 |
99 | MSR_SYSENTER_ESP equ 0x175 |
99 | MSR_SYSENTER_ESP equ 0x175 |
100 | MSR_SYSENTER_EIP equ 0x176 |
100 | MSR_SYSENTER_EIP equ 0x176 |
101 | MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register |
101 | MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register |
102 | MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
102 | MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
103 | 103 | ||
104 | CR0_PE equ 0x00000001 ;protected mode |
104 | CR0_PE equ 0x00000001 ;protected mode |
105 | CR0_MP equ 0x00000002 ;monitor fpu |
105 | CR0_MP equ 0x00000002 ;monitor fpu |
106 | CR0_EM equ 0x00000004 ;fpu emulation |
106 | CR0_EM equ 0x00000004 ;fpu emulation |
107 | CR0_TS equ 0x00000008 ;task switch |
107 | CR0_TS equ 0x00000008 ;task switch |
108 | CR0_ET equ 0x00000010 ;extension type hardcoded to 1 |
108 | CR0_ET equ 0x00000010 ;extension type hardcoded to 1 |
109 | CR0_NE equ 0x00000020 ;numeric error |
109 | CR0_NE equ 0x00000020 ;numeric error |
110 | CR0_WP equ 0x00010000 ;write protect |
110 | CR0_WP equ 0x00010000 ;write protect |
111 | CR0_AM equ 0x00040000 ;alignment check |
111 | CR0_AM equ 0x00040000 ;alignment check |
112 | CR0_NW equ 0x20000000 ;not write-through |
112 | CR0_NW equ 0x20000000 ;not write-through |
113 | CR0_CD equ 0x40000000 ;cache disable |
113 | CR0_CD equ 0x40000000 ;cache disable |
114 | CR0_PG equ 0x80000000 ;paging |
114 | CR0_PG equ 0x80000000 ;paging |
115 | 115 | ||
116 | 116 | ||
117 | CR4_VME equ 0x0001 |
117 | CR4_VME equ 0x0001 |
118 | CR4_PVI equ 0x0002 |
118 | CR4_PVI equ 0x0002 |
119 | CR4_TSD equ 0x0004 |
119 | CR4_TSD equ 0x0004 |
120 | CR4_DE equ 0x0008 |
120 | CR4_DE equ 0x0008 |
121 | CR4_PSE equ 0x0010 |
121 | CR4_PSE equ 0x0010 |
122 | CR4_PAE equ 0x0020 |
122 | CR4_PAE equ 0x0020 |
123 | CR4_MCE equ 0x0040 |
123 | CR4_MCE equ 0x0040 |
124 | CR4_PGE equ 0x0080 |
124 | CR4_PGE equ 0x0080 |
125 | CR4_PCE equ 0x0100 |
125 | CR4_PCE equ 0x0100 |
126 | CR4_OSFXSR equ 0x0200 |
126 | CR4_OSFXSR equ 0x0200 |
127 | CR4_OSXMMEXPT equ 0x0400 |
127 | CR4_OSXMMEXPT equ 0x0400 |
128 | 128 | ||
129 | SSE_IE equ 0x0001 |
129 | SSE_IE equ 0x0001 |
130 | SSE_DE equ 0x0002 |
130 | SSE_DE equ 0x0002 |
131 | SSE_ZE equ 0x0004 |
131 | SSE_ZE equ 0x0004 |
132 | SSE_OE equ 0x0008 |
132 | SSE_OE equ 0x0008 |
133 | SSE_UE equ 0x0010 |
133 | SSE_UE equ 0x0010 |
134 | SSE_PE equ 0x0020 |
134 | SSE_PE equ 0x0020 |
135 | SSE_DAZ equ 0x0040 |
135 | SSE_DAZ equ 0x0040 |
136 | SSE_IM equ 0x0080 |
136 | SSE_IM equ 0x0080 |
137 | SSE_DM equ 0x0100 |
137 | SSE_DM equ 0x0100 |
138 | SSE_ZM equ 0x0200 |
138 | SSE_ZM equ 0x0200 |
139 | SSE_OM equ 0x0400 |
139 | SSE_OM equ 0x0400 |
140 | SSE_UM equ 0x0800 |
140 | SSE_UM equ 0x0800 |
141 | SSE_PM equ 0x1000 |
141 | SSE_PM equ 0x1000 |
142 | SSE_FZ equ 0x8000 |
142 | SSE_FZ equ 0x8000 |
143 | 143 | ||
144 | SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM) |
144 | SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM) |
145 | 145 | ||
146 | 146 | ||
147 | struc TSS |
147 | struc TSS |
148 | { |
148 | { |
149 | ._back rw 2 |
149 | ._back rw 2 |
150 | ._esp0 rd 1 |
150 | ._esp0 rd 1 |
151 | ._ss0 rw 2 |
151 | ._ss0 rw 2 |
152 | ._esp1 rd 1 |
152 | ._esp1 rd 1 |
153 | ._ss1 rw 2 |
153 | ._ss1 rw 2 |
154 | ._esp2 rd 1 |
154 | ._esp2 rd 1 |
155 | ._ss2 rw 2 |
155 | ._ss2 rw 2 |
156 | ._cr3 rd 1 |
156 | ._cr3 rd 1 |
157 | ._eip rd 1 |
157 | ._eip rd 1 |
158 | ._eflags rd 1 |
158 | ._eflags rd 1 |
159 | ._eax rd 1 |
159 | ._eax rd 1 |
160 | ._ecx rd 1 |
160 | ._ecx rd 1 |
161 | ._edx rd 1 |
161 | ._edx rd 1 |
162 | ._ebx rd 1 |
162 | ._ebx rd 1 |
163 | ._esp rd 1 |
163 | ._esp rd 1 |
164 | ._ebp rd 1 |
164 | ._ebp rd 1 |
165 | ._esi rd 1 |
165 | ._esi rd 1 |
166 | ._edi rd 1 |
166 | ._edi rd 1 |
167 | ._es rw 2 |
167 | ._es rw 2 |
168 | ._cs rw 2 |
168 | ._cs rw 2 |
169 | ._ss rw 2 |
169 | ._ss rw 2 |
170 | ._ds rw 2 |
170 | ._ds rw 2 |
171 | ._fs rw 2 |
171 | ._fs rw 2 |
172 | ._gs rw 2 |
172 | ._gs rw 2 |
173 | ._ldt rw 2 |
173 | ._ldt rw 2 |
174 | ._trap rw 1 |
174 | ._trap rw 1 |
175 | ._io rw 1 |
175 | ._io rw 1 |
176 | rb 24 |
176 | rb 24 |
177 | ._io_map_0 rb 4096 |
177 | ._io_map_0 rb 4096 |
178 | ._io_map_1 rb 4096 |
178 | ._io_map_1 rb 4096 |
179 | } |
179 | } |
180 | 180 | ||
181 | virtual at 0 |
181 | virtual at 0 |
182 | TSS TSS |
182 | TSS TSS |
183 | end virtual |
183 | end virtual |
184 | 184 | ||
185 | TSS_SIZE equ (128+8192) |
185 | TSS_SIZE equ (128+8192) |
186 | 186 | ||
187 | HEAP_BASE equ 0x80000000 |
187 | HEAP_BASE equ 0x80000000 |
188 | 188 | ||
189 | HEAP_MIN_SIZE equ 0x01000000 |
189 | HEAP_MIN_SIZE equ 0x01000000 |
190 | 190 | ||
191 | LFB_BASE equ 0xDF000000 |
191 | LFB_BASE equ 0xDF000000 |
192 | 192 | ||
193 | page_tabs equ 0xDF800000 |
193 | page_tabs equ 0xDF800000 |
194 | app_page_tabs equ 0xDF800000 |
194 | app_page_tabs equ 0xDF800000 |
195 | 195 | ||
196 | OS_TEMP equ 0xDFC00000 |
196 | OS_TEMP equ 0xDFC00000 |
197 | 197 | ||
198 | kernel_tabs equ (page_tabs+ (OS_BASE shr 10)) ;0xFDE00000 |
198 | kernel_tabs equ (page_tabs+ (OS_BASE shr 10)) ;0xFDE00000 |
199 | master_tab equ (page_tabs+ (page_tabs shr 10)) ;0xFDFF70000 |
199 | master_tab equ (page_tabs+ (page_tabs shr 10)) ;0xFDFF70000 |
200 | 200 | ||
201 | OS_BASE equ 0xE0000000 |
201 | OS_BASE equ 0xE0000000 |
202 | 202 | ||
203 | window_data equ OS_BASE |
203 | window_data equ OS_BASE |
204 | 204 | ||
205 | CURRENT_TASK equ (OS_BASE+0x0003000) |
205 | CURRENT_TASK equ (OS_BASE+0x0003000) |
206 | TASK_COUNT equ (OS_BASE+0x0003004) |
206 | TASK_COUNT equ (OS_BASE+0x0003004) |
207 | TASK_BASE equ (OS_BASE+0x0003010) |
207 | TASK_BASE equ (OS_BASE+0x0003010) |
208 | TASK_DATA equ (OS_BASE+0x0003020) |
208 | TASK_DATA equ (OS_BASE+0x0003020) |
209 | TASK_EVENT equ (OS_BASE+0x0003020) |
209 | TASK_EVENT equ (OS_BASE+0x0003020) |
210 | 210 | ||
211 | mouseunder equ (OS_BASE+0x0006900) |
211 | mouseunder equ (OS_BASE+0x0006900) |
212 | CDDataBuf equ (OS_BASE+0x0007000) |
212 | CDDataBuf equ (OS_BASE+0x0007000) |
213 | FLOPPY_BUFF equ (OS_BASE+0x0008000) |
213 | FLOPPY_BUFF equ (OS_BASE+0x0008000) |
214 | ACTIVE_PROC_STACK equ (OS_BASE+0x000A400) ;unused |
214 | ACTIVE_PROC_STACK equ (OS_BASE+0x000A400) ;unused |
215 | idts equ (OS_BASE+0x000B100) |
215 | idts equ (OS_BASE+0x000B100) |
216 | WIN_STACK equ (OS_BASE+0x000C000) |
216 | WIN_STACK equ (OS_BASE+0x000C000) |
217 | WIN_POS equ (OS_BASE+0x000C400) |
217 | WIN_POS equ (OS_BASE+0x000C400) |
218 | FDD_BUFF equ (OS_BASE+0x000D000) |
218 | FDD_BUFF equ (OS_BASE+0x000D000) |
219 | 219 | ||
220 | ;unused ? only one reference |
220 | ;unused ? only one reference |
221 | ENABLE_TASKSWITCH equ (OS_BASE+0x000E000) |
221 | ENABLE_TASKSWITCH equ (OS_BASE+0x000E000) |
222 | 222 | ||
223 | PUTPIXEL equ (OS_BASE+0x000E020) |
223 | PUTPIXEL equ (OS_BASE+0x000E020) |
224 | GETPIXEL equ (OS_BASE+0x000E024) |
224 | GETPIXEL equ (OS_BASE+0x000E024) |
225 | 225 | ||
226 | ;unused ? only one reference |
226 | ;unused ? only one reference |
227 | BANK_SWITCH equ (OS_BASE+0x000E030) |
227 | BANK_SWITCH equ (OS_BASE+0x000E030) |
228 | 228 | ||
229 | ;unused ? store mousepointer |
229 | ;unused ? store mousepointer |
230 | MOUSE_PICTURE equ (OS_BASE+0x000F200) |
230 | MOUSE_PICTURE equ (OS_BASE+0x000F200) |
231 | 231 | ||
232 | MOUSE_VISIBLE equ (OS_BASE+0x000F204) |
232 | MOUSE_VISIBLE equ (OS_BASE+0x000F204) |
233 | WIN_TEMP_XY equ (OS_BASE+0x000F300) |
233 | WIN_TEMP_XY equ (OS_BASE+0x000F300) |
234 | KEY_COUNT equ (OS_BASE+0x000F400) |
234 | KEY_COUNT equ (OS_BASE+0x000F400) |
235 | KEY_BUFF equ (OS_BASE+0x000F401) |
235 | KEY_BUFF equ (OS_BASE+0x000F401) |
236 | 236 | ||
237 | BTN_COUNT equ (OS_BASE+0x000F500) |
237 | BTN_COUNT equ (OS_BASE+0x000F500) |
238 | BTN_BUFF equ (OS_BASE+0x000F501) |
238 | BTN_BUFF equ (OS_BASE+0x000F501) |
239 | 239 | ||
240 | CPU_FREQ equ (OS_BASE+0x000F600) |
240 | CPU_FREQ equ (OS_BASE+0x000F600) |
241 | 241 | ||
242 | ;unused ? no active references |
242 | ;unused ? no active references |
243 | MOUSE_PORT equ (OS_BASE+0x000F604) |
243 | MOUSE_PORT equ (OS_BASE+0x000F604) |
244 | 244 | ||
245 | ;unused |
245 | ;unused |
246 | PS2_CHUNK equ (OS_BASE+0x000FB00) |
246 | PS2_CHUNK equ (OS_BASE+0x000FB00) |
247 | 247 | ||
248 | MOUSE_SCROLL_H equ (OS_BASE+0x000FB08) |
248 | MOUSE_SCROLL_H equ (OS_BASE+0x000FB08) |
249 | MOUSE_X equ (OS_BASE+0x000FB0A) |
249 | MOUSE_X equ (OS_BASE+0x000FB0A) |
250 | MOUSE_Y equ (OS_BASE+0x000FB0C) |
250 | MOUSE_Y equ (OS_BASE+0x000FB0C) |
251 | MOUSE_SCROLL_V equ (OS_BASE+0x000FB0E) |
251 | MOUSE_SCROLL_V equ (OS_BASE+0x000FB0E) |
252 | 252 | ||
253 | MOUSE_COLOR_MEM equ (OS_BASE+0x000FB10) |
253 | MOUSE_COLOR_MEM equ (OS_BASE+0x000FB10) |
254 | COLOR_TEMP equ (OS_BASE+0x000FB30) |
254 | COLOR_TEMP equ (OS_BASE+0x000FB30) |
255 | BTN_DOWN equ (OS_BASE+0x000FB40) |
255 | BTN_DOWN equ (OS_BASE+0x000FB40) |
256 | MOUSE_DOWN equ (OS_BASE+0x000FB44) |
256 | MOUSE_DOWN equ (OS_BASE+0x000FB44) |
257 | X_UNDER equ (OS_BASE+0x000FB4A) |
257 | X_UNDER equ (OS_BASE+0x000FB4A) |
258 | Y_UNDER equ (OS_BASE+0x000FB4C) |
258 | Y_UNDER equ (OS_BASE+0x000FB4C) |
259 | ScreenBPP equ (OS_BASE+0x000FBF1) |
259 | ScreenBPP equ (OS_BASE+0x000FBF1) |
260 | 260 | ||
261 | ;unused ? only one reference |
261 | ;unused ? only one reference |
262 | MOUSE_BUFF_COUNT equ (OS_BASE+0x000FCFF) |
262 | MOUSE_BUFF_COUNT equ (OS_BASE+0x000FCFF) |
263 | 263 | ||
264 | LFBAddress equ (OS_BASE+0x000FE80) |
264 | LFBAddress equ (OS_BASE+0x000FE80) |
265 | MEM_AMOUNT equ (OS_BASE+0x000FE8C) |
265 | MEM_AMOUNT equ (OS_BASE+0x000FE8C) |
266 | 266 | ||
267 | Screen_Max_X equ (OS_BASE+0x000FE00) |
267 | Screen_Max_X equ (OS_BASE+0x000FE00) |
268 | Screen_Max_Y equ (OS_BASE+0x000FE04) |
268 | Screen_Max_Y equ (OS_BASE+0x000FE04) |
269 | BytesPerScanLine equ (OS_BASE+0x000FE08) |
269 | BytesPerScanLine equ (OS_BASE+0x000FE08) |
270 | SCR_MODE equ (OS_BASE+0x000FE0C) |
270 | SCR_MODE equ (OS_BASE+0x000FE0C) |
271 | 271 | ||
272 | BTN_ADDR equ (OS_BASE+0x000FE88) |
272 | BTN_ADDR equ (OS_BASE+0x000FE88) |
273 | SYS_SHUTDOWN equ (OS_BASE+0x000FF00) |
273 | SYS_SHUTDOWN equ (OS_BASE+0x000FF00) |
274 | TASK_ACTIVATE equ (OS_BASE+0x000FF01) |
274 | TASK_ACTIVATE equ (OS_BASE+0x000FF01) |
275 | 275 | ||
276 | REDRAW_BACKGROUND equ (OS_BASE+0x000FFF0) |
276 | REDRAW_BACKGROUND equ (OS_BASE+0x000FFF0) |
277 | BANK_RW equ (OS_BASE+0x000FFF2) |
277 | BANK_RW equ (OS_BASE+0x000FFF2) |
278 | MOUSE_BACKGROUND equ (OS_BASE+0x000FFF4) |
278 | MOUSE_BACKGROUND equ (OS_BASE+0x000FFF4) |
279 | DONT_DRAW_MOUSE equ (OS_BASE+0x000FFF5) |
279 | DONT_DRAW_MOUSE equ (OS_BASE+0x000FFF5) |
280 | DONT_SWITCH equ (OS_BASE+0x000FFFF) |
280 | DONT_SWITCH equ (OS_BASE+0x000FFFF) |
281 | 281 | ||
282 | TMP_STACK_TOP equ 0x006CC00 |
282 | TMP_STACK_TOP equ 0x006CC00 |
283 | 283 | ||
284 | FONT_II equ (OS_BASE+0x006DC00) |
284 | FONT_II equ (OS_BASE+0x006DC00) |
285 | FONT_I equ (OS_BASE+0x006E600) |
285 | FONT_I equ (OS_BASE+0x006E600) |
286 | 286 | ||
287 | sys_pgdir equ (OS_BASE+0x006F000) |
287 | sys_pgdir equ (OS_BASE+0x006F000) |
288 | 288 | ||
289 | DRIVE_DATA equ (OS_BASE+0x0070000) |
289 | DRIVE_DATA equ (OS_BASE+0x0070000) |
290 | 290 | ||
291 | SLOT_BASE equ (OS_BASE+0x0080000) |
291 | SLOT_BASE equ (OS_BASE+0x0080000) |
292 | 292 | ||
293 | ;unused |
293 | ;unused |
294 | TMP_BUFF equ (OS_BASE+0x0090000) |
294 | TMP_BUFF equ (OS_BASE+0x0090000) |
295 | 295 | ||
296 | VGABasePtr equ (OS_BASE+0x00A0000) |
296 | VGABasePtr equ (OS_BASE+0x00A0000) |
297 | 297 | ||
298 | RAMDISK equ (OS_BASE+0x0100000) |
298 | RAMDISK equ (OS_BASE+0x0100000) |
299 | RAMDISK_FAT equ (OS_BASE+0x0280000) |
299 | RAMDISK_FAT equ (OS_BASE+0x0280000) |
300 | FLOPPY_FAT equ (OS_BASE+0x0282000) |
300 | FLOPPY_FAT equ (OS_BASE+0x0282000) |
301 | 301 | ||
302 | IDE_DMA equ 0x284000 |
302 | IDE_DMA equ 0x284000 |
303 | 303 | ||
304 | BgrAuxTable equ (OS_BASE+0x0298000) |
304 | BgrAuxTable equ (OS_BASE+0x0298000) |
305 | ; unused? |
305 | ; unused? |
306 | SB16Buffer equ (OS_BASE+0x2A0000) |
306 | SB16Buffer equ (OS_BASE+0x2A0000) |
307 | SB16_Status equ (OS_BASE+0x02B0000) |
307 | SB16_Status equ (OS_BASE+0x02B0000) |
308 | 308 | ||
309 | BUTTON_INFO equ (OS_BASE+0x02C0000) |
309 | BUTTON_INFO equ (OS_BASE+0x02C0000) |
310 | RESERVED_PORTS equ (OS_BASE+0x02D0000) |
310 | RESERVED_PORTS equ (OS_BASE+0x02D0000) |
311 | IRQ_SAVE equ (OS_BASE+0x02E0000) |
311 | IRQ_SAVE equ (OS_BASE+0x02E0000) |
312 | BOOT_VAR equ (OS_BASE+0x02f0000) |
312 | BOOT_VAR equ (OS_BASE+0x02f0000) |
313 | 313 | ||
314 | stack_data_start equ (OS_BASE+0x0300000) |
314 | stack_data_start equ (OS_BASE+0x0300000) |
315 | eth_data_start equ (OS_BASE+0x0300000) |
315 | eth_data_start equ (OS_BASE+0x0300000) |
316 | stack_data equ (OS_BASE+0x0304000) |
316 | stack_data equ (OS_BASE+0x0304000) |
317 | stack_data_end equ (OS_BASE+0x031ffff) |
317 | stack_data_end equ (OS_BASE+0x031ffff) |
318 | resendQ equ (OS_BASE+0x0320000) |
318 | resendQ equ (OS_BASE+0x0320000) |
319 | VMODE_BASE equ (OS_BASE+0x0328000) |
319 | VMODE_BASE equ (OS_BASE+0x0328000) |
320 | skin_data equ (OS_BASE+0x0330000) |
320 | skin_data equ (OS_BASE+0x0330000) |
321 | draw_data equ (OS_BASE+0x0338000); |
321 | draw_data equ (OS_BASE+0x0338000); |
322 | 322 | ||
323 | BgrDrawMode equ (OS_BASE+0x033BFF4) |
323 | BgrDrawMode equ (OS_BASE+0x033BFF4) |
324 | BgrDataWidth equ (OS_BASE+0x033BFF8) |
324 | BgrDataWidth equ (OS_BASE+0x033BFF8) |
325 | BgrDataHeight equ (OS_BASE+0x033BFFC) |
325 | BgrDataHeight equ (OS_BASE+0x033BFFC) |
326 | WinMapAddress equ (OS_BASE+0x033C000) |
- | |
327 | display_data equ (OS_BASE+0x033C000) ;1024*1280=0x140000 |
- | |
- | 326 | ||
- | 327 | ;display_data equ (OS_BASE+0x033C000) ;1024*1280=0x140000 |
|
328 | 328 | ||
329 | virtual at (OS_BASE+0x047CF80) |
329 | virtual at (OS_BASE+0x033CF80) |
330 | tss TSS |
330 | tss TSS |
331 | end virtual |
331 | end virtual |
332 | 332 | ||
333 | sys_pgmap equ (OS_BASE+0x047F000) |
- | |
334 | - | ||
335 | - | ||
336 | new_app_base equ 0; |
333 | sys_pgmap equ (OS_BASE+0x033F000) |
337 | 334 | ||
338 | twdw equ 0x3000 ;(CURRENT_TASK-window_data) |
335 | twdw equ 0x3000 ;(CURRENT_TASK-window_data) |
339 | 336 | ||
340 | std_application_base_address equ new_app_base |
337 | std_application_base_address equ new_app_base |
341 | RING0_STACK_SIZE equ (0x2000 - 512) ;512 áà éò äëÿ êîÃòåêñòà FPU |
338 | RING0_STACK_SIZE equ (0x2000 - 512) ;512 áà éò äëÿ êîÃòåêñòà FPU |
342 | 339 | ||
343 | REG_SS equ (RING0_STACK_SIZE-4) |
340 | REG_SS equ (RING0_STACK_SIZE-4) |
344 | REG_APP_ESP equ (RING0_STACK_SIZE-8) |
341 | REG_APP_ESP equ (RING0_STACK_SIZE-8) |
345 | REG_EFLAGS equ (RING0_STACK_SIZE-12) |
342 | REG_EFLAGS equ (RING0_STACK_SIZE-12) |
346 | REG_CS equ (RING0_STACK_SIZE-16) |
343 | REG_CS equ (RING0_STACK_SIZE-16) |
347 | REG_EIP equ (RING0_STACK_SIZE-20) |
344 | REG_EIP equ (RING0_STACK_SIZE-20) |
348 | REG_EAX equ (RING0_STACK_SIZE-24) |
345 | REG_EAX equ (RING0_STACK_SIZE-24) |
349 | REG_ECX equ (RING0_STACK_SIZE-28) |
346 | REG_ECX equ (RING0_STACK_SIZE-28) |
350 | REG_EDX equ (RING0_STACK_SIZE-32) |
347 | REG_EDX equ (RING0_STACK_SIZE-32) |
351 | REG_EBX equ (RING0_STACK_SIZE-36) |
348 | REG_EBX equ (RING0_STACK_SIZE-36) |
352 | REG_ESP equ (RING0_STACK_SIZE-40) ;RING0_STACK_SIZE-20 |
349 | REG_ESP equ (RING0_STACK_SIZE-40) ;RING0_STACK_SIZE-20 |
353 | REG_EBP equ (RING0_STACK_SIZE-44) |
350 | REG_EBP equ (RING0_STACK_SIZE-44) |
354 | REG_ESI equ (RING0_STACK_SIZE-48) |
351 | REG_ESI equ (RING0_STACK_SIZE-48) |
355 | REG_EDI equ (RING0_STACK_SIZE-52) |
352 | REG_EDI equ (RING0_STACK_SIZE-52) |
356 | REG_RET equ (RING0_STACK_SIZE-56) ;irq0.return |
353 | REG_RET equ (RING0_STACK_SIZE-56) ;irq0.return |
357 | 354 | ||
358 | 355 | ||
359 | PG_UNMAP equ 0x000 |
356 | PG_UNMAP equ 0x000 |
360 | PG_MAP equ 0x001 |
357 | PG_MAP equ 0x001 |
361 | PG_WRITE equ 0x002 |
358 | PG_WRITE equ 0x002 |
362 | PG_SW equ 0x003 |
359 | PG_SW equ 0x003 |
363 | PG_USER equ 0x005 |
360 | PG_USER equ 0x005 |
364 | PG_UW equ 0x007 |
361 | PG_UW equ 0x007 |
365 | PG_NOCACHE equ 0x018 |
362 | PG_NOCACHE equ 0x018 |
366 | PG_LARGE equ 0x080 |
363 | PG_LARGE equ 0x080 |
367 | PG_GLOBAL equ 0x100 |
364 | PG_GLOBAL equ 0x100 |
368 | 365 | ||
369 | ;;;;;;;;;;;boot time variables |
366 | ;;;;;;;;;;;boot time variables |
370 | 367 | ||
371 | ;BOOT_BPP equ 0x9000 ;byte bits per pixel |
368 | ;BOOT_BPP equ 0x9000 ;byte bits per pixel |
372 | BOOT_SCANLINE equ 0x9001 ;word scanline length |
369 | BOOT_SCANLINE equ 0x9001 ;word scanline length |
373 | BOOT_VESA_MODE equ 0x9008 ;word vesa video mode |
370 | BOOT_VESA_MODE equ 0x9008 ;word vesa video mode |
374 | ;;BOOT_X_RES equ 0x900A ;word X res |
371 | ;;BOOT_X_RES equ 0x900A ;word X res |
375 | ;;BOOT_Y_RES equ 0x900C ;word Y res |
372 | ;;BOOT_Y_RES equ 0x900C ;word Y res |
376 | ;;BOOT_MOUSE_PORT equ 0x9010 ;byte mouse port - not used |
373 | ;;BOOT_MOUSE_PORT equ 0x9010 ;byte mouse port - not used |
377 | BOOT_BANK_SW equ 0x9014 ;dword Vesa 1.2 pm bank switch |
374 | BOOT_BANK_SW equ 0x9014 ;dword Vesa 1.2 pm bank switch |
378 | BOOT_LFB equ 0x9018 ;dword Vesa 2.0 LFB address |
375 | BOOT_LFB equ 0x9018 ;dword Vesa 2.0 LFB address |
379 | BOOT_MTRR equ 0x901C ;byte 0 or 1 : enable MTRR graphics acceleration |
376 | BOOT_MTRR equ 0x901C ;byte 0 or 1 : enable MTRR graphics acceleration |
380 | BOOT_LOG equ 0x901D ;byte not used anymore (0 or 1 : enable system log display) |
377 | BOOT_LOG equ 0x901D ;byte not used anymore (0 or 1 : enable system log display) |
381 | BOOT_DIRECT_LFB equ 0x901E ;byte 0 or 1 : enable direct lfb write, paging disabled |
378 | BOOT_DIRECT_LFB equ 0x901E ;byte 0 or 1 : enable direct lfb write, paging disabled |
382 | BOOT_PCI_DATA equ 0x9020 ;8bytes pci data |
379 | BOOT_PCI_DATA equ 0x9020 ;8bytes pci data |
383 | BOOT_VRR equ 0x9030 ;byte VRR start enabled 1, 2-no |
380 | BOOT_VRR equ 0x9030 ;byte VRR start enabled 1, 2-no |
384 | BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr |
381 | BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr |
385 | BOOT_MEM_AMOUNT equ 0x9034 ;dword memory amount |
382 | BOOT_MEM_AMOUNT equ 0x9034 ;dword memory amount |
386 | 383 | ||
387 | TMP_FILE_NAME equ 0 |
384 | TMP_FILE_NAME equ 0 |
388 | TMP_CMD_LINE equ 1024 |
385 | TMP_CMD_LINE equ 1024 |
389 | TMP_ICON_OFFS equ 1280 |
386 | TMP_ICON_OFFS equ 1280 |
390 | 387 | ||
391 | 388 | ||
392 | EVENT_REDRAW equ 0x00000001 |
389 | EVENT_REDRAW equ 0x00000001 |
393 | EVENT_KEY equ 0x00000002 |
390 | EVENT_KEY equ 0x00000002 |
394 | EVENT_BUTTON equ 0x00000004 |
391 | EVENT_BUTTON equ 0x00000004 |
395 | EVENT_BACKGROUND equ 0x00000010 |
392 | EVENT_BACKGROUND equ 0x00000010 |
396 | EVENT_MOUSE equ 0x00000020 |
393 | EVENT_MOUSE equ 0x00000020 |
397 | EVENT_IPC equ 0x00000040 |
394 | EVENT_IPC equ 0x00000040 |
398 | EVENT_NETWORK equ 0x00000080 |
395 | EVENT_NETWORK equ 0x00000080 |
399 | EVENT_DEBUG equ 0x00000100 |
396 | EVENT_DEBUG equ 0x00000100 |
400 | EVENT_EXTENDED equ 0x00000200 |
397 | EVENT_EXTENDED equ 0x00000200 |
401 | 398 | ||
402 | EV_INTR equ 1 |
399 | EV_INTR equ 1 |
403 | 400 | ||
404 | struc THR_DATA |
401 | struc THR_DATA |
405 | { |
402 | { |
406 | rb (8192-512) |
403 | rb (8192-512) |
407 | .pl0_stack: |
404 | .pl0_stack: |
408 | .fpu_state rb 512 |
405 | .fpu_state rb 512 |
409 | .tls_page rb 4096 |
406 | .tls_page rb 4096 |
410 | .pdbr rb 4096 |
407 | .pdbr rb 4096 |
411 | } |
408 | } |
412 | 409 | ||
413 | THR_DATA_SIZE equ 4096*4 |
410 | THR_DATA_SIZE equ 4096*4 |
414 | 411 | ||
415 | virtual at (OS_BASE-THR_DATA_SIZE) |
412 | virtual at (OS_BASE-THR_DATA_SIZE) |
416 | thr_data THR_DATA |
413 | thr_data THR_DATA |
417 | end virtual |
414 | end virtual |
418 | 415 | ||
419 | struc SYS_VARS |
416 | struc SYS_VARS |
420 | { .bpp dd ? |
417 | { .bpp dd ? |
421 | .scanline dd ? |
418 | .scanline dd ? |
422 | .vesa_mode dd ? |
419 | .vesa_mode dd ? |
423 | .x_res dd ? |
420 | .x_res dd ? |
424 | .y_res dd ? |
421 | .y_res dd ? |
425 | } |
422 | } |
426 | 423 | ||
427 | struc APPOBJ ;common object header |
424 | struc APPOBJ ;common object header |
428 | { |
425 | { |
429 | .magic dd ? ; |
426 | .magic dd ? ; |
430 | .destroy dd ? ;internal destructor |
427 | .destroy dd ? ;internal destructor |
431 | .fd dd ? ;next object in list |
428 | .fd dd ? ;next object in list |
432 | .bk dd ? ;prev object in list |
429 | .bk dd ? ;prev object in list |
433 | .pid dd ? ;owner id |
430 | .pid dd ? ;owner id |
434 | }; |
431 | }; |
435 | 432 | ||
436 | virtual at 0 |
433 | virtual at 0 |
437 | APPOBJ APPOBJ |
434 | APPOBJ APPOBJ |
438 | end virtual |
435 | end virtual |
439 | 436 | ||
440 | APP_OBJ_OFFSET equ 48 |
437 | APP_OBJ_OFFSET equ 48 |
441 | APP_EV_OFFSET equ 40 |
438 | APP_EV_OFFSET equ 40 |
442 | 439 | ||
443 | struc CURSOR |
440 | struc CURSOR |
444 | {;common object header |
441 | {;common object header |
445 | .magic dd ? ;'CURS' |
442 | .magic dd ? ;'CURS' |
446 | .destroy dd ? ;internal destructor |
443 | .destroy dd ? ;internal destructor |
447 | .fd dd ? ;next object in list |
444 | .fd dd ? ;next object in list |
448 | .bk dd ? ;prev object in list |
445 | .bk dd ? ;prev object in list |
449 | .pid dd ? ;owner id |
446 | .pid dd ? ;owner id |
450 | 447 | ||
451 | ;cursor data |
448 | ;cursor data |
452 | .base dd ? ;allocated memory |
449 | .base dd ? ;allocated memory |
453 | .hot_x dd ? ;hotspot coords |
450 | .hot_x dd ? ;hotspot coords |
454 | .hot_y dd ? |
451 | .hot_y dd ? |
455 | } |
452 | } |
456 | virtual at 0 |
453 | virtual at 0 |
457 | CURSOR CURSOR |
454 | CURSOR CURSOR |
458 | end virtual |
455 | end virtual |
459 | 456 | ||
460 | CURSOR_SIZE equ 32 |
457 | CURSOR_SIZE equ 32 |
461 | 458 | ||
462 | struc EVENT |
459 | struc EVENT |
463 | { |
460 | { |
464 | .magic dd ? ;'EVNT' |
461 | .magic dd ? ;'EVNT' |
465 | .destroy dd ? ;internal destructor |
462 | .destroy dd ? ;internal destructor |
466 | .fd dd ? ;next object in list |
463 | .fd dd ? ;next object in list |
467 | .bk dd ? ;prev object in list |
464 | .bk dd ? ;prev object in list |
468 | .pid dd ? ;owner id |
465 | .pid dd ? ;owner id |
469 | 466 | ||
470 | .id dd ? ;event uid |
467 | .id dd ? ;event uid |
471 | .state dd ? ;internal flags |
468 | .state dd ? ;internal flags |
472 | .code dd ? |
469 | .code dd ? |
473 | rd 5 |
470 | rd 5 |
474 | } |
471 | } |
475 | EVENT_SIZE equ 52 |
472 | EVENT_SIZE equ 52 |
476 | 473 | ||
477 | virtual at 0 |
474 | virtual at 0 |
478 | EVENT EVENT |
475 | EVENT EVENT |
479 | end virtual |
476 | end virtual |
480 | 477 | ||
481 | 478 | ||
482 | struc HEAP_DATA |
479 | struc HEAP_DATA |
483 | { |
480 | { |
484 | .mutex rd 1 |
481 | .mutex rd 1 |
485 | .refcount rd 1 |
482 | .refcount rd 1 |
486 | .heap_base rd 1 |
483 | .heap_base rd 1 |
487 | .heap_top rd 1 |
484 | .heap_top rd 1 |
488 | .app_mem rd 1 |
485 | .app_mem rd 1 |
489 | } |
486 | } |
490 | 487 | ||
491 | HEAP_DATA_SIZE equ 20 |
488 | HEAP_DATA_SIZE equ 20 |
492 | virtual at 0 |
489 | virtual at 0 |
493 | HEAP_DATA HEAP_DATA |
490 | HEAP_DATA HEAP_DATA |
494 | end virtual |
491 | end virtual |
495 | 492 | ||
496 | struc BOOT_DATA |
493 | struc BOOT_DATA |
497 | { .bpp dd ? |
494 | { .bpp dd ? |
498 | .scanline dd ? |
495 | .scanline dd ? |
499 | .vesa_mode dd ? |
496 | .vesa_mode dd ? |
500 | .x_res dd ? |
497 | .x_res dd ? |
501 | .y_res dd ? |
498 | .y_res dd ? |
502 | .mouse_port dd ? |
499 | .mouse_port dd ? |
503 | .bank_switch dd ? |
500 | .bank_switch dd ? |
504 | .lfb dd ? |
501 | .lfb dd ? |
505 | .vesa_mem dd ? |
502 | .vesa_mem dd ? |
506 | .log dd ? |
503 | .log dd ? |
507 | .direct_lfb dd ? |
504 | .direct_lfb dd ? |
508 | .pci_data dd ? |
505 | .pci_data dd ? |
509 | ; dd ? |
506 | ; dd ? |
510 | .vrr dd ? |
507 | .vrr dd ? |
511 | .ide_base dd ? |
508 | .ide_base dd ? |
512 | .mem_amount dd ? |
509 | .mem_amount dd ? |
513 | .pages_count dd ? |
510 | .pages_count dd ? |
514 | .pagemap_size dd ? |
511 | .pagemap_size dd ? |
515 | .kernel_max dd ? |
512 | .kernel_max dd ? |
516 | .kernel_pages dd ? |
513 | .kernel_pages dd ? |
517 | .kernel_tables dd ? |
514 | .kernel_tables dd ? |
518 | 515 | ||
519 | .cpu_vendor dd ? |
516 | .cpu_vendor dd ? |
520 | dd ? |
517 | dd ? |
521 | dd ? |
518 | dd ? |
522 | .cpu_sign dd ? |
519 | .cpu_sign dd ? |
523 | .cpu_info dd ? |
520 | .cpu_info dd ? |
524 | .cpu_caps dd ? |
521 | .cpu_caps dd ? |
525 | dd ? |
522 | dd ? |
526 | dd ? |
523 | dd ? |
527 | } |
524 | } |
528 | 525 | ||
529 | virtual at 0 |
526 | virtual at 0 |
530 | BOOT_DATA BOOT_DATA |
527 | BOOT_DATA BOOT_DATA |
531 | end virtual |
528 | end virtual |
532 | 529 | ||
533 | struc MEM_STATE |
530 | struc MEM_STATE |
534 | { .mutex rd 1 |
531 | { .mutex rd 1 |
535 | .smallmap rd 1 |
532 | .smallmap rd 1 |
536 | .treemap rd 1 |
533 | .treemap rd 1 |
537 | .topsize rd 1 |
534 | .topsize rd 1 |
538 | .top rd 1 |
535 | .top rd 1 |
539 | .smallbins rd 4*32 |
536 | .smallbins rd 4*32 |
540 | .treebins rd 32 |
537 | .treebins rd 32 |
541 | } |
538 | } |
542 | 539 | ||
543 | struc PG_DATA |
540 | struc PG_DATA |
544 | { .mem_amount dd ? |
541 | { .mem_amount dd ? |
545 | .vesa_mem dd ? |
542 | .vesa_mem dd ? |
546 | .pages_count dd ? |
543 | .pages_count dd ? |
547 | .pages_free dd ? |
544 | .pages_free dd ? |
548 | .pages_faults dd ? |
545 | .pages_faults dd ? |
549 | .pagemap_size dd ? |
546 | .pagemap_size dd ? |
550 | .kernel_pages dd ? |
547 | .kernel_pages dd ? |
551 | .kernel_tables dd ? |
548 | .kernel_tables dd ? |
552 | .sys_page_dir dd ? |
549 | .sys_page_dir dd ? |
553 | .pg_mutex dd ? |
550 | .pg_mutex dd ? |
554 | } |
551 | } |
555 | 552 | ||
556 | ;struc LIB |
553 | ;struc LIB |
557 | ;{ .lib_name rb 16 |
554 | ;{ .lib_name rb 16 |
558 | ; .lib_base dd ? |
555 | ; .lib_base dd ? |
559 | ; .lib_start dd ? |
556 | ; .lib_start dd ? |
560 | ; .export dd ? |
557 | ; .export dd ? |
561 | ; .import dd ? |
558 | ; .import dd ? |
562 | ;} |
559 | ;} |
563 | 560 | ||
564 | struc SRV |
561 | struc SRV |
565 | { .srv_name rb 16 ;ASCIIZ string |
562 | { .srv_name rb 16 ;ASCIIZ string |
566 | .magic dd ? ;+0x10 ;'SRV ' |
563 | .magic dd ? ;+0x10 ;'SRV ' |
567 | .size dd ? ;+0x14 ;size of structure SRV |
564 | .size dd ? ;+0x14 ;size of structure SRV |
568 | .fd dd ? ;+0x18 ;next SRV descriptor |
565 | .fd dd ? ;+0x18 ;next SRV descriptor |
569 | .bk dd ? ;+0x1C ;prev SRV descriptor |
566 | .bk dd ? ;+0x1C ;prev SRV descriptor |
570 | .base dd ? ;+0x20 ;service base address |
567 | .base dd ? ;+0x20 ;service base address |
571 | .entry dd ? ;+0x24 ;service START function |
568 | .entry dd ? ;+0x24 ;service START function |
572 | .srv_proc dd ? ;+0x28 ;main service handler |
569 | .srv_proc dd ? ;+0x28 ;main service handler |
573 | } |
570 | } |
574 | 571 | ||
575 | SRV_FD_OFFSET equ 0x18 |
572 | SRV_FD_OFFSET equ 0x18 |
576 | SRV_SIZE equ 44 |
573 | SRV_SIZE equ 44 |
577 | 574 | ||
578 | DRV_ENTRY equ 1 |
575 | DRV_ENTRY equ 1 |
579 | DRV_EXIT equ -1 |
576 | DRV_EXIT equ -1 |
580 | 577 | ||
581 | struc COFF_HEADER |
578 | struc COFF_HEADER |
582 | { .machine dw ? |
579 | { .machine dw ? |
583 | .nSections dw ? |
580 | .nSections dw ? |
584 | .DataTime dd ? |
581 | .DataTime dd ? |
585 | .pSymTable dd ? |
582 | .pSymTable dd ? |
586 | .nSymbols dd ? |
583 | .nSymbols dd ? |
587 | .optHeader dw ? |
584 | .optHeader dw ? |
588 | .flags dw ? |
585 | .flags dw ? |
589 | }; |
586 | }; |
590 | 587 | ||
591 | 588 | ||
592 | struc COFF_SECTION |
589 | struc COFF_SECTION |
593 | { .Name rb 8 |
590 | { .Name rb 8 |
594 | .VirtualSize dd ? |
591 | .VirtualSize dd ? |
595 | .VirtualAddress dd ? |
592 | .VirtualAddress dd ? |
596 | .SizeOfRawData dd ? |
593 | .SizeOfRawData dd ? |
597 | .PtrRawData dd ? |
594 | .PtrRawData dd ? |
598 | .PtrReloc dd ? |
595 | .PtrReloc dd ? |
599 | .PtrLinenumbers dd ? |
596 | .PtrLinenumbers dd ? |
600 | .NumReloc dw ? |
597 | .NumReloc dw ? |
601 | .NumLinenum dw ? |
598 | .NumLinenum dw ? |
602 | .Characteristics dd ? |
599 | .Characteristics dd ? |
603 | } |
600 | } |
604 | COFF_SECTION_SIZE equ 40 |
601 | COFF_SECTION_SIZE equ 40 |
605 | 602 | ||
606 | struc COFF_RELOC |
603 | struc COFF_RELOC |
607 | { .VirtualAddress dd ? |
604 | { .VirtualAddress dd ? |
608 | .SymIndex dd ? |
605 | .SymIndex dd ? |
609 | .Type dw ? |
606 | .Type dw ? |
610 | } |
607 | } |
611 | 608 | ||
612 | struc COFF_SYM |
609 | struc COFF_SYM |
613 | { .Name rb 8 |
610 | { .Name rb 8 |
614 | .Value dd ? |
611 | .Value dd ? |
615 | .SectionNumber dw ? |
612 | .SectionNumber dw ? |
616 | .Type dw ? |
613 | .Type dw ? |
617 | .StorageClass db ? |
614 | .StorageClass db ? |
618 | .NumAuxSymbols db ? |
615 | .NumAuxSymbols db ? |
619 | } |
616 | } |
620 | CSYM_SIZE equ 18 |
617 | CSYM_SIZE equ 18 |
621 | 618 | ||
622 | struc IOCTL |
619 | struc IOCTL |
623 | { .handle dd ? |
620 | { .handle dd ? |
624 | .io_code dd ? |
621 | .io_code dd ? |
625 | .input dd ? |
622 | .input dd ? |
626 | .inp_size dd ? |
623 | .inp_size dd ? |
627 | .output dd ? |
624 | .output dd ? |
628 | .out_size dd ? |
625 | .out_size dd ? |
629 | } |
626 | } |
630 | 627 | ||
631 | virtual at 0 |
628 | virtual at 0 |
632 | IOCTL IOCTL |
629 | IOCTL IOCTL |
633 | end virtual |
630 | end virtual |
634 | 631 | ||
635 | ;virtual at 0 |
632 | ;virtual at 0 |
636 | ; LIB LIB |
633 | ; LIB LIB |
637 | ;end virtual |
634 | ;end virtual |
638 | 635 | ||
639 | virtual at 0 |
636 | virtual at 0 |
640 | SRV SRV |
637 | SRV SRV |
641 | end virtual |
638 | end virtual |
642 | 639 | ||
643 | virtual at 0 |
640 | virtual at 0 |
644 | CFH COFF_HEADER |
641 | CFH COFF_HEADER |
645 | end virtual |
642 | end virtual |
646 | 643 | ||
647 | virtual at 0 |
644 | virtual at 0 |
648 | CFS COFF_SECTION |
645 | CFS COFF_SECTION |
649 | end virtual |
646 | end virtual |
650 | 647 | ||
651 | virtual at 0 |
648 | virtual at 0 |
652 | CRELOC COFF_RELOC |
649 | CRELOC COFF_RELOC |
653 | end virtual |
650 | end virtual |
654 | 651 | ||
655 | virtual at 0 |
652 | virtual at 0 |
656 | CSYM COFF_SYM |
653 | CSYM COFF_SYM |
657 | end virtual |
654 | end virtual |