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| 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 2 | ;; ;; |
2 | ;; ;; |
| 3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
| 4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
| 5 | ;; ;; |
5 | ;; ;; |
| 6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 7 | 7 | ||
| 8 | format MS COFF |
8 | format MS COFF |
| 9 | 9 | ||
| 10 | include 'proc32.inc' |
10 | include 'proc32.inc' |
| 11 | include 'imports.inc' |
11 | include 'imports.inc' |
| - | 12 | ||
| - | 13 | API_VERSION equ 0 |
|
| - | 14 | UART_VERSION equ API_VERSION |
|
| 12 | 15 | ||
| 13 | PG_SW equ 0x003 |
16 | PG_SW equ 0x003 |
| 14 | page_tabs equ 0xFDC00000 ;hack |
17 | page_tabs equ 0xFDC00000 ;hack |
| 15 | 18 | ||
| 16 | OS_BASE equ 0x80000000 |
19 | OS_BASE equ 0x80000000 |
| 17 | SLOT_BASE equ (OS_BASE+0x0080000) |
20 | SLOT_BASE equ (OS_BASE+0x0080000) |
| 18 | TASK_COUNT equ (OS_BASE+0x0003004) |
21 | TASK_COUNT equ (OS_BASE+0x0003004) |
| 19 | CURRENT_TASK equ (OS_BASE+0x0003000) |
22 | CURRENT_TASK equ (OS_BASE+0x0003000) |
| 20 | 23 | ||
| 21 | 24 | ||
| 22 | struc APPOBJ ;common object header |
25 | struc APPOBJ ;common object header |
| 23 | { |
26 | { |
| 24 | .magic dd ? ; |
27 | .magic dd ? ; |
| 25 | .destroy dd ? ;internal destructor |
28 | .destroy dd ? ;internal destructor |
| 26 | .fd dd ? ;next object in list |
29 | .fd dd ? ;next object in list |
| 27 | .bk dd ? ;prev object in list |
30 | .bk dd ? ;prev object in list |
| 28 | .pid dd ? ;owner id |
31 | .pid dd ? ;owner id |
| 29 | }; |
32 | }; |
| 30 | 33 | ||
| 31 | virtual at 0 |
34 | virtual at 0 |
| 32 | APPOBJ APPOBJ |
35 | APPOBJ APPOBJ |
| 33 | end virtual |
36 | end virtual |
| 34 | 37 | ||
| 35 | struc IOCTL |
38 | struc IOCTL |
| 36 | { .handle dd ? |
39 | { .handle dd ? |
| 37 | .io_code dd ? |
40 | .io_code dd ? |
| 38 | .input dd ? |
41 | .input dd ? |
| 39 | .inp_size dd ? |
42 | .inp_size dd ? |
| 40 | .output dd ? |
43 | .output dd ? |
| 41 | .out_size dd ? |
44 | .out_size dd ? |
| 42 | } |
45 | } |
| 43 | 46 | ||
| 44 | virtual at 0 |
47 | virtual at 0 |
| 45 | IOCTL IOCTL |
48 | IOCTL IOCTL |
| 46 | end virtual |
49 | end virtual |
| 47 | 50 | ||
| 48 | DEBUG equ 1 |
51 | DEBUG equ 1 |
| 49 | 52 | ||
| 50 | DRV_ENTRY equ 1 |
53 | DRV_ENTRY equ 1 |
| 51 | DRV_EXIT equ -1 |
54 | DRV_EXIT equ -1 |
| 52 | 55 | ||
| 53 | THR_REG equ 0; x3f8 ;transtitter/reciever |
56 | THR_REG equ 0; x3f8 ;transtitter/reciever |
| 54 | IER_REG equ 1; x3f9 ;interrupt enable |
57 | IER_REG equ 1; x3f9 ;interrupt enable |
| 55 | IIR_REG equ 2; x3fA ;interrupt info |
58 | IIR_REG equ 2; x3fA ;interrupt info |
| 56 | LCR_REG equ 3; x3FB ;line control |
59 | LCR_REG equ 3; x3FB ;line control |
| 57 | MCR_REG equ 4; x3FC ;modem control |
60 | MCR_REG equ 4; x3FC ;modem control |
| 58 | LSR_REG equ 5; x3FD ;line status |
61 | LSR_REG equ 5; x3FD ;line status |
| 59 | MSR_REG equ 6; x3FE ;modem status |
62 | MSR_REG equ 6; x3FE ;modem status |
| 60 | 63 | ||
| 61 | LCR_5BIT equ 0x00 |
64 | LCR_5BIT equ 0x00 |
| 62 | LCR_6BIT equ 0x01 |
65 | LCR_6BIT equ 0x01 |
| 63 | LCR_7BIT equ 0x02 |
66 | LCR_7BIT equ 0x02 |
| 64 | LCR_8BIT equ 0x03 |
67 | LCR_8BIT equ 0x03 |
| 65 | LCR_STOP_1 equ 0x00 |
68 | LCR_STOP_1 equ 0x00 |
| 66 | LCR_STOP_2 equ 0x04 |
69 | LCR_STOP_2 equ 0x04 |
| 67 | LCR_PARITY equ 0x08 |
70 | LCR_PARITY equ 0x08 |
| 68 | LCR_EVEN equ 0x10 |
71 | LCR_EVEN equ 0x10 |
| 69 | LCR_STICK equ 0x20 |
72 | LCR_STICK equ 0x20 |
| 70 | LCR_BREAK equ 0x40 |
73 | LCR_BREAK equ 0x40 |
| 71 | LCR_DLAB equ 0x80 |
74 | LCR_DLAB equ 0x80 |
| 72 | 75 | ||
| 73 | LSR_DR equ 0x01 ;data ready |
76 | LSR_DR equ 0x01 ;data ready |
| 74 | LSR_OE equ 0x02 ;overrun error |
77 | LSR_OE equ 0x02 ;overrun error |
| 75 | LSR_PE equ 0x04 ;parity error |
78 | LSR_PE equ 0x04 ;parity error |
| 76 | LSR_FE equ 0x08 ;framing error |
79 | LSR_FE equ 0x08 ;framing error |
| 77 | LSR_BI equ 0x10 ;break interrupt |
80 | LSR_BI equ 0x10 ;break interrupt |
| 78 | LSR_THRE equ 0x20 ;transmitter holding empty |
81 | LSR_THRE equ 0x20 ;transmitter holding empty |
| 79 | LSR_TEMT equ 0x40 ;transmitter empty |
82 | LSR_TEMT equ 0x40 ;transmitter empty |
| 80 | LSR_FER equ 0x80 ;FIFO error |
83 | LSR_FER equ 0x80 ;FIFO error |
| 81 | 84 | ||
| 82 | FCR_EFIFO equ 0x01 ;enable FIFO |
85 | FCR_EFIFO equ 0x01 ;enable FIFO |
| 83 | FCR_CRB equ 0x02 ;clear reciever FIFO |
86 | FCR_CRB equ 0x02 ;clear reciever FIFO |
| 84 | FCR_CXMIT equ 0x04 ;clear transmitter FIFO |
87 | FCR_CXMIT equ 0x04 ;clear transmitter FIFO |
| 85 | FCR_RDY equ 0x08 ;set RXRDY and TXRDY pins |
88 | FCR_RDY equ 0x08 ;set RXRDY and TXRDY pins |
| 86 | FCR_FIFO_1 equ 0x00 ;1 byte trigger |
89 | FCR_FIFO_1 equ 0x00 ;1 byte trigger |
| 87 | FCR_FIFO_4 equ 0x40 ;4 bytes trigger |
90 | FCR_FIFO_4 equ 0x40 ;4 bytes trigger |
| 88 | FCR_FIFO_8 equ 0x80 ;8 bytes trigger |
91 | FCR_FIFO_8 equ 0x80 ;8 bytes trigger |
| 89 | FCR_FIFO_14 equ 0xC0 ;14 bytes trigger |
92 | FCR_FIFO_14 equ 0xC0 ;14 bytes trigger |
| 90 | 93 | ||
| 91 | IIR_INTR equ 0x01 ;1= no interrupts |
94 | IIR_INTR equ 0x01 ;1= no interrupts |
| 92 | 95 | ||
| 93 | IER_RDAI equ 0x01 ;reciever data interrupt |
96 | IER_RDAI equ 0x01 ;reciever data interrupt |
| 94 | IER_THRI equ 0x02 ;transmitter empty interrupt |
97 | IER_THRI equ 0x02 ;transmitter empty interrupt |
| 95 | IER_LSI equ 0x04 ;line status interrupt |
98 | IER_LSI equ 0x04 ;line status interrupt |
| 96 | IER_MSI equ 0x08 ;modem status interrupt |
99 | IER_MSI equ 0x08 ;modem status interrupt |
| 97 | 100 | ||
| 98 | MCR_DTR equ 0x01 ;0-> DTR=1, 1-> DTR=0 |
101 | MCR_DTR equ 0x01 ;0-> DTR=1, 1-> DTR=0 |
| 99 | MCR_RTS equ 0x02 ;0-> RTS=1, 1-> RTS=0 |
102 | MCR_RTS equ 0x02 ;0-> RTS=1, 1-> RTS=0 |
| 100 | MCR_OUT_1 equ 0x04 ;0-> OUT1=1, 1-> OUT1=0 |
103 | MCR_OUT_1 equ 0x04 ;0-> OUT1=1, 1-> OUT1=0 |
| 101 | MCR_OUT_2 equ 0x08 ;0-> OUT2=1, 1-> OUT2=0; enable intr |
104 | MCR_OUT_2 equ 0x08 ;0-> OUT2=1, 1-> OUT2=0; enable intr |
| 102 | MCR_LOOP equ 0x10 ;lopback mode |
105 | MCR_LOOP equ 0x10 ;lopback mode |
| 103 | 106 | ||
| 104 | MSR_DCTS equ 0x01 ;delta clear to send |
107 | MSR_DCTS equ 0x01 ;delta clear to send |
| 105 | MSR_DDSR equ 0x02 ;delta data set redy |
108 | MSR_DDSR equ 0x02 ;delta data set redy |
| 106 | MSR_TERI equ 0x04 ;trailinh edge of ring |
109 | MSR_TERI equ 0x04 ;trailinh edge of ring |
| 107 | MSR_DDCD equ 0x08 ;delta carrier detect |
110 | MSR_DDCD equ 0x08 ;delta carrier detect |
| 108 | 111 | ||
| 109 | 112 | ||
| 110 | RATE_50 equ 0 |
113 | RATE_50 equ 0 |
| 111 | RATE_75 equ 1 |
114 | RATE_75 equ 1 |
| 112 | RATE_110 equ 2 |
115 | RATE_110 equ 2 |
| 113 | RATE_134 equ 3 |
116 | RATE_134 equ 3 |
| 114 | RATE_150 equ 4 |
117 | RATE_150 equ 4 |
| 115 | RATE_300 equ 5 |
118 | RATE_300 equ 5 |
| 116 | RATE_600 equ 6 |
119 | RATE_600 equ 6 |
| 117 | RATE_1200 equ 7 |
120 | RATE_1200 equ 7 |
| 118 | RATE_1800 equ 8 |
121 | RATE_1800 equ 8 |
| 119 | RATE_2000 equ 9 |
122 | RATE_2000 equ 9 |
| 120 | RATE_2400 equ 10 |
123 | RATE_2400 equ 10 |
| 121 | RATE_3600 equ 11 |
124 | RATE_3600 equ 11 |
| 122 | RATE_4800 equ 12 |
125 | RATE_4800 equ 12 |
| 123 | RATE_7200 equ 13 |
126 | RATE_7200 equ 13 |
| 124 | RATE_9600 equ 14 |
127 | RATE_9600 equ 14 |
| 125 | RATE_19200 equ 15 |
128 | RATE_19200 equ 15 |
| 126 | RATE_38400 equ 16 |
129 | RATE_38400 equ 16 |
| 127 | RATE_57600 equ 17 |
130 | RATE_57600 equ 17 |
| 128 | RATE_115200 equ 18 |
131 | RATE_115200 equ 18 |
| 129 | 132 | ||
| 130 | COM_1 equ 1 |
133 | COM_1 equ 1 |
| 131 | COM_2 equ 2 |
134 | COM_2 equ 2 |
| 132 | COM_3 equ 3 |
135 | COM_3 equ 3 |
| 133 | COM_4 equ 4 |
136 | COM_4 equ 4 |
| 134 | COM_MAX equ 2 ;only two port supported |
137 | COM_MAX equ 2 ;only two port supported |
| 135 | 138 | ||
| 136 | COM_1_BASE equ 0x3F8 |
139 | COM_1_BASE equ 0x3F8 |
| 137 | COM_2_BASE equ 0x2F8 |
140 | COM_2_BASE equ 0x2F8 |
| 138 | 141 | ||
| 139 | COM_1_IRQ equ 4 |
142 | COM_1_IRQ equ 4 |
| 140 | COM_2_IRQ equ 3 |
143 | COM_2_IRQ equ 3 |
| 141 | 144 | ||
| 142 | UART_CLOSED equ 0 |
145 | UART_CLOSED equ 0 |
| 143 | UART_TRANSMIT equ 1 |
146 | UART_TRANSMIT equ 1 |
| 144 | UART_STOP equ 2 |
147 | UART_STOP equ 2 |
| 145 | 148 | ||
| 146 | struc UART |
149 | struc UART |
| 147 | { |
150 | { |
| 148 | .lock dd ? |
151 | .lock dd ? |
| 149 | .base dd ? |
152 | .base dd ? |
| 150 | .lcr_reg dd ? |
153 | .lcr_reg dd ? |
| 151 | .mcr_reg dd ? |
154 | .mcr_reg dd ? |
| 152 | .rate dd ? |
155 | .rate dd ? |
| 153 | .mode dd ? |
156 | .mode dd ? |
| 154 | .state dd ? |
157 | .state dd ? |
| 155 | 158 | ||
| 156 | .rcvr_buff dd ? |
159 | .rcvr_buff dd ? |
| 157 | .rcvr_rp dd ? |
160 | .rcvr_rp dd ? |
| 158 | .rcvr_wp dd ? |
161 | .rcvr_wp dd ? |
| 159 | .rcvr_count dd ? |
162 | .rcvr_count dd ? |
| 160 | .rcvr_top dd ? |
163 | .rcvr_top dd ? |
| 161 | 164 | ||
| 162 | .xmit_buff dd ? |
165 | .xmit_buff dd ? |
| 163 | .xmit_rp dd ? |
166 | .xmit_rp dd ? |
| 164 | .xmit_wp dd ? |
167 | .xmit_wp dd ? |
| 165 | .xmit_count dd ? |
168 | .xmit_count dd ? |
| 166 | .xmit_free dd ? |
169 | .xmit_free dd ? |
| 167 | .xmit_top dd ? |
170 | .xmit_top dd ? |
| 168 | } |
171 | } |
| 169 | virtual at 0 |
172 | virtual at 0 |
| 170 | UART UART |
173 | UART UART |
| 171 | end virtual |
174 | end virtual |
| 172 | 175 | ||
| 173 | UART_SIZE equ 18*4 |
176 | UART_SIZE equ 18*4 |
| 174 | 177 | ||
| 175 | struc CONNECTION |
178 | struc CONNECTION |
| 176 | { |
179 | { |
| 177 | .magic dd ? ;'CNCT' |
180 | .magic dd ? ;'CNCT' |
| 178 | .destroy dd ? ;internal destructor |
181 | .destroy dd ? ;internal destructor |
| 179 | .fd dd ? ;next object in list |
182 | .fd dd ? ;next object in list |
| 180 | .bk dd ? ;prev object in list |
183 | .bk dd ? ;prev object in list |
| 181 | .pid dd ? ;owner id |
184 | .pid dd ? ;owner id |
| 182 | 185 | ||
| 183 | .id dd ? ;reserved |
186 | .id dd ? ;reserved |
| 184 | .uart dd ? ;uart pointer |
187 | .uart dd ? ;uart pointer |
| 185 | } |
188 | } |
| 186 | 189 | ||
| 187 | virtual at 0 |
190 | virtual at 0 |
| 188 | CONNECTION CONNECTION |
191 | CONNECTION CONNECTION |
| 189 | end virtual |
192 | end virtual |
| 190 | 193 | ||
| 191 | CONNECTION_SIZE equ 7*4 |
194 | CONNECTION_SIZE equ 7*4 |
| 192 | - | ||
| 193 | UART_VERSION equ 0x12345678 ;debug |
- | |
| 194 | 195 | ||
| 195 | public START |
196 | public START |
| 196 | public service_proc |
197 | public service_proc |
| 197 | public version |
198 | public version |
| 198 | 199 | ||
| 199 | section '.flat' code readable align 16 |
200 | section '.flat' code readable align 16 |
| 200 | 201 | ||
| 201 | proc START stdcall, state:dword |
202 | proc START stdcall, state:dword |
| 202 | 203 | ||
| 203 | cmp [state], 1 |
204 | cmp [state], 1 |
| 204 | jne .stop |
205 | jne .stop |
| 205 | 206 | ||
| 206 | mov eax, UART_SIZE |
207 | mov eax, UART_SIZE |
| 207 | call Kmalloc |
208 | call Kmalloc |
| 208 | test eax, eax |
209 | test eax, eax |
| 209 | jz .fail |
210 | jz .fail |
| 210 | 211 | ||
| 211 | mov [com1], eax |
212 | mov [com1], eax |
| 212 | mov edi, eax |
213 | mov edi, eax |
| 213 | mov ecx, UART_SIZE/4 |
214 | mov ecx, UART_SIZE/4 |
| 214 | xor eax, eax |
215 | xor eax, eax |
| 215 | cld |
216 | cld |
| 216 | rep stosd |
217 | rep stosd |
| 217 | 218 | ||
| 218 | mov eax, [com1] |
219 | mov eax, [com1] |
| 219 | mov [eax+UART.base], COM_1_BASE |
220 | mov [eax+UART.base], COM_1_BASE |
| 220 | 221 | ||
| 221 | stdcall AllocKernelSpace, 32768 |
222 | stdcall AllocKernelSpace, 32768 |
| 222 | 223 | ||
| 223 | mov edi, [com1] |
224 | mov edi, [com1] |
| 224 | mov edx, eax |
225 | mov edx, eax |
| 225 | 226 | ||
| 226 | mov [edi+UART.rcvr_buff], eax |
227 | mov [edi+UART.rcvr_buff], eax |
| 227 | add eax, 8192 |
228 | add eax, 8192 |
| 228 | mov [edi+UART.rcvr_top], eax |
229 | mov [edi+UART.rcvr_top], eax |
| 229 | add eax, 8192 |
230 | add eax, 8192 |
| 230 | mov [edi+UART.xmit_buff], eax |
231 | mov [edi+UART.xmit_buff], eax |
| 231 | add eax, 8192 |
232 | add eax, 8192 |
| 232 | mov [edi+UART.xmit_top], eax |
233 | mov [edi+UART.xmit_top], eax |
| 233 | 234 | ||
| 234 | call AllocPage |
235 | call AllocPage |
| 235 | test eax, eax |
236 | test eax, eax |
| 236 | jz .fail |
237 | jz .fail |
| 237 | 238 | ||
| 238 | shr edx, 12 |
239 | shr edx, 12 |
| 239 | or eax, PG_SW |
240 | or eax, PG_SW |
| 240 | mov [page_tabs+edx*4], eax |
241 | mov [page_tabs+edx*4], eax |
| 241 | mov [page_tabs+edx*4+8], eax |
242 | mov [page_tabs+edx*4+8], eax |
| 242 | 243 | ||
| 243 | call AllocPage |
244 | call AllocPage |
| 244 | test eax, eax |
245 | test eax, eax |
| 245 | jz .fail |
246 | jz .fail |
| 246 | 247 | ||
| 247 | or eax, PG_SW |
248 | or eax, PG_SW |
| 248 | mov [page_tabs+edx*4+4], eax |
249 | mov [page_tabs+edx*4+4], eax |
| 249 | mov [page_tabs+edx*4+12], eax |
250 | mov [page_tabs+edx*4+12], eax |
| 250 | 251 | ||
| 251 | call AllocPage |
252 | call AllocPage |
| 252 | test eax, eax |
253 | test eax, eax |
| 253 | jz .fail |
254 | jz .fail |
| 254 | 255 | ||
| 255 | or eax, PG_SW |
256 | or eax, PG_SW |
| 256 | mov [page_tabs+edx*4+16], eax |
257 | mov [page_tabs+edx*4+16], eax |
| 257 | mov [page_tabs+edx*4+24], eax |
258 | mov [page_tabs+edx*4+24], eax |
| 258 | 259 | ||
| 259 | call AllocPage |
260 | call AllocPage |
| 260 | test eax, eax |
261 | test eax, eax |
| 261 | jz .fail |
262 | jz .fail |
| 262 | 263 | ||
| 263 | or eax, PG_SW |
264 | or eax, PG_SW |
| 264 | mov [page_tabs+edx*4+20], eax |
265 | mov [page_tabs+edx*4+20], eax |
| 265 | mov [page_tabs+edx*4+28], eax |
266 | mov [page_tabs+edx*4+28], eax |
| 266 | 267 | ||
| 267 | mov eax, [edi+UART.rcvr_buff] |
268 | mov eax, [edi+UART.rcvr_buff] |
| 268 | invlpg [eax] |
269 | invlpg [eax] |
| 269 | invlpg [eax+0x1000] |
270 | invlpg [eax+0x1000] |
| 270 | invlpg [eax+0x2000] |
271 | invlpg [eax+0x2000] |
| 271 | invlpg [eax+0x3000] |
272 | invlpg [eax+0x3000] |
| 272 | invlpg [eax+0x4000] |
273 | invlpg [eax+0x4000] |
| 273 | invlpg [eax+0x5000] |
274 | invlpg [eax+0x5000] |
| 274 | invlpg [eax+0x6000] |
275 | invlpg [eax+0x6000] |
| 275 | invlpg [eax+0x7000] |
276 | invlpg [eax+0x7000] |
| 276 | 277 | ||
| 277 | mov eax, edi |
278 | mov eax, edi |
| 278 | call uart_reset.internal ;eax= uart |
279 | call uart_reset.internal ;eax= uart |
| 279 | 280 | ||
| 280 | stdcall AttachIntHandler, COM_1_IRQ, com_1_isr |
281 | stdcall AttachIntHandler, COM_1_IRQ, com_1_isr |
| 281 | stdcall RegService, sz_uart_srv, service_proc |
282 | stdcall RegService, sz_uart_srv, service_proc |
| 282 | ret |
283 | ret |
| 283 | .fail: |
284 | .fail: |
| 284 | .stop: |
285 | .stop: |
| 285 | xor eax, eax |
286 | xor eax, eax |
| 286 | ret |
287 | ret |
| 287 | endp |
288 | endp |
| 288 | 289 | ||
| 289 | 290 | ||
| 290 | handle equ IOCTL.handle |
291 | handle equ IOCTL.handle |
| 291 | io_code equ IOCTL.io_code |
292 | io_code equ IOCTL.io_code |
| 292 | input equ IOCTL.input |
293 | input equ IOCTL.input |
| 293 | inp_size equ IOCTL.inp_size |
294 | inp_size equ IOCTL.inp_size |
| 294 | output equ IOCTL.output |
295 | output equ IOCTL.output |
| 295 | out_size equ IOCTL.out_size |
296 | out_size equ IOCTL.out_size |
| 296 | 297 | ||
| 297 | SRV_GETVERSION equ 0 |
298 | SRV_GETVERSION equ 0 |
| 298 | PORT_OPEN equ 1 |
299 | PORT_OPEN equ 1 |
| 299 | PORT_CLOSE equ 2 |
300 | PORT_CLOSE equ 2 |
| 300 | PORT_RESET equ 3 |
301 | PORT_RESET equ 3 |
| 301 | PORT_SETMODE equ 4 |
302 | PORT_SETMODE equ 4 |
| 302 | PORT_GETMODE equ 5 |
303 | PORT_GETMODE equ 5 |
| 303 | PORT_SETMCR equ 6 |
304 | PORT_SETMCR equ 6 |
| 304 | PORT_GETMCR equ 7 |
305 | PORT_GETMCR equ 7 |
| 305 | PORT_READ equ 8 |
306 | PORT_READ equ 8 |
| 306 | PORT_WRITE equ 9 |
307 | PORT_WRITE equ 9 |
| 307 | 308 | ||
| 308 | align 4 |
309 | align 4 |
| 309 | proc service_proc stdcall, ioctl:dword |
310 | proc service_proc stdcall, ioctl:dword |
| 310 | 311 | ||
| 311 | mov ebx, [ioctl] |
312 | mov ebx, [ioctl] |
| 312 | mov eax, [ebx+io_code] |
313 | mov eax, [ebx+io_code] |
| 313 | cmp eax, PORT_WRITE |
314 | cmp eax, PORT_WRITE |
| 314 | ja .fail |
315 | ja .fail |
| 315 | 316 | ||
| 316 | cmp eax, SRV_GETVERSION |
317 | cmp eax, SRV_GETVERSION |
| 317 | jne @F |
318 | jne @F |
| 318 | 319 | ||
| 319 | mov eax, [ebx+output] |
320 | mov eax, [ebx+output] |
| - | 321 | cmp [ebx+out_size], 4 |
|
| - | 322 | jne .fail |
|
| 320 | mov [eax], dword UART_VERSION |
323 | mov [eax], dword UART_VERSION |
| 321 | xor eax, eax |
324 | xor eax, eax |
| 322 | ret |
325 | ret |
| 323 | @@: |
326 | @@: |
| 324 | cmp eax, PORT_OPEN |
327 | cmp eax, PORT_OPEN |
| 325 | jne @F |
328 | jne @F |
| - | 329 | ||
| - | 330 | cmp [ebx+out_size], 4 |
|
| - | 331 | jne .fail |
|
| 326 | 332 | ||
| 327 | mov ebx, [ebx+input] |
333 | mov ebx, [ebx+input] |
| 328 | mov eax, [ebx] |
334 | mov eax, [ebx] |
| 329 | call uart_open |
335 | call uart_open |
| 330 | mov ebx, [ioctl] |
336 | mov ebx, [ioctl] |
| 331 | mov ebx, [ebx+output] |
337 | mov ebx, [ebx+output] |
| 332 | mov [ebx], ecx |
338 | mov [ebx], ecx |
| 333 | ret |
339 | ret |
| 334 | @@: |
340 | @@: |
| 335 | mov esi, [ebx+input] ;input buffer |
341 | mov esi, [ebx+input] ;input buffer |
| 336 | mov edi, [ebx+output] |
342 | mov edi, [ebx+output] |
| 337 | call [uart_func+eax*4] |
343 | call [uart_func+eax*4] |
| 338 | ret |
344 | ret |
| 339 | .fail: |
345 | .fail: |
| 340 | or eax, -1 |
346 | or eax, -1 |
| 341 | ret |
347 | ret |
| 342 | 348 | ||
| 343 | endp |
349 | endp |
| 344 | 350 | ||
| 345 | restore handle |
351 | restore handle |
| 346 | restore io_code |
352 | restore io_code |
| 347 | restore input |
353 | restore input |
| 348 | restore inp_size |
354 | restore inp_size |
| 349 | restore output |
355 | restore output |
| 350 | restore out_size |
356 | restore out_size |
| 351 | 357 | ||
| 352 | 358 | ||
| 353 | ; param |
359 | ; param |
| 354 | ; esi= input buffer |
360 | ; esi= input buffer |
| 355 | ; +0 connection |
361 | ; +0 connection |
| 356 | ; |
362 | ; |
| 357 | ; retval |
363 | ; retval |
| 358 | ; eax= error code |
364 | ; eax= error code |
| 359 | 365 | ||
| 360 | align 4 |
366 | align 4 |
| 361 | uart_reset: |
367 | uart_reset: |
| 362 | mov eax, [esi] |
368 | mov eax, [esi] |
| 363 | cmp [eax+APPOBJ.magic], 'CNCT' |
369 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 364 | jne .fail |
370 | jne .fail |
| 365 | 371 | ||
| 366 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
372 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 367 | jne .fail |
373 | jne .fail |
| 368 | 374 | ||
| 369 | mov eax, [eax+CONNECTION.uart] |
375 | mov eax, [eax+CONNECTION.uart] |
| 370 | test eax, eax |
376 | test eax, eax |
| 371 | jz .fail |
377 | jz .fail |
| 372 | 378 | ||
| 373 | ; set mode 2400 bod 8-bit |
379 | ; set mode 2400 bod 8-bit |
| 374 | ; disable DTR & RTS |
380 | ; disable DTR & RTS |
| 375 | ; clear FIFO |
381 | ; clear FIFO |
| 376 | ; clear pending interrupts |
382 | ; clear pending interrupts |
| 377 | ; |
383 | ; |
| 378 | ; param |
384 | ; param |
| 379 | ; eax= uart |
385 | ; eax= uart |
| 380 | 386 | ||
| 381 | align 4 |
387 | align 4 |
| 382 | .internal: |
388 | .internal: |
| 383 | mov esi, eax |
389 | mov esi, eax |
| 384 | mov [eax+UART.state], UART_CLOSED |
390 | mov [eax+UART.state], UART_CLOSED |
| 385 | mov edx, [eax+UART.base] |
391 | mov edx, [eax+UART.base] |
| 386 | add edx, MCR_REG |
392 | add edx, MCR_REG |
| 387 | xor eax, eax |
393 | xor eax, eax |
| 388 | out dx, al ;clear DTR & RTS |
394 | out dx, al ;clear DTR & RTS |
| 389 | 395 | ||
| 390 | mov eax, esi |
396 | mov eax, esi |
| 391 | mov ebx, RATE_2400 |
397 | mov ebx, RATE_2400 |
| 392 | mov ecx, LCR_8BIT+LCR_STOP_1 |
398 | mov ecx, LCR_8BIT+LCR_STOP_1 |
| 393 | call uart_set_mode.internal |
399 | call uart_set_mode.internal |
| 394 | 400 | ||
| 395 | mov edx, [esi+UART.base] |
401 | mov edx, [esi+UART.base] |
| 396 | add edx, IIR_REG |
402 | add edx, IIR_REG |
| 397 | mov eax,FCR_EFIFO+FCR_CRB+FCR_CXMIT+FCR_FIFO_14 |
403 | mov eax,FCR_EFIFO+FCR_CRB+FCR_CXMIT+FCR_FIFO_14 |
| 398 | out dx, al |
404 | out dx, al |
| 399 | .clear_RB: |
405 | .clear_RB: |
| 400 | mov edx, [esi+UART.base] |
406 | mov edx, [esi+UART.base] |
| 401 | add edx, LSR_REG |
407 | add edx, LSR_REG |
| 402 | in al, dx |
408 | in al, dx |
| 403 | test eax, LSR_DR |
409 | test eax, LSR_DR |
| 404 | jz @F |
410 | jz @F |
| 405 | 411 | ||
| 406 | mov edx, [esi+UART.base] |
412 | mov edx, [esi+UART.base] |
| 407 | in al, dx |
413 | in al, dx |
| 408 | jmp .clear_RB |
414 | jmp .clear_RB |
| 409 | @@: |
415 | @@: |
| 410 | mov edx, [esi+UART.base] |
416 | mov edx, [esi+UART.base] |
| 411 | add edx, IER_REG |
417 | add edx, IER_REG |
| 412 | mov eax,IER_RDAI+IER_THRI+IER_LSI |
418 | mov eax,IER_RDAI+IER_THRI+IER_LSI |
| 413 | out dx, al |
419 | out dx, al |
| 414 | .clear_IIR: |
420 | .clear_IIR: |
| 415 | mov edx, [esi+UART.base] |
421 | mov edx, [esi+UART.base] |
| 416 | add edx, IIR_REG |
422 | add edx, IIR_REG |
| 417 | in al, dx |
423 | in al, dx |
| 418 | test al, IIR_INTR |
424 | test al, IIR_INTR |
| 419 | jnz .done |
425 | jnz .done |
| 420 | 426 | ||
| 421 | shr eax, 1 |
427 | shr eax, 1 |
| 422 | and eax, 3 |
428 | and eax, 3 |
| 423 | jnz @F |
429 | jnz @F |
| 424 | 430 | ||
| 425 | mov edx, [esi+UART.base] |
431 | mov edx, [esi+UART.base] |
| 426 | add edx, MSR_REG |
432 | add edx, MSR_REG |
| 427 | in al, dx |
433 | in al, dx |
| 428 | jmp .clear_IIR |
434 | jmp .clear_IIR |
| 429 | @@: |
435 | @@: |
| 430 | cmp eax, 1 |
436 | cmp eax, 1 |
| 431 | je .clear_IIR |
437 | je .clear_IIR |
| 432 | 438 | ||
| 433 | cmp eax, 2 |
439 | cmp eax, 2 |
| 434 | jne @F |
440 | jne @F |
| 435 | 441 | ||
| 436 | mov edx, [esi+UART.base] |
442 | mov edx, [esi+UART.base] |
| 437 | in al, dx |
443 | in al, dx |
| 438 | jmp .clear_IIR |
444 | jmp .clear_IIR |
| 439 | @@: |
445 | @@: |
| 440 | mov edx, [esi+UART.base] |
446 | mov edx, [esi+UART.base] |
| 441 | add edx, LSR_REG |
447 | add edx, LSR_REG |
| 442 | in al, dx |
448 | in al, dx |
| 443 | jmp .clear_IIR |
449 | jmp .clear_IIR |
| 444 | .done: |
450 | .done: |
| 445 | mov edi, [esi+UART.rcvr_buff] |
451 | mov edi, [esi+UART.rcvr_buff] |
| 446 | mov ecx, 8192/4 |
452 | mov ecx, 8192/4 |
| 447 | xor eax, eax |
453 | xor eax, eax |
| 448 | 454 | ||
| 449 | mov [esi+UART.rcvr_rp], edi |
455 | mov [esi+UART.rcvr_rp], edi |
| 450 | mov [esi+UART.rcvr_wp], edi |
456 | mov [esi+UART.rcvr_wp], edi |
| 451 | mov [esi+UART.rcvr_count], eax |
457 | mov [esi+UART.rcvr_count], eax |
| 452 | 458 | ||
| 453 | cld |
459 | cld |
| 454 | rep stosd |
460 | rep stosd |
| 455 | 461 | ||
| 456 | mov edi, [esi+UART.xmit_buff] |
462 | mov edi, [esi+UART.xmit_buff] |
| 457 | mov ecx, 8192/4 |
463 | mov ecx, 8192/4 |
| 458 | 464 | ||
| 459 | mov [esi+UART.xmit_rp], edi |
465 | mov [esi+UART.xmit_rp], edi |
| 460 | mov [esi+UART.xmit_wp], edi |
466 | mov [esi+UART.xmit_wp], edi |
| 461 | mov [esi+UART.xmit_count], eax |
467 | mov [esi+UART.xmit_count], eax |
| 462 | mov [esi+UART.xmit_free], 8192 |
468 | mov [esi+UART.xmit_free], 8192 |
| 463 | 469 | ||
| 464 | rep stosd |
470 | rep stosd |
| 465 | ret ;eax= 0 |
471 | ret ;eax= 0 |
| 466 | .fail: |
472 | .fail: |
| 467 | or eax, -1 |
473 | or eax, -1 |
| 468 | ret |
474 | ret |
| 469 | 475 | ||
| 470 | ; param |
476 | ; param |
| 471 | ; esi= input buffer |
477 | ; esi= input buffer |
| 472 | ; +0 connection |
478 | ; +0 connection |
| 473 | ; +4 rate |
479 | ; +4 rate |
| 474 | ; +8 mode |
480 | ; +8 mode |
| 475 | ; |
481 | ; |
| 476 | ; retval |
482 | ; retval |
| 477 | ; eax= error code |
483 | ; eax= error code |
| 478 | 484 | ||
| 479 | align 4 |
485 | align 4 |
| 480 | uart_set_mode: |
486 | uart_set_mode: |
| 481 | mov eax, [esi] |
487 | mov eax, [esi] |
| 482 | cmp [eax+APPOBJ.magic], 'CNCT' |
488 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 483 | jne .fail |
489 | jne .fail |
| 484 | 490 | ||
| 485 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
491 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 486 | jne .fail |
492 | jne .fail |
| 487 | 493 | ||
| 488 | mov eax, [eax+CONNECTION.uart] |
494 | mov eax, [eax+CONNECTION.uart] |
| 489 | test eax, eax |
495 | test eax, eax |
| 490 | jz .fail |
496 | jz .fail |
| 491 | 497 | ||
| 492 | mov ebx, [esi+4] |
498 | mov ebx, [esi+4] |
| 493 | mov ecx, [esi+8] |
499 | mov ecx, [esi+8] |
| 494 | 500 | ||
| 495 | ; param |
501 | ; param |
| 496 | ; eax= uart |
502 | ; eax= uart |
| 497 | ; ebx= baud rate |
503 | ; ebx= baud rate |
| 498 | ; ecx= mode |
504 | ; ecx= mode |
| 499 | 505 | ||
| 500 | align 4 |
506 | align 4 |
| 501 | .internal: |
507 | .internal: |
| 502 | cmp ebx, RATE_115200 |
508 | cmp ebx, RATE_115200 |
| 503 | ja .fail |
509 | ja .fail |
| 504 | 510 | ||
| 505 | cmp ecx, LCR_BREAK |
511 | cmp ecx, LCR_BREAK |
| 506 | jae .fail |
512 | jae .fail |
| 507 | 513 | ||
| 508 | mov [eax+UART.rate], ebx |
514 | mov [eax+UART.rate], ebx |
| 509 | mov [eax+UART.mode], ecx |
515 | mov [eax+UART.mode], ecx |
| 510 | 516 | ||
| 511 | mov esi, eax |
517 | mov esi, eax |
| 512 | mov bx, [divisor+ebx*2] |
518 | mov bx, [divisor+ebx*2] |
| 513 | 519 | ||
| 514 | mov edx, [esi+UART.base] |
520 | mov edx, [esi+UART.base] |
| 515 | push edx |
521 | push edx |
| 516 | add edx, LCR_REG |
522 | add edx, LCR_REG |
| 517 | in al, dx |
523 | in al, dx |
| 518 | or al, 0x80 |
524 | or al, 0x80 |
| 519 | out dx, al |
525 | out dx, al |
| 520 | 526 | ||
| 521 | pop edx |
527 | pop edx |
| 522 | mov al, bl |
528 | mov al, bl |
| 523 | out dx, al |
529 | out dx, al |
| 524 | 530 | ||
| 525 | inc dx |
531 | inc dx |
| 526 | mov al, bh |
532 | mov al, bh |
| 527 | out dx, al |
533 | out dx, al |
| 528 | 534 | ||
| 529 | add edx, LCR_REG-1 |
535 | add edx, LCR_REG-1 |
| 530 | mov eax, ecx |
536 | mov eax, ecx |
| 531 | out dx, al |
537 | out dx, al |
| 532 | xor eax, eax |
538 | xor eax, eax |
| 533 | ret |
539 | ret |
| 534 | .fail: |
540 | .fail: |
| 535 | or eax, -1 |
541 | or eax, -1 |
| 536 | ret |
542 | ret |
| 537 | 543 | ||
| 538 | ; param |
544 | ; param |
| 539 | ; esi= input buffer |
545 | ; esi= input buffer |
| 540 | ; +0 connection |
546 | ; +0 connection |
| 541 | ; +4 modem control reg valie |
547 | ; +4 modem control reg valie |
| 542 | ; |
548 | ; |
| 543 | ; retval |
549 | ; retval |
| 544 | ; eax= error code |
550 | ; eax= error code |
| 545 | 551 | ||
| 546 | align 4 |
552 | align 4 |
| 547 | uart_set_mcr: |
553 | uart_set_mcr: |
| 548 | 554 | ||
| 549 | mov eax, [esi] |
555 | mov eax, [esi] |
| 550 | cmp [eax+APPOBJ.magic], 'CNCT' |
556 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 551 | jne .fail |
557 | jne .fail |
| 552 | 558 | ||
| 553 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
559 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 554 | jne .fail |
560 | jne .fail |
| 555 | 561 | ||
| 556 | mov eax, [eax+CONNECTION.uart] |
562 | mov eax, [eax+CONNECTION.uart] |
| 557 | test eax, eax |
563 | test eax, eax |
| 558 | jz .fail |
564 | jz .fail |
| 559 | 565 | ||
| 560 | mov ebx, [esi+4] |
566 | mov ebx, [esi+4] |
| 561 | 567 | ||
| 562 | mov [eax+UART.mcr_reg], ebx |
568 | mov [eax+UART.mcr_reg], ebx |
| 563 | mov edx, [eax+UART.base] |
569 | mov edx, [eax+UART.base] |
| 564 | add edx, MCR_REG |
570 | add edx, MCR_REG |
| 565 | mov al, bl |
571 | mov al, bl |
| 566 | out dx, al |
572 | out dx, al |
| 567 | xor eax, eax |
573 | xor eax, eax |
| 568 | ret |
574 | ret |
| 569 | .fail: |
575 | .fail: |
| 570 | or eax, -1 |
576 | or eax, -1 |
| 571 | ret |
577 | ret |
| 572 | 578 | ||
| 573 | ; param |
579 | ; param |
| 574 | ; eax= port |
580 | ; eax= port |
| 575 | ; |
581 | ; |
| 576 | ; retval |
582 | ; retval |
| 577 | ; ecx= connection |
583 | ; ecx= connection |
| 578 | ; eax= error code |
584 | ; eax= error code |
| 579 | 585 | ||
| 580 | align 4 |
586 | align 4 |
| 581 | uart_open: |
587 | uart_open: |
| 582 | dec eax |
588 | dec eax |
| 583 | cmp eax, COM_MAX |
589 | cmp eax, COM_MAX |
| 584 | jae .fail |
590 | jae .fail |
| 585 | 591 | ||
| 586 | mov esi, [com1+eax*4] ;uart |
592 | mov esi, [com1+eax*4] ;uart |
| 587 | push esi |
593 | push esi |
| 588 | .do_wait: |
594 | .do_wait: |
| 589 | cmp dword [esi+UART.lock],0 |
595 | cmp dword [esi+UART.lock],0 |
| 590 | je .get_lock |
596 | je .get_lock |
| 591 | ; call change_task |
597 | ; call change_task |
| 592 | jmp .do_wait |
598 | jmp .do_wait |
| 593 | .get_lock: |
599 | .get_lock: |
| 594 | mov eax, 1 |
600 | mov eax, 1 |
| 595 | xchg eax, [esi+UART.lock] |
601 | xchg eax, [esi+UART.lock] |
| 596 | test eax, eax |
602 | test eax, eax |
| 597 | jnz .do_wait |
603 | jnz .do_wait |
| 598 | 604 | ||
| 599 | mov eax, esi ;uart |
605 | mov eax, esi ;uart |
| 600 | call uart_reset.internal |
606 | call uart_reset.internal |
| 601 | 607 | ||
| 602 | mov ebx, [CURRENT_TASK] |
608 | mov ebx, [CURRENT_TASK] |
| 603 | shl ebx, 5 |
609 | shl ebx, 5 |
| 604 | mov ebx, [CURRENT_TASK+ebx+4] |
610 | mov ebx, [CURRENT_TASK+ebx+4] |
| 605 | mov eax, CONNECTION_SIZE |
611 | mov eax, CONNECTION_SIZE |
| 606 | call CreateObject |
612 | call CreateObject |
| 607 | pop esi ;uart |
613 | pop esi ;uart |
| 608 | test eax, eax |
614 | test eax, eax |
| 609 | jz .fail |
615 | jz .fail |
| 610 | 616 | ||
| 611 | mov [eax+APPOBJ.magic], 'CNCT' |
617 | mov [eax+APPOBJ.magic], 'CNCT' |
| 612 | mov [eax+APPOBJ.destroy], uart_close.destroy |
618 | mov [eax+APPOBJ.destroy], uart_close.destroy |
| 613 | mov [eax+CONNECTION.uart], esi |
619 | mov [eax+CONNECTION.uart], esi |
| 614 | mov ecx, eax |
620 | mov ecx, eax |
| 615 | xor eax, eax |
621 | xor eax, eax |
| 616 | ret |
622 | ret |
| 617 | .fail: |
623 | .fail: |
| 618 | or eax, -1 |
624 | or eax, -1 |
| 619 | ret |
625 | ret |
| 620 | restore .uart |
626 | restore .uart |
| 621 | 627 | ||
| 622 | ; param |
628 | ; param |
| 623 | ; esi= input buffer |
629 | ; esi= input buffer |
| 624 | 630 | ||
| 625 | align 4 |
631 | align 4 |
| 626 | uart_close: |
632 | uart_close: |
| 627 | mov eax, [esi] |
633 | mov eax, [esi] |
| 628 | cmp [eax+APPOBJ.magic], 'CNCT' |
634 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 629 | jne .fail |
635 | jne .fail |
| 630 | 636 | ||
| 631 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
637 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 632 | jne .fail |
638 | jne .fail |
| 633 | .destroy: |
639 | .destroy: |
| 634 | push [eax+CONNECTION.uart] |
640 | push [eax+CONNECTION.uart] |
| 635 | call DestroyObject ;eax= object |
641 | call DestroyObject ;eax= object |
| 636 | pop eax ;eax= uart |
642 | pop eax ;eax= uart |
| 637 | test eax, eax |
643 | test eax, eax |
| 638 | jz .fail |
644 | jz .fail |
| 639 | 645 | ||
| 640 | mov [eax+UART.state], UART_CLOSED |
646 | mov [eax+UART.state], UART_CLOSED |
| 641 | mov [eax+UART.lock], 0 ;release port |
647 | mov [eax+UART.lock], 0 ;release port |
| 642 | xor eax, eax |
648 | xor eax, eax |
| 643 | ret |
649 | ret |
| 644 | .fail: |
650 | .fail: |
| 645 | or eax, -1 |
651 | or eax, -1 |
| 646 | ret |
652 | ret |
| 647 | 653 | ||
| 648 | 654 | ||
| 649 | ; param |
655 | ; param |
| 650 | ; eax= uart |
656 | ; eax= uart |
| 651 | ; ebx= baud rate |
657 | ; ebx= baud rate |
| 652 | 658 | ||
| 653 | align 4 |
659 | align 4 |
| 654 | set_rate: |
660 | set_rate: |
| 655 | cmp ebx, RATE_115200 |
661 | cmp ebx, RATE_115200 |
| 656 | ja .fail |
662 | ja .fail |
| 657 | 663 | ||
| 658 | mov [eax+UART.rate], ebx |
664 | mov [eax+UART.rate], ebx |
| 659 | mov bx, [divisor+ebx*2] |
665 | mov bx, [divisor+ebx*2] |
| 660 | 666 | ||
| 661 | mov edx, [eax+UART.base] |
667 | mov edx, [eax+UART.base] |
| 662 | add edx, LCR_REG |
668 | add edx, LCR_REG |
| 663 | in al, dx |
669 | in al, dx |
| 664 | push eax |
670 | push eax |
| 665 | or al, 0x80 |
671 | or al, 0x80 |
| 666 | out dx, al |
672 | out dx, al |
| 667 | 673 | ||
| 668 | sub edx, LCR_REG |
674 | sub edx, LCR_REG |
| 669 | mov al, bl |
675 | mov al, bl |
| 670 | out dx, al |
676 | out dx, al |
| 671 | 677 | ||
| 672 | inc edx |
678 | inc edx |
| 673 | mov al, bh |
679 | mov al, bh |
| 674 | out dx, al |
680 | out dx, al |
| 675 | 681 | ||
| 676 | pop eax |
682 | pop eax |
| 677 | add edx, LCR_REG-1 |
683 | add edx, LCR_REG-1 |
| 678 | out dx, al |
684 | out dx, al |
| 679 | .fail: |
685 | .fail: |
| 680 | ret |
686 | ret |
| 681 | 687 | ||
| 682 | 688 | ||
| 683 | ; param |
689 | ; param |
| 684 | ; ebx= uart |
690 | ; ebx= uart |
| 685 | 691 | ||
| 686 | align 4 |
692 | align 4 |
| 687 | transmit: |
693 | transmit: |
| 688 | push esi |
694 | push esi |
| 689 | push edi |
695 | push edi |
| 690 | 696 | ||
| 691 | mov edx, [ebx+UART.base] |
697 | mov edx, [ebx+UART.base] |
| 692 | 698 | ||
| 693 | pushfd |
699 | pushfd |
| 694 | cli |
700 | cli |
| 695 | 701 | ||
| 696 | mov esi, [ebx+UART.xmit_rp] |
702 | mov esi, [ebx+UART.xmit_rp] |
| 697 | mov ecx, [ebx+UART.xmit_count] |
703 | mov ecx, [ebx+UART.xmit_count] |
| 698 | test ecx, ecx |
704 | test ecx, ecx |
| 699 | je .stop |
705 | je .stop |
| 700 | 706 | ||
| 701 | cmp ecx, 16 |
707 | cmp ecx, 16 |
| 702 | jbe @F |
708 | jbe @F |
| 703 | mov ecx, 16 |
709 | mov ecx, 16 |
| 704 | @@: |
710 | @@: |
| 705 | sub [ebx+UART.xmit_count], ecx |
711 | sub [ebx+UART.xmit_count], ecx |
| 706 | add [ebx+UART.xmit_free], ecx |
712 | add [ebx+UART.xmit_free], ecx |
| 707 | cld |
713 | cld |
| 708 | @@: |
714 | @@: |
| 709 | lodsb |
715 | lodsb |
| 710 | out dx, al |
716 | out dx, al |
| 711 | dec ecx |
717 | dec ecx |
| 712 | jnz @B |
718 | jnz @B |
| 713 | 719 | ||
| 714 | cmp esi,[ebx+UART.xmit_top] |
720 | cmp esi,[ebx+UART.xmit_top] |
| 715 | jb @F |
721 | jb @F |
| 716 | sub esi, 8192 |
722 | sub esi, 8192 |
| 717 | @@: |
723 | @@: |
| 718 | mov [ebx+UART.xmit_rp], esi |
724 | mov [ebx+UART.xmit_rp], esi |
| 719 | 725 | ||
| 720 | cmp [ebx+UART.xmit_count], 0 |
726 | cmp [ebx+UART.xmit_count], 0 |
| 721 | je .stop |
727 | je .stop |
| 722 | 728 | ||
| 723 | mov [ebx+UART.state], UART_TRANSMIT |
729 | mov [ebx+UART.state], UART_TRANSMIT |
| 724 | jmp @F |
730 | jmp @F |
| 725 | .stop: |
731 | .stop: |
| 726 | mov [ebx+UART.state], UART_STOP |
732 | mov [ebx+UART.state], UART_STOP |
| 727 | @@: |
733 | @@: |
| 728 | popfd |
734 | popfd |
| 729 | pop edi |
735 | pop edi |
| 730 | pop esi |
736 | pop esi |
| 731 | ret |
737 | ret |
| 732 | 738 | ||
| 733 | 739 | ||
| 734 | ; param |
740 | ; param |
| 735 | ; esi= input buffer |
741 | ; esi= input buffer |
| 736 | ; +0 connection |
742 | ; +0 connection |
| 737 | ; +4 dst buffer |
743 | ; +4 dst buffer |
| 738 | ; +8 dst size |
744 | ; +8 dst size |
| 739 | ; edi= output buffer |
745 | ; edi= output buffer |
| 740 | ; +0 bytes read |
746 | ; +0 bytes read |
| 741 | 747 | ||
| 742 | ; retval |
748 | ; retval |
| 743 | ; eax= error code |
749 | ; eax= error code |
| 744 | 750 | ||
| 745 | align 4 |
751 | align 4 |
| 746 | uart_read: |
752 | uart_read: |
| 747 | mov eax, [esi] |
753 | mov eax, [esi] |
| 748 | cmp [eax+APPOBJ.magic], 'CNCT' |
754 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 749 | jne .fail |
755 | jne .fail |
| 750 | 756 | ||
| 751 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
757 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 752 | jne .fail |
758 | jne .fail |
| 753 | 759 | ||
| 754 | mov eax, [eax+CONNECTION.uart] |
760 | mov eax, [eax+CONNECTION.uart] |
| 755 | test eax, eax |
761 | test eax, eax |
| 756 | jz .fail |
762 | jz .fail |
| 757 | 763 | ||
| 758 | mov ebx, [esi+8] ;dst size |
764 | mov ebx, [esi+8] ;dst size |
| 759 | mov ecx, [eax+UART.rcvr_count] |
765 | mov ecx, [eax+UART.rcvr_count] |
| 760 | cmp ecx, ebx |
766 | cmp ecx, ebx |
| 761 | jbe @F |
767 | jbe @F |
| 762 | mov ecx, ebx |
768 | mov ecx, ebx |
| 763 | @@: |
769 | @@: |
| 764 | mov [edi], ecx ;bytes read |
770 | mov [edi], ecx ;bytes read |
| 765 | test ecx, ecx |
771 | test ecx, ecx |
| 766 | jz .done |
772 | jz .done |
| 767 | 773 | ||
| 768 | push ecx |
774 | push ecx |
| 769 | 775 | ||
| 770 | mov edi, [esi+4] ;dst |
776 | mov edi, [esi+4] ;dst |
| 771 | mov esi, [eax+UART.rcvr_rp] |
777 | mov esi, [eax+UART.rcvr_rp] |
| 772 | cld |
778 | cld |
| 773 | rep movsb |
779 | rep movsb |
| 774 | pop ecx |
780 | pop ecx |
| 775 | 781 | ||
| 776 | cmp esi, [eax+UART.rcvr_top] |
782 | cmp esi, [eax+UART.rcvr_top] |
| 777 | jb @F |
783 | jb @F |
| 778 | sub esi, 8192 |
784 | sub esi, 8192 |
| 779 | @@: |
785 | @@: |
| 780 | mov [eax+UART.rcvr_rp], esi |
786 | mov [eax+UART.rcvr_rp], esi |
| 781 | sub [eax+UART.rcvr_count], ecx |
787 | sub [eax+UART.rcvr_count], ecx |
| 782 | .done: |
788 | .done: |
| 783 | xor eax, eax |
789 | xor eax, eax |
| 784 | ret |
790 | ret |
| 785 | .fail: |
791 | .fail: |
| 786 | or eax, -1 |
792 | or eax, -1 |
| 787 | ret |
793 | ret |
| 788 | 794 | ||
| 789 | ; param |
795 | ; param |
| 790 | ; esi= input buffer |
796 | ; esi= input buffer |
| 791 | ; +0 connection |
797 | ; +0 connection |
| 792 | ; +4 src buffer |
798 | ; +4 src buffer |
| 793 | ; +8 src size |
799 | ; +8 src size |
| 794 | ; |
800 | ; |
| 795 | ; retval |
801 | ; retval |
| 796 | ; eax= error code |
802 | ; eax= error code |
| 797 | 803 | ||
| 798 | align 4 |
804 | align 4 |
| 799 | uart_write: |
805 | uart_write: |
| 800 | mov eax, [esi] |
806 | mov eax, [esi] |
| 801 | cmp [eax+APPOBJ.magic], 'CNCT' |
807 | cmp [eax+APPOBJ.magic], 'CNCT' |
| 802 | jne .fail |
808 | jne .fail |
| 803 | 809 | ||
| 804 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
810 | cmp [eax+APPOBJ.destroy], uart_close.destroy |
| 805 | jne .fail |
811 | jne .fail |
| 806 | 812 | ||
| 807 | mov eax, [eax+CONNECTION.uart] |
813 | mov eax, [eax+CONNECTION.uart] |
| 808 | test eax, eax |
814 | test eax, eax |
| 809 | jz .fail |
815 | jz .fail |
| 810 | 816 | ||
| 811 | mov ebx, [esi+4] |
817 | mov ebx, [esi+4] |
| 812 | mov edx, [esi+8] |
818 | mov edx, [esi+8] |
| 813 | 819 | ||
| 814 | ; param |
820 | ; param |
| 815 | ; eax= uart |
821 | ; eax= uart |
| 816 | ; ebx= src |
822 | ; ebx= src |
| 817 | ; edx= count |
823 | ; edx= count |
| 818 | 824 | ||
| 819 | align 4 |
825 | align 4 |
| 820 | .internal: |
826 | .internal: |
| 821 | mov esi, ebx |
827 | mov esi, ebx |
| 822 | mov edi, [eax+UART.xmit_wp] |
828 | mov edi, [eax+UART.xmit_wp] |
| 823 | .write: |
829 | .write: |
| 824 | test edx, edx |
830 | test edx, edx |
| 825 | jz .fail |
831 | jz .fail |
| 826 | .wait: |
832 | .wait: |
| 827 | cmp [eax+UART.xmit_free], 0 |
833 | cmp [eax+UART.xmit_free], 0 |
| 828 | jne .fill |
834 | jne .fill |
| 829 | 835 | ||
| 830 | cmp [eax+UART.state], UART_TRANSMIT |
836 | cmp [eax+UART.state], UART_TRANSMIT |
| 831 | je .wait |
837 | je .wait |
| 832 | 838 | ||
| 833 | mov ebx, eax |
839 | mov ebx, eax |
| 834 | push edx |
840 | push edx |
| 835 | call transmit |
841 | call transmit |
| 836 | pop edx |
842 | pop edx |
| 837 | mov eax, ebx |
843 | mov eax, ebx |
| 838 | jmp .write |
844 | jmp .write |
| 839 | .fill: |
845 | .fill: |
| 840 | mov ecx, [eax+UART.xmit_free] |
846 | mov ecx, [eax+UART.xmit_free] |
| 841 | cmp ecx, edx |
847 | cmp ecx, edx |
| 842 | jbe @F |
848 | jbe @F |
| 843 | mov ecx, edx |
849 | mov ecx, edx |
| 844 | @@: |
850 | @@: |
| 845 | push ecx |
851 | push ecx |
| 846 | cld |
852 | cld |
| 847 | rep movsb |
853 | rep movsb |
| 848 | pop ecx |
854 | pop ecx |
| 849 | sub [eax+UART.xmit_free], ecx |
855 | sub [eax+UART.xmit_free], ecx |
| 850 | add [eax+UART.xmit_count], ecx |
856 | add [eax+UART.xmit_count], ecx |
| 851 | sub edx, ecx |
857 | sub edx, ecx |
| 852 | jnz .wait |
858 | jnz .wait |
| 853 | .done: |
859 | .done: |
| 854 | cmp edi, [eax+UART.xmit_top] |
860 | cmp edi, [eax+UART.xmit_top] |
| 855 | jb @F |
861 | jb @F |
| 856 | sub edi, 8192 |
862 | sub edi, 8192 |
| 857 | @@: |
863 | @@: |
| 858 | mov [eax+UART.xmit_wp], edi |
864 | mov [eax+UART.xmit_wp], edi |
| 859 | cmp [eax+UART.state], UART_TRANSMIT |
865 | cmp [eax+UART.state], UART_TRANSMIT |
| 860 | je @F |
866 | je @F |
| 861 | mov ebx, eax |
867 | mov ebx, eax |
| 862 | call transmit |
868 | call transmit |
| 863 | @@: |
869 | @@: |
| 864 | xor eax, eax |
870 | xor eax, eax |
| 865 | ret |
871 | ret |
| 866 | .fail: |
872 | .fail: |
| 867 | or eax, -1 |
873 | or eax, -1 |
| 868 | ret |
874 | ret |
| 869 | 875 | ||
| 870 | 876 | ||
| 871 | align 4 |
877 | align 4 |
| 872 | com_2_isr: |
878 | com_2_isr: |
| 873 | mov ebx, [com2] |
879 | mov ebx, [com2] |
| 874 | jmp com_1_isr.get_info |
880 | jmp com_1_isr.get_info |
| 875 | align 4 |
881 | align 4 |
| 876 | com_1_isr: |
882 | com_1_isr: |
| 877 | mov ebx, [com1] |
883 | mov ebx, [com1] |
| 878 | .get_info: |
884 | .get_info: |
| 879 | mov edx, [ebx+UART.base] |
885 | mov edx, [ebx+UART.base] |
| 880 | add edx, IIR_REG |
886 | add edx, IIR_REG |
| 881 | in al, dx |
887 | in al, dx |
| 882 | 888 | ||
| 883 | test al, IIR_INTR |
889 | test al, IIR_INTR |
| 884 | jnz .done |
890 | jnz .done |
| 885 | 891 | ||
| 886 | shr eax, 1 |
892 | shr eax, 1 |
| 887 | and eax, 3 |
893 | and eax, 3 |
| 888 | 894 | ||
| 889 | call [isr_action+eax*4] |
895 | call [isr_action+eax*4] |
| 890 | jmp .get_info |
896 | jmp .get_info |
| 891 | .done: |
897 | .done: |
| 892 | ret |
898 | ret |
| 893 | 899 | ||
| 894 | align 4 |
900 | align 4 |
| 895 | isr_line: |
901 | isr_line: |
| 896 | mov edx, [ebx+UART.base] |
902 | mov edx, [ebx+UART.base] |
| 897 | add edx, LSR_REG |
903 | add edx, LSR_REG |
| 898 | in al, dx |
904 | in al, dx |
| 899 | ret |
905 | ret |
| 900 | 906 | ||
| 901 | align 4 |
907 | align 4 |
| 902 | isr_recieve: |
908 | isr_recieve: |
| 903 | mov esi, [ebx+UART.base] |
909 | mov esi, [ebx+UART.base] |
| 904 | add esi, LSR_REG |
910 | add esi, LSR_REG |
| 905 | mov edi, [ebx+UART.rcvr_wp] |
911 | mov edi, [ebx+UART.rcvr_wp] |
| 906 | xor ecx, ecx |
912 | xor ecx, ecx |
| 907 | cld |
913 | cld |
| 908 | .read: |
914 | .read: |
| 909 | mov edx, esi |
915 | mov edx, esi |
| 910 | in al, dx |
916 | in al, dx |
| 911 | test eax, LSR_DR |
917 | test eax, LSR_DR |
| 912 | jz .done |
918 | jz .done |
| 913 | 919 | ||
| 914 | mov edx, [ebx+UART.base] |
920 | mov edx, [ebx+UART.base] |
| 915 | in al, dx |
921 | in al, dx |
| 916 | stosb |
922 | stosb |
| 917 | inc ecx |
923 | inc ecx |
| 918 | jmp .read |
924 | jmp .read |
| 919 | .done: |
925 | .done: |
| 920 | cmp edi, [ebx+UART.rcvr_top] |
926 | cmp edi, [ebx+UART.rcvr_top] |
| 921 | jb @F |
927 | jb @F |
| 922 | sub edi, 8192 |
928 | sub edi, 8192 |
| 923 | @@: |
929 | @@: |
| 924 | mov [ebx+UART.rcvr_wp], edi |
930 | mov [ebx+UART.rcvr_wp], edi |
| 925 | add [ebx+UART.rcvr_count], ecx |
931 | add [ebx+UART.rcvr_count], ecx |
| 926 | ret |
932 | ret |
| 927 | 933 | ||
| 928 | align 4 |
934 | align 4 |
| 929 | isr_modem: |
935 | isr_modem: |
| 930 | mov edx, [ebx+UART.base] |
936 | mov edx, [ebx+UART.base] |
| 931 | add edx, MSR_REG |
937 | add edx, MSR_REG |
| 932 | in al, dx |
938 | in al, dx |
| 933 | ret |
939 | ret |
| 934 | 940 | ||
| 935 | 941 | ||
| 936 | align 4 |
942 | align 4 |
| 937 | divisor dw 2304, 1536, 1047, 857, 768, 384 |
943 | divisor dw 2304, 1536, 1047, 857, 768, 384 |
| 938 | dw 192, 96, 64, 58, 48, 32 |
944 | dw 192, 96, 64, 58, 48, 32 |
| 939 | dw 24, 16, 12, 6, 3, 2, 1 |
945 | dw 24, 16, 12, 6, 3, 2, 1 |
| 940 | 946 | ||
| 941 | align 4 |
947 | align 4 |
| 942 | uart_func dd 0 ;SRV_GETVERSION |
948 | uart_func dd 0 ;SRV_GETVERSION |
| 943 | dd 0 ;PORT_OPEN |
949 | dd 0 ;PORT_OPEN |
| 944 | dd uart_close ;PORT_CLOSE |
950 | dd uart_close ;PORT_CLOSE |
| 945 | dd uart_reset ;PORT_RESET |
951 | dd uart_reset ;PORT_RESET |
| 946 | dd uart_set_mode ;PORT_SETMODE |
952 | dd uart_set_mode ;PORT_SETMODE |
| 947 | dd 0 ;PORT_GETMODE |
953 | dd 0 ;PORT_GETMODE |
| 948 | dd uart_set_mcr ;PORT_SETMODEM |
954 | dd uart_set_mcr ;PORT_SETMODEM |
| 949 | dd 0 ;PORT_GETMODEM |
955 | dd 0 ;PORT_GETMODEM |
| 950 | dd uart_read ;PORT_READ |
956 | dd uart_read ;PORT_READ |
| 951 | dd uart_write ;PORT_WRITE |
957 | dd uart_write ;PORT_WRITE |
| 952 | 958 | ||
| 953 | isr_action dd isr_modem |
959 | isr_action dd isr_modem |
| 954 | dd transmit |
960 | dd transmit |
| 955 | dd isr_recieve |
961 | dd isr_recieve |
| 956 | dd isr_line |
962 | dd isr_line |
| 957 | 963 | ||
| 958 | version dd 0x00040000 |
964 | version dd (5 shl 16) or (UART_VERSION and 0xFFFF) |
| 959 | 965 | ||
| 960 | sz_uart_srv db 'UART',0 |
966 | sz_uart_srv db 'UART',0 |
| 961 | 967 | ||
| 962 | align 4 |
968 | align 4 |
| 963 | 969 | ||
| 964 | com1 rd 1 |
970 | com1 rd 1 |
| 965 | com2 rd 1 |
971 | com2 rd 1 |