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iglobal
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iglobal
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IRQ_COUNT	dd	24
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IRQ_COUNT	dd	24
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endg
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endg
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uglobal
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uglobal
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APIC:		dd	0
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APIC         rd  1
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LAPIC_BASE:	dd	0
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IOAPIC_base  rd  1
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IOAPIC_base:	dd	0
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LAPIC_BASE   rd  1
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endg
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endg
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APIC_ID		equ	0x20
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APIC_ID		equ	0x20
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IOAPIC_ARB	equ	0x2
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IOAPIC_ARB	equ	0x2
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IOAPIC_REDTBL	equ	0x10
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IOAPIC_REDTBL	equ	0x10
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APIC_init:
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APIC_init:
- 
 
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	mov	dword[APIC], 0
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	mov	dword[APIC], 0
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	; jmp	.no_apic		; NO APIC
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  mov eax, [acpi_ioapic_base]
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;	bt	[cpu_caps], CAPS_APIC
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  test eax, eax
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;	jnc	.no_apic
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	; Check for MP table
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	;.....
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  jz .no_apic
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	call	IRQ_mask_all
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	call	IRQ_mask_all
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	; IOAPIC init
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	; 0xfec00000 - may be relocated, see chip reference... & MP table
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	; IOAPIC init
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	stdcall	map_io_mem, 0xfec00000, 0x20, PG_SW
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  stdcall map_io_mem, [acpi_ioapic_base], 0x20, PG_SW
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	mov	[IOAPIC_base], eax
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	mov	[IOAPIC_base], eax
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align 4
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align 4
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LAPIC_init:
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LAPIC_init:
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	; Check MSR support
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	; Check MSR support
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	;....
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	;....
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	; Get LAPIC base address
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	; Get LAPIC base address
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	mov	ecx, 0x1b
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; mov ecx, 0x1b
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	rdmsr				; it may be replaced to
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; rdmsr       ; it may be replaced to
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	and	ax, 0xf000		; mov	eax, 0xfee00000
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; and ax, 0xf000    ; mov eax, 0xfee00000
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	stdcall	map_io_mem, eax, 0x1000, PG_SW
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  stdcall map_io_mem, [acpi_lapic_base], 0x1000, PG_SW
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	mov	[LAPIC_BASE], eax
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	mov	[LAPIC_BASE], eax
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	mov	esi, eax
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	mov	esi, eax
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