WebSVN – Kolibri OS – Diff – /kernel/branches/Kolibri-acpi/const.inc


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;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
$Revision: 6252 $
 
 
dpl0    equ  10010000b     ; data read       dpl0
drw0    equ  10010010b      ; data read/write dpl0
drw3    equ  11110010b      ; data read/write dpl3
cpl0    equ  10011010b      ; code read dpl0
cpl3    equ  11111010b      ; code read dpl3
 
D32     equ  01000000b      ; 32bit segment
G32     equ  10000000b      ; page gran
 
 
;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;;
 
CPU_386        equ 3
CPU_486        equ 4
CPU_PENTIUM    equ 5
CPU_P6         equ 6
CPU_PENTIUM4   equ 0x0F
 
CAPS_FPU       equ    00 ;on-chip x87 floating point unit
CAPS_VME       equ    01 ;virtual-mode enhancements
CAPS_DE        equ    02 ;debugging extensions
CAPS_PSE       equ    03 ;page-size extensions
CAPS_TSC       equ    04 ;time stamp counter
CAPS_MSR       equ    05 ;model-specific registers
CAPS_PAE       equ    06 ;physical-address extensions
CAPS_MCE       equ    07 ;machine check exception
CAPS_CX8       equ    08 ;CMPXCHG8B instruction
CAPS_APIC      equ    09 ;on-chip advanced programmable
                         ; interrupt controller
;                     10 ;unused
CAPS_SEP       equ    11 ;SYSENTER and SYSEXIT instructions
CAPS_MTRR      equ    12 ;memory-type range registers
CAPS_PGE       equ    13 ;page global extension
CAPS_MCA       equ    14 ;machine check architecture
CAPS_CMOV      equ    15 ;conditional move instructions
CAPS_PAT       equ    16 ;page attribute table
 
CAPS_PSE36     equ    17 ;page-size extensions
CAPS_PSN       equ    18 ;processor serial number
CAPS_CLFLUSH   equ    19 ;CLFUSH instruction
 
CAPS_DS        equ    21 ;debug store
CAPS_ACPI      equ    22 ;thermal monitor and software
                         ;controlled clock supported
CAPS_MMX       equ    23 ;MMX instructions
CAPS_FXSR      equ    24 ;FXSAVE and FXRSTOR instructions
CAPS_SSE       equ    25 ;SSE instructions
CAPS_SSE2      equ    26 ;SSE2 instructions
CAPS_SS        equ    27 ;self-snoop
CAPS_HTT       equ    28 ;hyper-threading technology
CAPS_TM        equ    29 ;thermal monitor supported
CAPS_IA64      equ    30 ;IA64 capabilities
CAPS_PBE       equ    31 ;pending break enable
 
;ecx
CAPS_SSE3      equ    32 ;SSE3 instructions
;                     33
;                     34
CAPS_MONITOR   equ    35 ;MONITOR/MWAIT instructions
CAPS_DS_CPL    equ    36 ;
CAPS_VMX       equ    37 ;virtual mode extensions
;                     38 ;
CAPS_EST       equ    39 ;enhansed speed step
CAPS_TM2       equ    40 ;thermal monitor2 supported
;                     41
CAPS_CID       equ    42 ;
;                     43
;                     44
CAPS_CX16      equ    45 ;CMPXCHG16B instruction
CAPS_xTPR      equ    46 ;
;
;reserved
;
;ext edx /ecx
CAPS_SYSCAL    equ    64 ;
CAPS_XD        equ    65 ;execution disable
CAPS_FFXSR     equ    66 ;
CAPS_RDTSCP    equ    67 ;
CAPS_X64       equ    68 ;
CAPS_3DNOW     equ    69 ;
CAPS_3DNOWEXT  equ    70 ;
CAPS_LAHF      equ    71 ;
CAPS_CMP_LEG   equ    72 ;
CAPS_SVM       equ    73 ;secure virual machine
CAPS_ALTMOVCR8 equ    74 ;
 
; CPU MSR names
MSR_SYSENTER_CS         equ     0x174
MSR_SYSENTER_ESP        equ     0x175
MSR_SYSENTER_EIP        equ     0x176
MSR_CR_PAT              equ     0x277
MSR_MTRR_DEF_TYPE       equ     0x2FF
 
MSR_AMD_EFER            equ     0xC0000080      ; Extended Feature Enable Register
MSR_AMD_STAR            equ     0xC0000081      ; SYSCALL/SYSRET Target Address Register
 
CR0_PE         equ    0x00000001   ;protected mode
CR0_MP         equ    0x00000002   ;monitor fpu
CR0_EM         equ    0x00000004   ;fpu emulation
CR0_TS         equ    0x00000008   ;task switch
CR0_ET         equ    0x00000010   ;extension type hardcoded to 1
CR0_NE         equ    0x00000020   ;numeric error
CR0_WP         equ    0x00010000   ;write protect
CR0_AM         equ    0x00040000   ;alignment check
CR0_NW         equ    0x20000000   ;not write-through
CR0_CD         equ    0x40000000   ;cache disable
CR0_PG         equ    0x80000000   ;paging
 
 
CR4_VME        equ    0x0001
CR4_PVI        equ    0x0002
CR4_TSD        equ    0x0004
CR4_DE         equ    0x0008
CR4_PSE        equ    0x0010
CR4_PAE        equ    0x0020
CR4_MCE        equ    0x0040
CR4_PGE        equ    0x0080
CR4_PCE        equ    0x0100
CR4_OSFXSR     equ    0x0200
CR4_OSXMMEXPT  equ    0x0400
 
SSE_IE         equ    0x0001
SSE_DE         equ    0x0002
SSE_ZE         equ    0x0004
SSE_OE         equ    0x0008
SSE_UE         equ    0x0010
SSE_PE         equ    0x0020
SSE_DAZ        equ    0x0040
SSE_IM         equ    0x0080
SSE_DM         equ    0x0100
SSE_ZM         equ    0x0200
SSE_OM         equ    0x0400
SSE_UM         equ    0x0800
SSE_PM         equ    0x1000
SSE_FZ         equ    0x8000
 
SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM)
 
IRQ_PIC        equ    0
IRQ_APIC       equ    1
 
struct  TSS
        _back       rw 2
        _esp0       rd 1
        _ss0        rw 2
        _esp1       rd 1
        _ss1        rw 2
        _esp2       rd 1
        _ss2        rw 2
        _cr3        rd 1
        _eip        rd 1
        _eflags     rd 1
        _eax        rd 1
        _ecx        rd 1
        _edx        rd 1
        _ebx        rd 1
        _esp        rd 1
        _ebp        rd 1
        _esi        rd 1
        _edi        rd 1
        _es         rw 2
        _cs         rw 2
        _ss         rw 2
        _ds         rw 2
        _fs         rw 2
        _gs         rw 2
        _ldt        rw 2
        _trap       rw 1
        _io         rw 1
                    rb 24
        _io_map_0   rb 4096
        _io_map_1   rb 4096
ends
 
DRIVE_DATA_SIZE     equ 16
 
OS_BASE             equ 0x80000000
 
window_data         equ (OS_BASE+0x0001000)
 
CURRENT_TASK        equ (OS_BASE+0x0003000)
TASK_COUNT          equ (OS_BASE+0x0003004)
TASK_BASE           equ (OS_BASE+0x0003010)
TASK_DATA           equ (OS_BASE+0x0003020)
TASK_EVENT          equ (OS_BASE+0x0003020)
 
CDDataBuf           equ (OS_BASE+0x0005000)
 
;unused                 0x6000 - 0x8fff
 
BOOT_VARS           equ (OS_BASE)               ;0x9000
 
idts                equ (OS_BASE+0x000B10

Rev 6240	Rev 6252
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7		7
8	$Revision: 6240 $	8	$Revision: 6252 $
9		9
10		10
11	dpl0 equ 10010000b ; data read dpl0	11	dpl0 equ 10010000b ; data read dpl0
12	drw0 equ 10010010b ; data read/write dpl0	12	drw0 equ 10010010b ; data read/write dpl0
13	drw3 equ 11110010b ; data read/write dpl3	13	drw3 equ 11110010b ; data read/write dpl3
14	cpl0 equ 10011010b ; code read dpl0	14	cpl0 equ 10011010b ; code read dpl0
15	cpl3 equ 11111010b ; code read dpl3	15	cpl3 equ 11111010b ; code read dpl3
16		16
17	D32 equ 01000000b ; 32bit segment	17	D32 equ 01000000b ; 32bit segment
18	G32 equ 10000000b ; page gran	18	G32 equ 10000000b ; page gran
19		19
20		20
21	;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;;	21	;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;;
22		22
23	CPU_386 equ 3	23	CPU_386 equ 3
24	CPU_486 equ 4	24	CPU_486 equ 4
25	CPU_PENTIUM equ 5	25	CPU_PENTIUM equ 5
26	CPU_P6 equ 6	26	CPU_P6 equ 6
27	CPU_PENTIUM4 equ 0x0F	27	CPU_PENTIUM4 equ 0x0F
28		28
29	CAPS_FPU equ 00 ;on-chip x87 floating point unit	29	CAPS_FPU equ 00 ;on-chip x87 floating point unit
30	CAPS_VME equ 01 ;virtual-mode enhancements	30	CAPS_VME equ 01 ;virtual-mode enhancements
31	CAPS_DE equ 02 ;debugging extensions	31	CAPS_DE equ 02 ;debugging extensions
32	CAPS_PSE equ 03 ;page-size extensions	32	CAPS_PSE equ 03 ;page-size extensions
33	CAPS_TSC equ 04 ;time stamp counter	33	CAPS_TSC equ 04 ;time stamp counter
34	CAPS_MSR equ 05 ;model-specific registers	34	CAPS_MSR equ 05 ;model-specific registers
35	CAPS_PAE equ 06 ;physical-address extensions	35	CAPS_PAE equ 06 ;physical-address extensions
36	CAPS_MCE equ 07 ;machine check exception	36	CAPS_MCE equ 07 ;machine check exception
37	CAPS_CX8 equ 08 ;CMPXCHG8B instruction	37	CAPS_CX8 equ 08 ;CMPXCHG8B instruction
38	CAPS_APIC equ 09 ;on-chip advanced programmable	38	CAPS_APIC equ 09 ;on-chip advanced programmable
39	; interrupt controller	39	; interrupt controller
40	; 10 ;unused	40	; 10 ;unused
41	CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions	41	CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions
42	CAPS_MTRR equ 12 ;memory-type range registers	42	CAPS_MTRR equ 12 ;memory-type range registers
43	CAPS_PGE equ 13 ;page global extension	43	CAPS_PGE equ 13 ;page global extension
44	CAPS_MCA equ 14 ;machine check architecture	44	CAPS_MCA equ 14 ;machine check architecture
45	CAPS_CMOV equ 15 ;conditional move instructions	45	CAPS_CMOV equ 15 ;conditional move instructions
46	CAPS_PAT equ 16 ;page attribute table	46	CAPS_PAT equ 16 ;page attribute table
47		47
48	CAPS_PSE36 equ 17 ;page-size extensions	48	CAPS_PSE36 equ 17 ;page-size extensions
49	CAPS_PSN equ 18 ;processor serial number	49	CAPS_PSN equ 18 ;processor serial number
50	CAPS_CLFLUSH equ 19 ;CLFUSH instruction	50	CAPS_CLFLUSH equ 19 ;CLFUSH instruction
51		51
52	CAPS_DS equ 21 ;debug store	52	CAPS_DS equ 21 ;debug store
53	CAPS_ACPI equ 22 ;thermal monitor and software	53	CAPS_ACPI equ 22 ;thermal monitor and software
54	;controlled clock supported	54	;controlled clock supported
55	CAPS_MMX equ 23 ;MMX instructions	55	CAPS_MMX equ 23 ;MMX instructions
56	CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions	56	CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions
57	CAPS_SSE equ 25 ;SSE instructions	57	CAPS_SSE equ 25 ;SSE instructions
58	CAPS_SSE2 equ 26 ;SSE2 instructions	58	CAPS_SSE2 equ 26 ;SSE2 instructions
59	CAPS_SS equ 27 ;self-snoop	59	CAPS_SS equ 27 ;self-snoop
60	CAPS_HTT equ 28 ;hyper-threading technology	60	CAPS_HTT equ 28 ;hyper-threading technology
61	CAPS_TM equ 29 ;thermal monitor supported	61	CAPS_TM equ 29 ;thermal monitor supported
62	CAPS_IA64 equ 30 ;IA64 capabilities	62	CAPS_IA64 equ 30 ;IA64 capabilities
63	CAPS_PBE equ 31 ;pending break enable	63	CAPS_PBE equ 31 ;pending break enable
64		64
65	;ecx	65	;ecx
66	CAPS_SSE3 equ 32 ;SSE3 instructions	66	CAPS_SSE3 equ 32 ;SSE3 instructions
67	; 33	67	; 33
68	; 34	68	; 34
69	CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions	69	CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions
70	CAPS_DS_CPL equ 36 ;	70	CAPS_DS_CPL equ 36 ;
71	CAPS_VMX equ 37 ;virtual mode extensions	71	CAPS_VMX equ 37 ;virtual mode extensions
72	; 38 ;	72	; 38 ;
73	CAPS_EST equ 39 ;enhansed speed step	73	CAPS_EST equ 39 ;enhansed speed step
74	CAPS_TM2 equ 40 ;thermal monitor2 supported	74	CAPS_TM2 equ 40 ;thermal monitor2 supported
75	; 41	75	; 41
76	CAPS_CID equ 42 ;	76	CAPS_CID equ 42 ;
77	; 43	77	; 43
78	; 44	78	; 44
79	CAPS_CX16 equ 45 ;CMPXCHG16B instruction	79	CAPS_CX16 equ 45 ;CMPXCHG16B instruction
80	CAPS_xTPR equ 46 ;	80	CAPS_xTPR equ 46 ;
81	;	81	;
82	;reserved	82	;reserved
83	;	83	;
84	;ext edx /ecx	84	;ext edx /ecx
85	CAPS_SYSCAL equ 64 ;	85	CAPS_SYSCAL equ 64 ;
86	CAPS_XD equ 65 ;execution disable	86	CAPS_XD equ 65 ;execution disable
87	CAPS_FFXSR equ 66 ;	87	CAPS_FFXSR equ 66 ;
88	CAPS_RDTSCP equ 67 ;	88	CAPS_RDTSCP equ 67 ;
89	CAPS_X64 equ 68 ;	89	CAPS_X64 equ 68 ;
90	CAPS_3DNOW equ 69 ;	90	CAPS_3DNOW equ 69 ;
91	CAPS_3DNOWEXT equ 70 ;	91	CAPS_3DNOWEXT equ 70 ;
92	CAPS_LAHF equ 71 ;	92	CAPS_LAHF equ 71 ;
93	CAPS_CMP_LEG equ 72 ;	93	CAPS_CMP_LEG equ 72 ;
94	CAPS_SVM equ 73 ;secure virual machine	94	CAPS_SVM equ 73 ;secure virual machine
95	CAPS_ALTMOVCR8 equ 74 ;	95	CAPS_ALTMOVCR8 equ 74 ;
96		96
97	; CPU MSR names	97	; CPU MSR names
98	MSR_SYSENTER_CS equ 0x174	98	MSR_SYSENTER_CS equ 0x174
99	MSR_SYSENTER_ESP equ 0x175	99	MSR_SYSENTER_ESP equ 0x175
100	MSR_SYSENTER_EIP equ 0x176	100	MSR_SYSENTER_EIP equ 0x176
101	MSR_CR_PAT equ 0x277	101	MSR_CR_PAT equ 0x277
102	MSR_MTRR_DEF_TYPE equ 0x2FF	102	MSR_MTRR_DEF_TYPE equ 0x2FF
103		103
104	MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register	104	MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register
105	MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register	105	MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register
106		106
107	CR0_PE equ 0x00000001 ;protected mode	107	CR0_PE equ 0x00000001 ;protected mode
108	CR0_MP equ 0x00000002 ;monitor fpu	108	CR0_MP equ 0x00000002 ;monitor fpu
109	CR0_EM equ 0x00000004 ;fpu emulation	109	CR0_EM equ 0x00000004 ;fpu emulation
110	CR0_TS equ 0x00000008 ;task switch	110	CR0_TS equ 0x00000008 ;task switch
111	CR0_ET equ 0x00000010 ;extension type hardcoded to 1	111	CR0_ET equ 0x00000010 ;extension type hardcoded to 1
112	CR0_NE equ 0x00000020 ;numeric error	112	CR0_NE equ 0x00000020 ;numeric error
113	CR0_WP equ 0x00010000 ;write protect	113	CR0_WP equ 0x00010000 ;write protect
114	CR0_AM equ 0x00040000 ;alignment check	114	CR0_AM equ 0x00040000 ;alignment check
115	CR0_NW equ 0x20000000 ;not write-through	115	CR0_NW equ 0x20000000 ;not write-through
116	CR0_CD equ 0x40000000 ;cache disable	116	CR0_CD equ 0x40000000 ;cache disable
117	CR0_PG equ 0x80000000 ;paging	117	CR0_PG equ 0x80000000 ;paging
118		118
119		119
120	CR4_VME equ 0x0001	120	CR4_VME equ 0x0001
121	CR4_PVI equ 0x0002	121	CR4_PVI equ 0x0002
122	CR4_TSD equ 0x0004	122	CR4_TSD equ 0x0004
123	CR4_DE equ 0x0008	123	CR4_DE equ 0x0008
124	CR4_PSE equ 0x0010	124	CR4_PSE equ 0x0010
125	CR4_PAE equ 0x0020	125	CR4_PAE equ 0x0020
126	CR4_MCE equ 0x0040	126	CR4_MCE equ 0x0040
127	CR4_PGE equ 0x0080	127	CR4_PGE equ 0x0080
128	CR4_PCE equ 0x0100	128	CR4_PCE equ 0x0100
129	CR4_OSFXSR equ 0x0200	129	CR4_OSFXSR equ 0x0200
130	CR4_OSXMMEXPT equ 0x0400	130	CR4_OSXMMEXPT equ 0x0400
131		131
132	SSE_IE equ 0x0001	132	SSE_IE equ 0x0001
133	SSE_DE equ 0x0002	133	SSE_DE equ 0x0002
134	SSE_ZE equ 0x0004	134	SSE_ZE equ 0x0004
135	SSE_OE equ 0x0008	135	SSE_OE equ 0x0008
136	SSE_UE equ 0x0010	136	SSE_UE equ 0x0010
137	SSE_PE equ 0x0020	137	SSE_PE equ 0x0020
138	SSE_DAZ equ 0x0040	138	SSE_DAZ equ 0x0040
139	SSE_IM equ 0x0080	139	SSE_IM equ 0x0080
140	SSE_DM equ 0x0100	140	SSE_DM equ 0x0100
141	SSE_ZM equ 0x0200	141	SSE_ZM equ 0x0200
142	SSE_OM equ 0x0400	142	SSE_OM equ 0x0400
143	SSE_UM equ 0x0800	143	SSE_UM equ 0x0800
144	SSE_PM equ 0x1000	144	SSE_PM equ 0x1000
145	SSE_FZ equ 0x8000	145	SSE_FZ equ 0x8000
146		146
147	SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM)	147	SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM)
148		148
149	IRQ_PIC equ 0	149	IRQ_PIC equ 0
150	IRQ_APIC equ 1	150	IRQ_APIC equ 1
151		151
152	struct TSS	152	struct TSS
153	_back rw 2	153	_back rw 2
154	_esp0 rd 1	154	_esp0 rd 1
155	_ss0 rw 2	155	_ss0 rw 2
156	_esp1 rd 1	156	_esp1 rd 1
157	_ss1 rw 2	157	_ss1 rw 2
158	_esp2 rd 1	158	_esp2 rd 1
159	_ss2 rw 2	159	_ss2 rw 2
160	_cr3 rd 1	160	_cr3 rd 1
161	_eip rd 1	161	_eip rd 1
162	_eflags rd 1	162	_eflags rd 1
163	_eax rd 1	163	_eax rd 1
164	_ecx rd 1	164	_ecx rd 1
165	_edx rd 1	165	_edx rd 1
166	_ebx rd 1	166	_ebx rd 1
167	_esp rd 1	167	_esp rd 1
168	_ebp rd 1	168	_ebp rd 1
169	_esi rd 1	169	_esi rd 1
170	_edi rd 1	170	_edi rd 1
171	_es rw 2	171	_es rw 2
172	_cs rw 2	172	_cs rw 2
173	_ss rw 2	173	_ss rw 2
174	_ds rw 2	174	_ds rw 2
175	_fs rw 2	175	_fs rw 2
176	_gs rw 2	176	_gs rw 2
177	_ldt rw 2	177	_ldt rw 2
178	_trap rw 1	178	_trap rw 1
179	_io rw 1	179	_io rw 1
180	rb 24	180	rb 24
181	_io_map_0 rb 4096	181	_io_map_0 rb 4096
182	_io_map_1 rb 4096	182	_io_map_1 rb 4096
183	ends	183	ends
184		184
185	DRIVE_DATA_SIZE equ 16	185	DRIVE_DATA_SIZE equ 16
186		186
187	OS_BASE equ 0x80000000	187	OS_BASE equ 0x80000000
188		188
189	window_data equ (OS_BASE+0x0001000)	189	window_data equ (OS_BASE+0x0001000)
190		190
191	CURRENT_TASK equ (OS_BASE+0x0003000)	191	CURRENT_TASK equ (OS_BASE+0x0003000)
192	TASK_COUNT equ (OS_BASE+0x0003004)	192	TASK_COUNT equ (OS_BASE+0x0003004)
193	TASK_BASE equ (OS_BASE+0x0003010)	193	TASK_BASE equ (OS_BASE+0x0003010)
194	TASK_DATA equ (OS_BASE+0x0003020)	194	TASK_DATA equ (OS_BASE+0x0003020)
195	TASK_EVENT equ (OS_BASE+0x0003020)	195	TASK_EVENT equ (OS_BASE+0x0003020)
196		196
197	CDDataBuf equ (OS_BASE+0x0005000)	197	CDDataBuf equ (OS_BASE+0x0005000)
198		198
199	;unused 0x6000 - 0x8fff	199	;unused 0x6000 - 0x8fff
200		200
201	BOOT_VARS equ (OS_BASE) ;0x9000	201	BOOT_VARS equ (OS_BASE) ;0x9000
202		202
203	idts equ (OS_BASE+0x000B100)	203	idts equ (OS_BASE+0x000B10

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(root)/kernel/branches/Kolibri-acpi/const.inc – Rev 6240 → 6252