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200 | struct sumo_vid_mapping_table *vid_mapping_table, |
200 | struct sumo_vid_mapping_table *vid_mapping_table, |
201 | ATOM_AVAILABLE_SCLK_LIST *table); |
201 | ATOM_AVAILABLE_SCLK_LIST *table); |
202 | u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, |
202 | u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, |
203 | struct sumo_vid_mapping_table *vid_mapping_table, |
203 | struct sumo_vid_mapping_table *vid_mapping_table, |
204 | u32 vid_2bit); |
204 | u32 vid_2bit); |
205 | u32 sumo_convert_vid7_to_vid2(struct radeon_device *rdev, |
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206 | struct sumo_vid_mapping_table *vid_mapping_table, |
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207 | u32 vid_7bit); |
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208 | u32 sumo_get_sleep_divider_from_id(u32 id); |
205 | u32 sumo_get_sleep_divider_from_id(u32 id); |
209 | u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, |
206 | u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, |
210 | u32 sclk, |
207 | u32 sclk, |
211 | u32 min_sclk_in_sr); |
208 | u32 min_sclk_in_sr); |