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| Rev 1179 | Rev 1221 | ||
|---|---|---|---|
| Line 214... | Line 214... | ||
| 214 | #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) |
214 | #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) |
| 215 | #define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) |
215 | #define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) |
| 216 | #define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) |
216 | #define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) |
| 217 | #define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) |
217 | #define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) |
| Line 218... | Line 218... | ||
| 218 | 218 | ||
| - | 219 | /* Registers */ |
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| - | 220 | #define R_0000F8_CONFIG_MEMSIZE 0x0000F8 |
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| - | 221 | #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 222 | #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 223 | #define C_0000F8_CONFIG_MEMSIZE 0x00000000 |
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| - | 224 | #define R_000134_HDP_FB_LOCATION 0x000134 |
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| - | 225 | #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) |
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| - | 226 | #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) |
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| - | 227 | #define C_000134_HDP_FB_START 0xFFFF0000 |
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| - | 228 | #define R_000300_VGA_RENDER_CONTROL 0x000300 |
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| - | 229 | #define S_000300_VGA_BLINK_RATE(x) (((x) & 0x1F) << 0) |
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| - | 230 | #define G_000300_VGA_BLINK_RATE(x) (((x) >> 0) & 0x1F) |
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| - | 231 | #define C_000300_VGA_BLINK_RATE 0xFFFFFFE0 |
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| - | 232 | #define S_000300_VGA_BLINK_MODE(x) (((x) & 0x3) << 5) |
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| - | 233 | #define G_000300_VGA_BLINK_MODE(x) (((x) >> 5) & 0x3) |
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| - | 234 | #define C_000300_VGA_BLINK_MODE 0xFFFFFF9F |
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| - | 235 | #define S_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) & 0x1) << 7) |
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| - | 236 | #define G_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) >> 7) & 0x1) |
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| - | 237 | #define C_000300_VGA_CURSOR_BLINK_INVERT 0xFFFFFF7F |
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| - | 238 | #define S_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) & 0x1) << 8) |
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| - | 239 | #define G_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) >> 8) & 0x1) |
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| - | 240 | #define C_000300_VGA_EXTD_ADDR_COUNT_ENABLE 0xFFFFFEFF |
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| - | 241 | #define S_000300_VGA_VSTATUS_CNTL(x) (((x) & 0x3) << 16) |
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| - | 242 | #define G_000300_VGA_VSTATUS_CNTL(x) (((x) >> 16) & 0x3) |
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| - | 243 | #define C_000300_VGA_VSTATUS_CNTL 0xFFFCFFFF |
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| - | 244 | #define S_000300_VGA_LOCK_8DOT(x) (((x) & 0x1) << 24) |
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| - | 245 | #define G_000300_VGA_LOCK_8DOT(x) (((x) >> 24) & 0x1) |
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| - | 246 | #define C_000300_VGA_LOCK_8DOT 0xFEFFFFFF |
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| - | 247 | #define S_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) & 0x1) << 25) |
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| - | 248 | #define G_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) >> 25) & 0x1) |
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| - | 249 | #define C_000300_VGAREG_LINECMP_COMPATIBILITY_SEL 0xFDFFFFFF |
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| - | 250 | #define R_000310_VGA_MEMORY_BASE_ADDRESS 0x000310 |
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| - | 251 | #define S_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 252 | #define G_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 253 | #define C_000310_VGA_MEMORY_BASE_ADDRESS 0x00000000 |
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| - | 254 | #define R_000328_VGA_HDP_CONTROL 0x000328 |
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| - | 255 | #define S_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) & 0x1) << 0) |
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| - | 256 | #define G_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) >> 0) & 0x1) |
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| - | 257 | #define C_000328_VGA_MEM_PAGE_SELECT_EN 0xFFFFFFFE |
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| - | 258 | #define S_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) & 0x1) << 8) |
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| - | 259 | #define G_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) >> 8) & 0x1) |
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| - | 260 | #define C_000328_VGA_RBBM_LOCK_DISABLE 0xFFFFFEFF |
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| - | 261 | #define S_000328_VGA_SOFT_RESET(x) (((x) & 0x1) << 16) |
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| - | 262 | #define G_000328_VGA_SOFT_RESET(x) (((x) >> 16) & 0x1) |
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| - | 263 | #define C_000328_VGA_SOFT_RESET 0xFFFEFFFF |
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| - | 264 | #define S_000328_VGA_TEST_RESET_CONTROL(x) (((x) & 0x1) << 24) |
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| - | 265 | #define G_000328_VGA_TEST_RESET_CONTROL(x) (((x) >> 24) & 0x1) |
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| - | 266 | #define C_000328_VGA_TEST_RESET_CONTROL 0xFEFFFFFF |
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| - | 267 | #define R_000330_D1VGA_CONTROL 0x000330 |
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| - | 268 | #define S_000330_D1VGA_MODE_ENABLE(x) (((x) & 0x1) << 0) |
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| - | 269 | #define G_000330_D1VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1) |
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| - | 270 | #define C_000330_D1VGA_MODE_ENABLE 0xFFFFFFFE |
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| - | 271 | #define S_000330_D1VGA_TIMING_SELECT(x) (((x) & 0x1) << 8) |
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| - | 272 | #define G_000330_D1VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1) |
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| - | 273 | #define C_000330_D1VGA_TIMING_SELECT 0xFFFFFEFF |
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| - | 274 | #define S_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9) |
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| - | 275 | #define G_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1) |
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| - | 276 | #define C_000330_D1VGA_SYNC_POLARITY_SELECT 0xFFFFFDFF |
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| - | 277 | #define S_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10) |
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| - | 278 | #define G_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1) |
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| - | 279 | #define C_000330_D1VGA_OVERSCAN_TIMING_SELECT 0xFFFFFBFF |
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| - | 280 | #define S_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16) |
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| - | 281 | #define G_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1) |
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| - | 282 | #define C_000330_D1VGA_OVERSCAN_COLOR_EN 0xFFFEFFFF |
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| - | 283 | #define S_000330_D1VGA_ROTATE(x) (((x) & 0x3) << 24) |
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| - | 284 | #define G_000330_D1VGA_ROTATE(x) (((x) >> 24) & 0x3) |
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| - | 285 | #define C_000330_D1VGA_ROTATE 0xFCFFFFFF |
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| - | 286 | #define R_000338_D2VGA_CONTROL 0x000338 |
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| - | 287 | #define S_000338_D2VGA_MODE_ENABLE(x) (((x) & 0x1) << 0) |
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| - | 288 | #define G_000338_D2VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1) |
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| - | 289 | #define C_000338_D2VGA_MODE_ENABLE 0xFFFFFFFE |
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| - | 290 | #define S_000338_D2VGA_TIMING_SELECT(x) (((x) & 0x1) << 8) |
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| - | 291 | #define G_000338_D2VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1) |
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| - | 292 | #define C_000338_D2VGA_TIMING_SELECT 0xFFFFFEFF |
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| - | 293 | #define S_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9) |
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| - | 294 | #define G_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1) |
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| - | 295 | #define C_000338_D2VGA_SYNC_POLARITY_SELECT 0xFFFFFDFF |
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| - | 296 | #define S_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10) |
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| - | 297 | #define G_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1) |
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| - | 298 | #define C_000338_D2VGA_OVERSCAN_TIMING_SELECT 0xFFFFFBFF |
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| - | 299 | #define S_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16) |
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| - | 300 | #define G_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1) |
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| - | 301 | #define C_000338_D2VGA_OVERSCAN_COLOR_EN 0xFFFEFFFF |
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| - | 302 | #define S_000338_D2VGA_ROTATE(x) (((x) & 0x3) << 24) |
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| - | 303 | #define G_000338_D2VGA_ROTATE(x) (((x) >> 24) & 0x3) |
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| - | 304 | #define C_000338_D2VGA_ROTATE 0xFCFFFFFF |
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| - | 305 | #define R_0007C0_CP_STAT 0x0007C0 |
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| - | 306 | #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) |
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| - | 307 | #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) |
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| - | 308 | #define C_0007C0_MRU_BUSY 0xFFFFFFFE |
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| - | 309 | #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) |
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| - | 310 | #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) |
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| - | 311 | #define C_0007C0_MWU_BUSY 0xFFFFFFFD |
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| - | 312 | #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) |
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| - | 313 | #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) |
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| - | 314 | #define C_0007C0_RSIU_BUSY 0xFFFFFFFB |
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| - | 315 | #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) |
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| - | 316 | #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) |
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| - | 317 | #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 |
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| - | 318 | #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) |
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| - | 319 | #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) |
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| - | 320 | #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF |
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| - | 321 | #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) |
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| - | 322 | #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) |
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| - | 323 | #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF |
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| - | 324 | #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) |
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| - | 325 | #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) |
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| - | 326 | #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF |
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| - | 327 | #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) |
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| - | 328 | #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) |
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| - | 329 | #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF |
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| - | 330 | #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) |
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| - | 331 | #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) |
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| - | 332 | #define C_0007C0_CSI_BUSY 0xFFFFDFFF |
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| - | 333 | #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) |
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| - | 334 | #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) |
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| - | 335 | #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF |
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| - | 336 | #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) |
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| - | 337 | #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) |
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| - | 338 | #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF |
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| - | 339 | #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) |
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| - | 340 | #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) |
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| - | 341 | #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF |
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| - | 342 | #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) |
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| - | 343 | #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) |
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| - | 344 | #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF |
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| - | 345 | #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) |
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| - | 346 | #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) |
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| - | 347 | #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF |
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| - | 348 | #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) |
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| - | 349 | #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) |
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| - | 350 | #define C_0007C0_CP_BUSY 0x7FFFFFFF |
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| - | 351 | #define R_000E40_RBBM_STATUS 0x000E40 |
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| - | 352 | #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) |
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| - | 353 | #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) |
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| - | 354 | #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 |
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| - | 355 | #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) |
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| - | 356 | #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) |
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| - | 357 | #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF |
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| - | 358 | #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) |
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| - | 359 | #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) |
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| - | 360 | #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF |
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| - | 361 | #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) |
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| - | 362 | #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) |
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| - | 363 | #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF |
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| - | 364 | #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) |
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| - | 365 | #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) |
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| - | 366 | #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF |
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| - | 367 | #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) |
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| - | 368 | #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) |
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| - | 369 | #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF |
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| - | 370 | #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) |
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| - | 371 | #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) |
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| - | 372 | #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF |
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| - | 373 | #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) |
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| - | 374 | #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) |
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| - | 375 | #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF |
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| - | 376 | #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) |
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| - | 377 | #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) |
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| - | 378 | #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF |
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| - | 379 | #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) |
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| - | 380 | #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) |
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| - | 381 | #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF |
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| - | 382 | #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) |
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| - | 383 | #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) |
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| - | 384 | #define C_000E40_E2_BUSY 0xFFFDFFFF |
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| - | 385 | #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) |
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| - | 386 | #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) |
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| - | 387 | #define C_000E40_RB2D_BUSY 0xFFFBFFFF |
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| - | 388 | #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) |
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| - | 389 | #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) |
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| - | 390 | #define C_000E40_RB3D_BUSY 0xFFF7FFFF |
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| - | 391 | #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) |
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| - | 392 | #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) |
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| - | 393 | #define C_000E40_VAP_BUSY 0xFFEFFFFF |
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| - | 394 | #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) |
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| - | 395 | #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) |
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| - | 396 | #define C_000E40_RE_BUSY 0xFFDFFFFF |
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| - | 397 | #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) |
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| - | 398 | #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) |
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| - | 399 | #define C_000E40_TAM_BUSY 0xFFBFFFFF |
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| - | 400 | #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) |
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| - | 401 | #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) |
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| - | 402 | #define C_000E40_TDM_BUSY 0xFF7FFFFF |
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| - | 403 | #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) |
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| - | 404 | #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) |
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| - | 405 | #define C_000E40_PB_BUSY 0xFEFFFFFF |
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| - | 406 | #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) |
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| - | 407 | #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) |
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| - | 408 | #define C_000E40_TIM_BUSY 0xFDFFFFFF |
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| - | 409 | #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) |
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| - | 410 | #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) |
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| - | 411 | #define C_000E40_GA_BUSY 0xFBFFFFFF |
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| - | 412 | #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) |
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| - | 413 | #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) |
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| - | 414 | #define C_000E40_CBA2D_BUSY 0xF7FFFFFF |
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| - | 415 | #define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28) |
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| - | 416 | #define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1) |
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| - | 417 | #define C_000E40_RBBM_HIBUSY 0xEFFFFFFF |
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| - | 418 | #define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29) |
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| - | 419 | #define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1) |
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| - | 420 | #define C_000E40_SKID_CFBUSY 0xDFFFFFFF |
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| - | 421 | #define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30) |
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| - | 422 | #define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1) |
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| - | 423 | #define C_000E40_VAP_VF_BUSY 0xBFFFFFFF |
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| - | 424 | #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) |
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| - | 425 | #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) |
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| - | 426 | #define C_000E40_GUI_ACTIVE 0x7FFFFFFF |
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| - | 427 | #define R_006080_D1CRTC_CONTROL 0x006080 |
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| - | 428 | #define S_006080_D1CRTC_MASTER_EN(x) (((x) & 0x1) << 0) |
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| - | 429 | #define G_006080_D1CRTC_MASTER_EN(x) (((x) >> 0) & 0x1) |
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| - | 430 | #define C_006080_D1CRTC_MASTER_EN 0xFFFFFFFE |
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| - | 431 | #define S_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4) |
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| - | 432 | #define G_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1) |
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| - | 433 | #define C_006080_D1CRTC_SYNC_RESET_SEL 0xFFFFFFEF |
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| - | 434 | #define S_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8) |
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| - | 435 | #define G_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3) |
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| - | 436 | #define C_006080_D1CRTC_DISABLE_POINT_CNTL 0xFFFFFCFF |
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| - | 437 | #define S_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16) |
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| - | 438 | #define G_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1) |
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| - | 439 | #define C_006080_D1CRTC_CURRENT_MASTER_EN_STATE 0xFFFEFFFF |
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| - | 440 | #define S_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24) |
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| - | 441 | #define G_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1) |
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| - | 442 | #define C_006080_D1CRTC_DISP_READ_REQUEST_DISABLE 0xFEFFFFFF |
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| - | 443 | #define R_0060E8_D1CRTC_UPDATE_LOCK 0x0060E8 |
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| - | 444 | #define S_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0) |
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| - | 445 | #define G_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1) |
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| - | 446 | #define C_0060E8_D1CRTC_UPDATE_LOCK 0xFFFFFFFE |
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| - | 447 | #define R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x006110 |
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| - | 448 | #define S_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 449 | #define G_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 450 | #define C_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x00000000 |
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| - | 451 | #define R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x006118 |
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| - | 452 | #define S_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 453 | #define G_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 454 | #define C_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x00000000 |
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| - | 455 | #define R_006880_D2CRTC_CONTROL 0x006880 |
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| - | 456 | #define S_006880_D2CRTC_MASTER_EN(x) (((x) & 0x1) << 0) |
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| - | 457 | #define G_006880_D2CRTC_MASTER_EN(x) (((x) >> 0) & 0x1) |
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| - | 458 | #define C_006880_D2CRTC_MASTER_EN 0xFFFFFFFE |
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| - | 459 | #define S_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4) |
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| - | 460 | #define G_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1) |
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| - | 461 | #define C_006880_D2CRTC_SYNC_RESET_SEL 0xFFFFFFEF |
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| - | 462 | #define S_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8) |
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| - | 463 | #define G_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3) |
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| - | 464 | #define C_006880_D2CRTC_DISABLE_POINT_CNTL 0xFFFFFCFF |
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| - | 465 | #define S_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16) |
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| - | 466 | #define G_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1) |
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| - | 467 | #define C_006880_D2CRTC_CURRENT_MASTER_EN_STATE 0xFFFEFFFF |
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| - | 468 | #define S_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24) |
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| - | 469 | #define G_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1) |
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| - | 470 | #define C_006880_D2CRTC_DISP_READ_REQUEST_DISABLE 0xFEFFFFFF |
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| - | 471 | #define R_0068E8_D2CRTC_UPDATE_LOCK 0x0068E8 |
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| - | 472 | #define S_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0) |
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| - | 473 | #define G_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1) |
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| - | 474 | #define C_0068E8_D2CRTC_UPDATE_LOCK 0xFFFFFFFE |
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| - | 475 | #define R_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS 0x006910 |
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| - | 476 | #define S_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 477 | #define G_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 478 | #define C_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS 0x00000000 |
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| - | 479 | #define R_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS 0x006918 |
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| - | 480 | #define S_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 481 | #define G_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 482 | #define C_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS 0x00000000 |
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| - | 483 | ||
| - | 484 | ||
| - | 485 | #define R_000001_MC_FB_LOCATION 0x000001 |
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| - | 486 | #define S_000001_MC_FB_START(x) (((x) & 0xFFFF) << 0) |
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| - | 487 | #define G_000001_MC_FB_START(x) (((x) >> 0) & 0xFFFF) |
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| - | 488 | #define C_000001_MC_FB_START 0xFFFF0000 |
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| - | 489 | #define S_000001_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) |
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| - | 490 | #define G_000001_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) |
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| - | 491 | #define C_000001_MC_FB_TOP 0x0000FFFF |
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| - | 492 | #define R_000002_MC_AGP_LOCATION 0x000002 |
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| - | 493 | #define S_000002_MC_AGP_START(x) (((x) & 0xFFFF) << 0) |
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| - | 494 | #define G_000002_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) |
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| - | 495 | #define C_000002_MC_AGP_START 0xFFFF0000 |
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| - | 496 | #define S_000002_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) |
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| - | 497 | #define G_000002_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) |
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| - | 498 | #define C_000002_MC_AGP_TOP 0x0000FFFF |
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| - | 499 | #define R_000003_MC_AGP_BASE 0x000003 |
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| - | 500 | #define S_000003_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) |
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| - | 501 | #define G_000003_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) |
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| - | 502 | #define C_000003_AGP_BASE_ADDR 0x00000000 |
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| - | 503 | #define R_000004_MC_AGP_BASE_2 0x000004 |
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| - | 504 | #define S_000004_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) |
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| - | 505 | #define G_000004_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) |
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| Line -... | Line 506... | ||
| - | 506 | #define C_000004_AGP_BASE_ADDR_2 0xFFFFFFF0 |
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| - | 507 | ||
| - | 508 | ||
| - | 509 | #define R_00000F_CP_DYN_CNTL 0x00000F |
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| - | 510 | #define S_00000F_CP_FORCEON(x) (((x) & 0x1) << 0) |
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| - | 511 | #define G_00000F_CP_FORCEON(x) (((x) >> 0) & 0x1) |
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| - | 512 | #define C_00000F_CP_FORCEON 0xFFFFFFFE |
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| - | 513 | #define S_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) |
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| - | 514 | #define G_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) |
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| - | 515 | #define C_00000F_CP_MAX_DYN_STOP_LAT 0xFFFFFFFD |
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| - | 516 | #define S_00000F_CP_CLOCK_STATUS(x) (((x) & 0x1) << 2) |
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| - | 517 | #define G_00000F_CP_CLOCK_STATUS(x) (((x) >> 2) & 0x1) |
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| - | 518 | #define C_00000F_CP_CLOCK_STATUS 0xFFFFFFFB |
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| - | 519 | #define S_00000F_CP_PROG_SHUTOFF(x) (((x) & 0x1) << 3) |
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| - | 520 | #define G_00000F_CP_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) |
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| - | 521 | #define C_00000F_CP_PROG_SHUTOFF 0xFFFFFFF7 |
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| - | 522 | #define S_00000F_CP_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) |
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| - | 523 | #define G_00000F_CP_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) |
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| - | 524 | #define C_00000F_CP_PROG_DELAY_VALUE 0xFFFFF00F |
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| - | 525 | #define S_00000F_CP_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) |
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| - | 526 | #define G_00000F_CP_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) |
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| - | 527 | #define C_00000F_CP_LOWER_POWER_IDLE 0xFFF00FFF |
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| - | 528 | #define S_00000F_CP_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) |
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| - | 529 | #define G_00000F_CP_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) |
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| - | 530 | #define C_00000F_CP_LOWER_POWER_IGNORE 0xFFEFFFFF |
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| - | 531 | #define S_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) |
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| - | 532 | #define G_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) |
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| - | 533 | #define C_00000F_CP_NORMAL_POWER_IGNORE 0xFFDFFFFF |
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| - | 534 | #define S_00000F_SPARE(x) (((x) & 0x3) << 22) |
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| - | 535 | #define G_00000F_SPARE(x) (((x) >> 22) & 0x3) |
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| - | 536 | #define C_00000F_SPARE 0xFF3FFFFF |
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| - | 537 | #define S_00000F_CP_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) |
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| - | 538 | #define G_00000F_CP_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) |
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| - | 539 | #define C_00000F_CP_NORMAL_POWER_BUSY 0x00FFFFFF |
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| - | 540 | #define R_000011_E2_DYN_CNTL 0x000011 |
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| - | 541 | #define S_000011_E2_FORCEON(x) (((x) & 0x1) << 0) |
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| - | 542 | #define G_000011_E2_FORCEON(x) (((x) >> 0) & 0x1) |
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| - | 543 | #define C_000011_E2_FORCEON 0xFFFFFFFE |
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| - | 544 | #define S_000011_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) |
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| - | 545 | #define G_000011_E2_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) |
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| - | 546 | #define C_000011_E2_MAX_DYN_STOP_LAT 0xFFFFFFFD |
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| - | 547 | #define S_000011_E2_CLOCK_STATUS(x) (((x) & 0x1) << 2) |
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| - | 548 | #define G_000011_E2_CLOCK_STATUS(x) (((x) >> 2) & 0x1) |
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| - | 549 | #define C_000011_E2_CLOCK_STATUS 0xFFFFFFFB |
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| - | 550 | #define S_000011_E2_PROG_SHUTOFF(x) (((x) & 0x1) << 3) |
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| - | 551 | #define G_000011_E2_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) |
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| - | 552 | #define C_000011_E2_PROG_SHUTOFF 0xFFFFFFF7 |
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| - | 553 | #define S_000011_E2_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) |
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| - | 554 | #define G_000011_E2_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) |
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| - | 555 | #define C_000011_E2_PROG_DELAY_VALUE 0xFFFFF00F |
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| - | 556 | #define S_000011_E2_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) |
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| - | 557 | #define G_000011_E2_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) |
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| - | 558 | #define C_000011_E2_LOWER_POWER_IDLE 0xFFF00FFF |
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| - | 559 | #define S_000011_E2_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) |
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| - | 560 | #define G_000011_E2_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) |
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| - | 561 | #define C_000011_E2_LOWER_POWER_IGNORE 0xFFEFFFFF |
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| - | 562 | #define S_000011_E2_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) |
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| - | 563 | #define G_000011_E2_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) |
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| - | 564 | #define C_000011_E2_NORMAL_POWER_IGNORE 0xFFDFFFFF |
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| - | 565 | #define S_000011_SPARE(x) (((x) & 0x3) << 22) |
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| - | 566 | #define G_000011_SPARE(x) (((x) >> 22) & 0x3) |
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| - | 567 | #define C_000011_SPARE 0xFF3FFFFF |
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| - | 568 | #define S_000011_E2_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) |
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| - | 569 | #define G_000011_E2_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) |
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| - | 570 | #define C_000011_E2_NORMAL_POWER_BUSY 0x00FFFFFF |
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| - | 571 | #define R_000013_IDCT_DYN_CNTL 0x000013 |
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| - | 572 | #define S_000013_IDCT_FORCEON(x) (((x) & 0x1) << 0) |
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| - | 573 | #define G_000013_IDCT_FORCEON(x) (((x) >> 0) & 0x1) |
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| - | 574 | #define C_000013_IDCT_FORCEON 0xFFFFFFFE |
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| - | 575 | #define S_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) |
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| - | 576 | #define G_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) |
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| - | 577 | #define C_000013_IDCT_MAX_DYN_STOP_LAT 0xFFFFFFFD |
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| - | 578 | #define S_000013_IDCT_CLOCK_STATUS(x) (((x) & 0x1) << 2) |
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| - | 579 | #define G_000013_IDCT_CLOCK_STATUS(x) (((x) >> 2) & 0x1) |
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| - | 580 | #define C_000013_IDCT_CLOCK_STATUS 0xFFFFFFFB |
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| - | 581 | #define S_000013_IDCT_PROG_SHUTOFF(x) (((x) & 0x1) << 3) |
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| - | 582 | #define G_000013_IDCT_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) |
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| - | 583 | #define C_000013_IDCT_PROG_SHUTOFF 0xFFFFFFF7 |
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| - | 584 | #define S_000013_IDCT_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) |
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| - | 585 | #define G_000013_IDCT_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) |
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| - | 586 | #define C_000013_IDCT_PROG_DELAY_VALUE 0xFFFFF00F |
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| - | 587 | #define S_000013_IDCT_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) |
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| - | 588 | #define G_000013_IDCT_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) |
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| - | 589 | #define C_000013_IDCT_LOWER_POWER_IDLE 0xFFF00FFF |
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| - | 590 | #define S_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) |
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| - | 591 | #define G_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) |
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| - | 592 | #define C_000013_IDCT_LOWER_POWER_IGNORE 0xFFEFFFFF |
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| - | 593 | #define S_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) |
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| - | 594 | #define G_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) |
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| - | 595 | #define C_000013_IDCT_NORMAL_POWER_IGNORE 0xFFDFFFFF |
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| - | 596 | #define S_000013_SPARE(x) (((x) & 0x3) << 22) |
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| - | 597 | #define G_000013_SPARE(x) (((x) >> 22) & 0x3) |
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| - | 598 | #define C_000013_SPARE 0xFF3FFFFF |
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| - | 599 | #define S_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) |
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| - | 600 | #define G_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) |
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| - | 601 | #define C_000013_IDCT_NORMAL_POWER_BUSY 0x00FFFFFF |
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