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Rev 1246 Rev 1268
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	return -1;
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	return -1;
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}
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}
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void rv515_vga_render_disable(struct radeon_device *rdev)
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void rv515_vga_render_disable(struct radeon_device *rdev)
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{
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	WREG32(R_000330_D1VGA_CONTROL, 0);
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{
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	WREG32(R_000338_D2VGA_CONTROL, 0);
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	WREG32(R_000300_VGA_RENDER_CONTROL,
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	WREG32(R_000300_VGA_RENDER_CONTROL,
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		RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
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		RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
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}
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}
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		DRM_INFO("GPU not posted. posting now...\n");
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		DRM_INFO("GPU not posted. posting now...\n");
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		atom_asic_init(rdev->mode_info.atom_context);
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		atom_asic_init(rdev->mode_info.atom_context);
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	}
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	}
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	/* Initialize clocks */
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	/* Initialize clocks */
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	radeon_get_clock_info(rdev->ddev);
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	radeon_get_clock_info(rdev->ddev);
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	/* Initialize power management */
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	radeon_pm_init(rdev);
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	/* Get vram informations */
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	/* Get vram informations */
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	rv515_vram_info(rdev);
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	rv515_vram_info(rdev);
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	/* Initialize memory controller (also test AGP) */
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	/* Initialize memory controller (also test AGP) */
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	r = r420_mc_init(rdev);
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	r = r420_mc_init(rdev);
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    dbgprintf("mc vram location %x\n", rdev->mc.vram_location);
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    dbgprintf("mc vram location %x\n", rdev->mc.vram_location);