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Rev 3192 Rev 3764
Line 50... Line 50...
50
{
50
{
51
	0,
51
	0,
52
	AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
52
	AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
53
};
53
};
Line -... Line 54...
-
 
54
 
-
 
55
static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc)
-
 
56
{
-
 
57
	if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK)
-
 
58
		return true;
-
 
59
	else
-
 
60
		return false;
-
 
61
}
-
 
62
 
-
 
63
static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc)
-
 
64
{
-
 
65
	u32 pos1, pos2;
-
 
66
 
-
 
67
	pos1 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]);
-
 
68
	pos2 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]);
-
 
69
 
-
 
70
	if (pos1 != pos2)
-
 
71
		return true;
-
 
72
	else
-
 
73
		return false;
-
 
74
}
-
 
75
 
-
 
76
/**
-
 
77
 * avivo_wait_for_vblank - vblank wait asic callback.
-
 
78
 *
-
 
79
 * @rdev: radeon_device pointer
-
 
80
 * @crtc: crtc to wait for vblank on
-
 
81
 *
-
 
82
 * Wait for vblank on the requested crtc (r5xx-r7xx).
54
 
83
 */
55
void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)
84
void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)
56
{
85
{
Line 57... Line 86...
57
	int i;
86
	unsigned i = 0;
58
 
87
 
Line 59... Line 88...
59
	if (crtc >= rdev->num_crtc)
88
	if (crtc >= rdev->num_crtc)
-
 
89
		return;
-
 
90
 
-
 
91
	if (!(RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN))
-
 
92
		return;
-
 
93
 
-
 
94
	/* depending on when we hit vblank, we may be close to active; if so,
-
 
95
	 * wait for another frame.
-
 
96
	 */
-
 
97
	while (avivo_is_in_vblank(rdev, crtc)) {
-
 
98
		if (i++ % 100 == 0) {
-
 
99
			if (!avivo_is_counter_moving(rdev, crtc))
-
 
100
				break;
60
		return;
101
		}
-
 
102
	}
61
 
103
 
62
	if (RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN) {
104
	while (!avivo_is_in_vblank(rdev, crtc)) {
63
		for (i = 0; i < rdev->usec_timeout; i++) {
-
 
64
			if (!(RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK))
105
		if (i++ % 100 == 0) {
65
				break;
106
			if (!avivo_is_counter_moving(rdev, crtc))
66
			udelay(1);
107
				break;
67
		}
108
		}
68
		for (i = 0; i < rdev->usec_timeout; i++) {
109
		for (i = 0; i < rdev->usec_timeout; i++) {
Line 710... Line 751...
710
		dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);
751
		dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);
711
		return r;
752
		return r;
712
	}
753
	}
Line 713... Line 754...
713
 
754
 
-
 
755
	/* Enable IRQ */
-
 
756
	if (!rdev->irq.installed) {
-
 
757
		r = radeon_irq_kms_init(rdev);
-
 
758
		if (r)
-
 
759
			return r;
-
 
760
	}
714
	/* Enable IRQ */
761
 
715
	rs600_irq_set(rdev);
762
	rs600_irq_set(rdev);
716
	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
763
	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
717
	/* 1M ring buffer */
764
	/* 1M ring buffer */
718
	r = r100_cp_init(rdev, 1024 * 1024);
765
	r = r100_cp_init(rdev, 1024 * 1024);
Line 776... Line 823...
776
	rs600_debugfs(rdev);
823
	rs600_debugfs(rdev);
777
	/* Fence driver */
824
	/* Fence driver */
778
	r = radeon_fence_driver_init(rdev);
825
	r = radeon_fence_driver_init(rdev);
779
	if (r)
826
	if (r)
780
		return r;
827
		return r;
781
	r = radeon_irq_kms_init(rdev);
-
 
782
	if (r)
-
 
783
		return r;
-
 
784
	/* Memory manager */
828
	/* Memory manager */
785
	r = radeon_bo_init(rdev);
829
	r = radeon_bo_init(rdev);
786
	if (r)
830
	if (r)
787
		return r;
831
		return r;
788
	r = rs600_gart_init(rdev);
832
	r = rs600_gart_init(rdev);