Rev 1268 | Rev 1313 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1268 | Rev 1275 | ||
|---|---|---|---|
| Line 80... | Line 80... | ||
| 80 | 80 | ||
| Line 81... | Line 81... | ||
| 81 | if (ASIC_IS_AVIVO(rdev)) |
81 | if (ASIC_IS_AVIVO(rdev)) |
| 82 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
82 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
| 83 | else { |
83 | else { |
| 84 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; |
84 | radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_location; |
| 85 | /* offset is from DISP(2)_BASE_ADDRESS */ |
85 | /* offset is from DISP(2)_BASE_ADDRESS */ |
| 86 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
86 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
| 87 | } |
87 | } |
| Line 88... | Line 88... | ||
| 88 | 88 | ||
| Line 146... | Line 146... | ||
| 146 | if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) |
146 | if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) |
| 147 | y *= 2; |
147 | y *= 2; |
| 148 | 148 | ||
| Line 149... | Line 149... | ||
| 149 | WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset, |
149 | WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset, |
| 150 | (RADEON_CUR_LOCK | (hot_x << 16) | (hot_y << 16))); |
150 | (RADEON_CUR_LOCK | (hot_x << 16) | hot_y )); |
| 151 | WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, |
151 | WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, |
| 152 | (RADEON_CUR_LOCK | (x << 16) | y)); |
152 | (RADEON_CUR_LOCK | (x << 16) | y)); |
| Line 153... | Line 153... | ||
| 153 | 153 | ||
| 154 | /* offset is from DISP(2)_BASE_ADDRESS */ |
154 | /* offset is from DISP(2)_BASE_ADDRESS */ |