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Rev 1403 | Rev 1404 | ||
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Line 27... | Line 27... | ||
27 | int r; |
27 | int r; |
28 | 28 | ||
Line 29... | Line 29... | ||
29 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
29 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
Line 30... | Line 30... | ||
30 | 30 | ||
31 | r = radeon_object_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
- | |
32 | false, |
31 | r = radeon_bo_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
33 | RADEON_GEM_DOMAIN_VRAM, |
- | |
Line 34... | Line 32... | ||
34 | false, &cursor->robj); |
32 | false, RADEON_GEM_DOMAIN_VRAM, &cursor->robj); |
35 | 33 | ||
Line -... | Line 34... | ||
- | 34 | if (unlikely(r != 0)) |
|
- | 35 | return r; |
|
- | 36 | ||
- | 37 | r = radeon_bo_reserve(cursor->robj, false); |
|
36 | if (unlikely(r != 0)) |
38 | if (unlikely(r != 0)) |
- | 39 | return r; |
|
- | 40 | ||
Line 37... | Line 41... | ||
37 | return r; |
41 | r = radeon_bo_pin(cursor->robj, RADEON_GEM_DOMAIN_VRAM, NULL); |
38 | 42 | if (unlikely(r != 0)) |
|
39 | radeon_object_pin(cursor->robj, TTM_PL_FLAG_VRAM, NULL); |
43 | return r; |
40 | 44 | ||
41 | r = radeon_object_kmap(cursor->robj, &bits); |
45 | r = radeon_bo_kmap(cursor->robj, (void**)&bits); |
Line 55... | Line 59... | ||
55 | } |
59 | } |
56 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
60 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
57 | *bits++ = 0; |
61 | *bits++ = 0; |
58 | 62 | ||
Line 59... | Line 63... | ||
59 | radeon_object_kunmap(cursor->robj); |
63 | radeon_bo_kunmap(cursor->robj); |
Line 60... | Line 64... | ||
60 | 64 | ||
Line 61... | Line 65... | ||
61 | // cursor->header.destroy = destroy_cursor; |
65 | // cursor->header.destroy = destroy_cursor; |
62 | 66 | ||
Line 63... | Line 67... | ||
63 | return 0; |
67 | return 0; |
64 | }; |
68 | }; |
65 | 69 | ||
66 | void fini_cursor(cursor_t *cursor) |
70 | void fini_cursor(cursor_t *cursor) |
67 | { |
71 | { |
68 | list_del(&cursor->list); |
72 | list_del(&cursor->list); |
69 | radeon_object_unpin(cursor->robj); |
73 | radeon_bo_unpin(cursor->robj); |
Line 98... | Line 102... | ||
98 | 102 | ||
Line 99... | Line 103... | ||
99 | old = rdisplay->cursor; |
103 | old = rdisplay->cursor; |
Line 100... | Line 104... | ||
100 | 104 | ||
101 | rdisplay->cursor = cursor; |
105 | rdisplay->cursor = cursor; |
Line 102... | Line 106... | ||
102 | // gpu_addr = cursor->robj->gpu_addr; |
106 | gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
103 | 107 | ||
104 | if (ASIC_IS_AVIVO(rdev)) |
108 | if (ASIC_IS_AVIVO(rdev)) |
105 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr); |
109 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr); |
Line 147... | Line 151... | ||
147 | radeon_lock_cursor(true); |
151 | radeon_lock_cursor(true); |
148 | if (ASIC_IS_AVIVO(rdev)) |
152 | if (ASIC_IS_AVIVO(rdev)) |
149 | { |
153 | { |
150 | int w = 32; |
154 | int w = 32; |
151 | int i = 0; |
- | |
Line 152... | Line 155... | ||
152 | 155 | ||
153 | WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y); |
156 | WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y); |
154 | WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y); |
157 | WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y); |
155 | WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31); |
158 | WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31); |
- | 159 | } else { |
|
156 | } else { |
160 | |
- | 161 | uint32_t gpu_addr; |
|
- | 162 | int xorg =0, yorg=0; |
|
- | 163 | ||
- | 164 | x = x - hot_x; |
|
- | 165 | y = y - hot_y; |
|
- | 166 | ||
- | 167 | if( x < 0 ) |
|
- | 168 | { |
|
- | 169 | xorg = -x + 1; |
|
- | 170 | x = 0; |
|
- | 171 | } |
|
- | 172 | ||
- | 173 | if( y < 0 ) |
|
- | 174 | { |
|
- | 175 | yorg = -hot_y + 1; |
|
- | 176 | y = 0; |
|
Line 157... | Line 177... | ||
157 | uint32_t gpu_addr; |
177 | }; |
158 | 178 | ||
159 | WREG32(RADEON_CUR_HORZ_VERT_OFF, |
179 | WREG32(RADEON_CUR_HORZ_VERT_OFF, |
160 | (RADEON_CUR_LOCK | (hot_x << 16) | hot_y )); |
180 | (RADEON_CUR_LOCK | (xorg << 16) | yorg )); |
Line 161... | Line 181... | ||
161 | WREG32(RADEON_CUR_HORZ_VERT_POSN, |
181 | WREG32(RADEON_CUR_HORZ_VERT_POSN, |
Line 162... | Line 182... | ||
162 | (RADEON_CUR_LOCK | (x << 16) | y)); |
182 | (RADEON_CUR_LOCK | (x << 16) | y)); |
163 | 183 | ||
164 | // gpu_addr = cursor->robj->gpu_addr; |
184 | gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
165 | 185 | ||
166 | /* offset is from DISP(2)_BASE_ADDRESS */ |
186 | /* offset is from DISP(2)_BASE_ADDRESS */ |
167 | WREG32(RADEON_CUR_OFFSET, |
187 | WREG32(RADEON_CUR_OFFSET, |
Line 168... | Line 188... | ||
168 | (gpu_addr - rdev->mc.vram_location + (hot_y * 256))); |
188 | (gpu_addr - rdev->mc.vram_location + (yorg * 256))); |
169 | } |
189 | } |
170 | radeon_lock_cursor(false); |
190 | radeon_lock_cursor(false); |
Line 171... | Line 191... | ||
171 | } |
191 | } |
172 | 192 | ||
173 | void __stdcall restore_cursor(int x, int y) |
193 | void __stdcall restore_cursor(int x, int y) |
Line 174... | Line 194... | ||
174 | { |
194 | { |
175 | }; |
195 | }; |
Line 214... | Line 234... | ||
214 | return retval; |
234 | return retval; |
215 | };><>><>><>><>><>><>><>>>>> |
235 | }; |
Line -... | Line 236... | ||
- | 236 | ||
- | 237 | ||
- | 238 | struct fb_info *framebuffer_alloc(size_t size, struct device *dev) |
|
- | 239 | { |
|
- | 240 | #define BYTES_PER_LONG (BITS_PER_LONG/8) |
|
- | 241 | #define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG)) |
|
- | 242 | int fb_info_size = sizeof(struct fb_info); |
|
- | 243 | struct fb_info *info; |
|
- | 244 | char *p; |
|
- | 245 | ||
- | 246 | if (size) |
|
- | 247 | fb_info_size += PADDING; |
|
- | 248 | ||
- | 249 | p = kzalloc(fb_info_size + size, GFP_KERNEL); |
|
- | 250 | ||
- | 251 | if (!p) |
|
- | 252 | return NULL; |
|
- | 253 | ||
- | 254 | info = (struct fb_info *) p; |
|
- | 255 | ||
- | 256 | if (size) |
|
- | 257 | info->par = p + fb_info_size; |
|
- | 258 | ||
- | 259 | return info; |
|
- | 260 | #undef PADDING |
|
- | 261 | #undef BYTES_PER_LONG |
|
- | 262 | } |
|
- | 263 | ||
- | 264 | void framebuffer_release(struct fb_info *info) |
|
- | 265 | { |