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1 | #include |
1 | #include |
2 | #include |
2 | #include |
3 | #include |
3 | #include |
4 | #include |
4 | #include |
5 | #include "radeon_drm.h" |
5 | #include "radeon_drm.h" |
6 | #include "radeon.h" |
6 | #include "radeon.h" |
7 | #include "radeon_object.h" |
7 | #include "radeon_object.h" |
8 | 8 | ||
9 | #define CURSOR_WIDTH 64 |
9 | #define CURSOR_WIDTH 64 |
10 | #define CURSOR_HEIGHT 64 |
10 | #define CURSOR_HEIGHT 64 |
11 | 11 | ||
12 | typedef struct tag_object kobj_t; |
12 | typedef struct tag_object kobj_t; |
13 | typedef struct tag_display display_t; |
13 | typedef struct tag_display display_t; |
14 | 14 | ||
15 | struct tag_object |
15 | struct tag_object |
16 | { |
16 | { |
17 | uint32_t magic; |
17 | uint32_t magic; |
18 | void *destroy; |
18 | void *destroy; |
19 | kobj_t *fd; |
19 | kobj_t *fd; |
20 | kobj_t *bk; |
20 | kobj_t *bk; |
21 | uint32_t pid; |
21 | uint32_t pid; |
22 | }; |
22 | }; |
23 | 23 | ||
24 | typedef struct |
24 | typedef struct |
25 | { |
25 | { |
26 | kobj_t header; |
26 | kobj_t header; |
27 | 27 | ||
28 | uint32_t *data; |
28 | uint32_t *data; |
29 | uint32_t hot_x; |
29 | uint32_t hot_x; |
30 | uint32_t hot_y; |
30 | uint32_t hot_y; |
31 | 31 | ||
32 | struct list_head list; |
32 | struct list_head list; |
33 | struct radeon_object *robj; |
33 | struct radeon_object *robj; |
34 | }cursor_t; |
34 | }cursor_t; |
35 | 35 | ||
36 | int init_cursor(cursor_t *cursor); |
36 | int init_cursor(cursor_t *cursor); |
37 | cursor_t* __stdcall select_cursor(cursor_t *cursor); |
37 | cursor_t* __stdcall select_cursor(cursor_t *cursor); |
38 | void __stdcall move_cursor(cursor_t *cursor, int x, int y); |
38 | void __stdcall move_cursor(cursor_t *cursor, int x, int y); |
39 | void __stdcall restore_cursor(int x, int y); |
39 | void __stdcall restore_cursor(int x, int y); |
40 | 40 | ||
41 | struct tag_display |
41 | struct tag_display |
42 | { |
42 | { |
43 | int x; |
43 | int x; |
44 | int y; |
44 | int y; |
45 | int width; |
45 | int width; |
46 | int height; |
46 | int height; |
47 | int bpp; |
47 | int bpp; |
48 | int vrefresh; |
48 | int vrefresh; |
49 | int pitch; |
49 | int pitch; |
50 | int lfb; |
50 | int lfb; |
51 | 51 | ||
52 | struct drm_device *ddev; |
52 | struct drm_device *ddev; |
53 | struct drm_crtc *crtc; |
53 | struct drm_crtc *crtc; |
54 | 54 | ||
55 | struct list_head cursors; |
55 | struct list_head cursors; |
56 | 56 | ||
57 | cursor_t *cursor; |
57 | cursor_t *cursor; |
58 | int (*init_cursor)(cursor_t*); |
58 | int (*init_cursor)(cursor_t*); |
59 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
59 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
60 | void (*show_cursor)(int show); |
60 | void (*show_cursor)(int show); |
61 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
61 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
62 | void (__stdcall *restore_cursor)(int x, int y); |
62 | void (__stdcall *restore_cursor)(int x, int y); |
63 | 63 | ||
64 | }; |
64 | }; |
65 | 65 | ||
- | 66 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); |
|
66 | 67 | ||
67 | static display_t *rdisplay; |
68 | static display_t *rdisplay; |
68 | 69 | ||
69 | 70 | ||
70 | void set_crtc(struct drm_crtc *crtc) |
71 | void set_crtc(struct drm_crtc *crtc) |
71 | { |
72 | { |
72 | ENTER(); |
73 | ENTER(); |
73 | rdisplay->crtc = crtc; |
74 | rdisplay->crtc = crtc; |
74 | LEAVE(); |
75 | LEAVE(); |
75 | } |
76 | } |
76 | 77 | ||
77 | int init_cursor(cursor_t *cursor) |
78 | int init_cursor(cursor_t *cursor) |
78 | { |
79 | { |
79 | struct radeon_device *rdev; |
80 | struct radeon_device *rdev; |
80 | 81 | ||
81 | uint32_t *bits; |
82 | uint32_t *bits; |
82 | uint32_t *src; |
83 | uint32_t *src; |
83 | 84 | ||
84 | int i,j; |
85 | int i,j; |
85 | int r; |
86 | int r; |
86 | 87 | ||
87 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
88 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
88 | 89 | ||
89 | r = radeon_object_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
90 | r = radeon_object_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
90 | false, |
91 | false, |
91 | RADEON_GEM_DOMAIN_VRAM, |
92 | RADEON_GEM_DOMAIN_VRAM, |
92 | false, &cursor->robj); |
93 | false, &cursor->robj); |
93 | 94 | ||
94 | if (unlikely(r != 0)) |
95 | if (unlikely(r != 0)) |
95 | return r; |
96 | return r; |
96 | 97 | ||
97 | radeon_object_pin(cursor->robj, RADEON_GEM_DOMAIN_VRAM, NULL); |
98 | radeon_object_pin(cursor->robj, RADEON_GEM_DOMAIN_VRAM, NULL); |
98 | 99 | ||
99 | r = radeon_object_kmap(cursor->robj, &bits); |
100 | r = radeon_object_kmap(cursor->robj, &bits); |
100 | if (r) { |
101 | if (r) { |
101 | DRM_ERROR("radeon: failed to map cursor (%d).\n", r); |
102 | DRM_ERROR("radeon: failed to map cursor (%d).\n", r); |
102 | return r; |
103 | return r; |
103 | }; |
104 | }; |
104 | 105 | ||
105 | src = cursor->data; |
106 | src = cursor->data; |
106 | 107 | ||
107 | for(i = 0; i < 32; i++) |
108 | for(i = 0; i < 32; i++) |
108 | { |
109 | { |
109 | for(j = 0; j < 32; j++) |
110 | for(j = 0; j < 32; j++) |
110 | *bits++ = *src++; |
111 | *bits++ = *src++; |
111 | for(j = 32; j < CURSOR_WIDTH; j++) |
112 | for(j = 32; j < CURSOR_WIDTH; j++) |
112 | *bits++ = 0; |
113 | *bits++ = 0; |
113 | } |
114 | } |
114 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
115 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
115 | *bits++ = 0; |
116 | *bits++ = 0; |
116 | 117 | ||
117 | radeon_object_kunmap(cursor->robj); |
118 | radeon_object_kunmap(cursor->robj); |
118 | 119 | ||
119 | return 0; |
120 | return 0; |
120 | }; |
121 | }; |
121 | 122 | ||
122 | static void radeon_show_cursor(struct drm_crtc *crtc) |
123 | static void radeon_show_cursor(struct drm_crtc *crtc) |
123 | { |
124 | { |
124 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
125 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
125 | struct radeon_device *rdev = crtc->dev->dev_private; |
126 | struct radeon_device *rdev = crtc->dev->dev_private; |
126 | 127 | ||
127 | if (ASIC_IS_AVIVO(rdev)) { |
128 | if (ASIC_IS_AVIVO(rdev)) { |
128 | WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); |
129 | WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); |
129 | WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | |
130 | WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | |
130 | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); |
131 | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); |
131 | } else { |
132 | } else { |
132 | switch (radeon_crtc->crtc_id) { |
133 | switch (radeon_crtc->crtc_id) { |
133 | case 0: |
134 | case 0: |
134 | WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); |
135 | WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); |
135 | break; |
136 | break; |
136 | case 1: |
137 | case 1: |
137 | WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); |
138 | WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); |
138 | break; |
139 | break; |
139 | default: |
140 | default: |
140 | return; |
141 | return; |
141 | } |
142 | } |
142 | 143 | ||
143 | WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN | |
144 | WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN | |
144 | (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)), |
145 | (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)), |
145 | ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK)); |
146 | ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK)); |
146 | } |
147 | } |
147 | } |
148 | } |
148 | 149 | ||
149 | int pre_init_display(struct radeon_device *rdev) |
- | |
150 | { |
- | |
151 | cursor_t *cursor; |
- | |
152 | - | ||
153 | ENTER(); |
- | |
154 | - | ||
155 | rdisplay = GetDisplay(); |
- | |
156 | - | ||
157 | rdisplay->ddev = rdev->ddev; |
- | |
158 | - | ||
159 | list_for_each_entry(cursor, &rdisplay->cursors, list) |
- | |
160 | { |
- | |
161 | init_cursor(cursor); |
- | |
162 | }; |
- | |
163 | - | ||
164 | LEAVE(); |
- | |
165 | - | ||
166 | return 1; |
- | |
167 | }; |
- | |
168 | - | ||
169 | int post_init_display(struct radeon_device *rdev) |
- | |
170 | { |
- | |
171 | cursor_t *cursor; |
- | |
172 | - | ||
173 | ENTER(); |
- | |
174 | - | ||
175 | select_cursor(rdisplay->cursor); |
- | |
176 | - | ||
177 | radeon_show_cursor(rdisplay->crtc); |
- | |
178 | - | ||
179 | rdisplay->init_cursor = init_cursor; |
- | |
180 | rdisplay->select_cursor = select_cursor; |
- | |
181 | rdisplay->show_cursor = NULL; |
- | |
182 | rdisplay->move_cursor = move_cursor; |
- | |
183 | rdisplay->restore_cursor = restore_cursor; |
- | |
184 | - | ||
185 | LEAVE(); |
- | |
186 | - | ||
187 | return 1; |
- | |
188 | }; |
- | |
189 | 150 | ||
190 | static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock) |
151 | static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock) |
191 | { |
152 | { |
192 | struct radeon_device *rdev = crtc->dev->dev_private; |
153 | struct radeon_device *rdev = crtc->dev->dev_private; |
193 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
154 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
194 | uint32_t cur_lock; |
155 | uint32_t cur_lock; |
195 | 156 | ||
196 | if (ASIC_IS_AVIVO(rdev)) { |
157 | if (ASIC_IS_AVIVO(rdev)) { |
197 | cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); |
158 | cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); |
198 | if (lock) |
159 | if (lock) |
199 | cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; |
160 | cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; |
200 | else |
161 | else |
201 | cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; |
162 | cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; |
202 | WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); |
163 | WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); |
203 | } else { |
164 | } else { |
204 | cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); |
165 | cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); |
205 | if (lock) |
166 | if (lock) |
206 | cur_lock |= RADEON_CUR_LOCK; |
167 | cur_lock |= RADEON_CUR_LOCK; |
207 | else |
168 | else |
208 | cur_lock &= ~RADEON_CUR_LOCK; |
169 | cur_lock &= ~RADEON_CUR_LOCK; |
209 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); |
170 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); |
210 | } |
171 | } |
211 | } |
172 | } |
212 | 173 | ||
213 | cursor_t* __stdcall select_cursor(cursor_t *cursor) |
174 | cursor_t* __stdcall select_cursor(cursor_t *cursor) |
214 | { |
175 | { |
215 | struct radeon_device *rdev; |
176 | struct radeon_device *rdev; |
216 | struct radeon_crtc *radeon_crtc; |
177 | struct radeon_crtc *radeon_crtc; |
217 | cursor_t *old; |
178 | cursor_t *old; |
218 | uint32_t gpu_addr; |
179 | uint32_t gpu_addr; |
219 | 180 | ||
220 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
181 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
221 | radeon_crtc = to_radeon_crtc(rdisplay->crtc); |
182 | radeon_crtc = to_radeon_crtc(rdisplay->crtc); |
222 | 183 | ||
223 | old = rdisplay->cursor; |
184 | old = rdisplay->cursor; |
224 | 185 | ||
225 | rdisplay->cursor = cursor; |
186 | rdisplay->cursor = cursor; |
226 | gpu_addr = cursor->robj->gpu_addr; |
187 | gpu_addr = cursor->robj->gpu_addr; |
227 | 188 | ||
228 | if (ASIC_IS_AVIVO(rdev)) |
189 | if (ASIC_IS_AVIVO(rdev)) |
229 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
190 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
230 | else { |
191 | else { |
231 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; |
192 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; |
232 | /* offset is from DISP(2)_BASE_ADDRESS */ |
193 | /* offset is from DISP(2)_BASE_ADDRESS */ |
233 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
194 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
234 | } |
195 | } |
235 | 196 | ||
236 | return old; |
197 | return old; |
237 | }; |
198 | }; |
238 | 199 | ||
239 | 200 | ||
240 | void __stdcall move_cursor(cursor_t *cursor, int x, int y) |
201 | void __stdcall move_cursor(cursor_t *cursor, int x, int y) |
241 | { |
202 | { |
242 | struct radeon_device *rdev; |
203 | struct radeon_device *rdev; |
243 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
204 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
244 | struct drm_crtc *crtc = rdisplay->crtc; |
205 | struct drm_crtc *crtc = rdisplay->crtc; |
245 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
206 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
246 | 207 | ||
247 | int hot_x = cursor->hot_x; |
208 | int hot_x = cursor->hot_x; |
248 | int hot_y = cursor->hot_y; |
209 | int hot_y = cursor->hot_y; |
249 | 210 | ||
250 | radeon_lock_cursor(crtc, true); |
211 | radeon_lock_cursor(crtc, true); |
251 | if (ASIC_IS_AVIVO(rdev)) |
212 | if (ASIC_IS_AVIVO(rdev)) |
252 | { |
213 | { |
253 | int w = 32; |
214 | int w = 32; |
254 | int i = 0; |
215 | int i = 0; |
255 | struct drm_crtc *crtc_p; |
216 | struct drm_crtc *crtc_p; |
256 | 217 | ||
257 | /* avivo cursor are offset into the total surface */ |
218 | /* avivo cursor are offset into the total surface */ |
258 | // x += crtc->x; |
219 | // x += crtc->x; |
259 | // y += crtc->y; |
220 | // y += crtc->y; |
260 | 221 | ||
261 | // DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); |
222 | // DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); |
262 | #if 0 |
223 | #if 0 |
263 | /* avivo cursor image can't end on 128 pixel boundry or |
224 | /* avivo cursor image can't end on 128 pixel boundry or |
264 | * go past the end of the frame if both crtcs are enabled |
225 | * go past the end of the frame if both crtcs are enabled |
265 | */ |
226 | */ |
266 | list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) { |
227 | list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) { |
267 | if (crtc_p->enabled) |
228 | if (crtc_p->enabled) |
268 | i++; |
229 | i++; |
269 | } |
230 | } |
270 | if (i > 1) { |
231 | if (i > 1) { |
271 | int cursor_end, frame_end; |
232 | int cursor_end, frame_end; |
272 | 233 | ||
273 | cursor_end = x + w; |
234 | cursor_end = x + w; |
274 | frame_end = crtc->x + crtc->mode.crtc_hdisplay; |
235 | frame_end = crtc->x + crtc->mode.crtc_hdisplay; |
275 | if (cursor_end >= frame_end) { |
236 | if (cursor_end >= frame_end) { |
276 | w = w - (cursor_end - frame_end); |
237 | w = w - (cursor_end - frame_end); |
277 | if (!(frame_end & 0x7f)) |
238 | if (!(frame_end & 0x7f)) |
278 | w--; |
239 | w--; |
279 | } else { |
240 | } else { |
280 | if (!(cursor_end & 0x7f)) |
241 | if (!(cursor_end & 0x7f)) |
281 | w--; |
242 | w--; |
282 | } |
243 | } |
283 | if (w <= 0) |
244 | if (w <= 0) |
284 | w = 1; |
245 | w = 1; |
285 | } |
246 | } |
286 | #endif |
247 | #endif |
287 | WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, |
248 | WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, |
288 | (x << 16) | y); |
249 | (x << 16) | y); |
289 | WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, |
250 | WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, |
290 | (hot_x << 16) | hot_y); |
251 | (hot_x << 16) | hot_y); |
291 | WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, |
252 | WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, |
292 | ((w - 1) << 16) | 31); |
253 | ((w - 1) << 16) | 31); |
293 | } else { |
254 | } else { |
294 | if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) |
255 | if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) |
295 | y *= 2; |
256 | y *= 2; |
296 | 257 | ||
297 | WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset, |
258 | WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset, |
298 | (RADEON_CUR_LOCK | (hot_x << 16) | (hot_y << 16))); |
259 | (RADEON_CUR_LOCK | (hot_x << 16) | (hot_y << 16))); |
299 | WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, |
260 | WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, |
300 | (RADEON_CUR_LOCK | (x << 16) | y)); |
261 | (RADEON_CUR_LOCK | (x << 16) | y)); |
301 | 262 | ||
302 | /* offset is from DISP(2)_BASE_ADDRESS */ |
263 | /* offset is from DISP(2)_BASE_ADDRESS */ |
303 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, |
264 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, |
304 | (radeon_crtc->legacy_cursor_offset + (hot_y * 256))); |
265 | (radeon_crtc->legacy_cursor_offset + (hot_y * 256))); |
305 | } |
266 | } |
306 | radeon_lock_cursor(crtc, false); |
267 | radeon_lock_cursor(crtc, false); |
307 | } |
268 | } |
308 | 269 | ||
309 | void __stdcall restore_cursor(int x, int y) |
270 | void __stdcall restore_cursor(int x, int y) |
310 | { |
271 | { |
311 | };><>><>><>><>><>><>=>><>><>>>>> |
272 | }; |
312 | 273 | ||
- | 274 | static char *manufacturer_name(unsigned char *x) |
|
- | 275 | { |
|
- | 276 | static char name[4]; |
|
- | 277 | ||
- | 278 | name[0] = ((x[0] & 0x7C) >> 2) + '@'; |
|
- | 279 | name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@'; |
|
- | 280 | name[2] = (x[1] & 0x1F) + '@'; |
|
- | 281 | name[3] = 0; |
|
- | 282 | ||
- | 283 | return name; |
|
- | 284 | } |
|
- | 285 | ||
- | 286 | bool set_mode(struct drm_device *dev, int width, int height) |
|
- | 287 | { |
|
- | 288 | struct drm_connector *connector; |
|
- | 289 | ||
- | 290 | bool ret = false; |
|
- | 291 | ||
- | 292 | ENTER(); |
|
- | 293 | ||
- | 294 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
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- | 295 | { |
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- | 296 | struct drm_display_mode *mode; |
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- | 297 | ||
- | 298 | struct drm_encoder *encoder; |
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- | 299 | struct drm_crtc *crtc; |
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- | 300 | ||
- | 301 | if( connector->status != connector_status_connected) |
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- | 302 | continue; |
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- | 303 | ||
- | 304 | encoder = connector->encoder; |
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- | 305 | if( encoder == NULL) |
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- | 306 | continue; |
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- | 307 | ||
- | 308 | crtc = encoder->crtc; |
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- | 309 | ||
- | 310 | if(crtc == NULL) |
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- | 311 | continue; |
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- | 312 | ||
- | 313 | list_for_each_entry(mode, &connector->modes, head) |
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- | 314 | { |
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- | 315 | char *con_name, *enc_name; |
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- | 316 | ||
- | 317 | struct drm_framebuffer *fb; |
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- | 318 | ||
- | 319 | if (drm_mode_width(mode) == width && |
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- | 320 | drm_mode_height(mode) == height) |
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- | 321 | { |
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- | 322 | char con_edid[128]; |
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- | 323 | ||
- | 324 | fb = list_first_entry(&dev->mode_config.fb_kernel_list, |
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- | 325 | struct drm_framebuffer, filp_head); |
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- | 326 | ||
- | 327 | memcpy(con_edid, connector->edid_blob_ptr->data, 128); |
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- | 328 | ||
- | 329 | dbgprintf("Manufacturer: %s Model %x Serial Number %u\n", |
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- | 330 | manufacturer_name(con_edid + 0x08), |
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- | 331 | (unsigned short)(con_edid[0x0A] + (con_edid[0x0B] << 8)), |
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- | 332 | (unsigned int)(con_edid[0x0C] + (con_edid[0x0D] << 8) |
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- | 333 | + (con_edid[0x0E] << 16) + (con_edid[0x0F] << 24))); |
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- | 334 | ||
- | 335 | ||
- | 336 | con_name = drm_get_connector_name(connector); |
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- | 337 | enc_name = drm_get_encoder_name(encoder); |
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- | 338 | ||
- | 339 | dbgprintf("set mode %d %d connector %s encoder %s\n", |
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- | 340 | width, height, con_name, enc_name); |
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- | 341 | ||
- | 342 | fb->width = width; |
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- | 343 | fb->height = height; |
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- | 344 | fb->pitch = radeon_align_pitch(dev->dev_private, width, 32, false) * ((32 + 1) / 8); |
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- | 345 | ||
- | 346 | crtc->fb = fb; |
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- | 347 | crtc->enabled = true; |
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- | 348 | rdisplay->crtc = crtc; |
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- | 349 | ||
- | 350 | ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb); |
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- | 351 | ||
- | 352 | rdisplay->width = fb->width; |
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- | 353 | rdisplay->height = fb->height; |
|
- | 354 | rdisplay->pitch = fb->pitch; |
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- | 355 | ||
- | 356 | sysSetScreen(fb->width, fb->height, fb->pitch); |
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- | 357 | ||
- | 358 | if (ret == true) |
|
- | 359 | { |
|
- | 360 | dbgprintf("new mode %d %d pitch %d\n",fb->width, fb->height, fb->pitch); |
|
- | 361 | } |
|
- | 362 | else |
|
- | 363 | { |
|
- | 364 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
|
- | 365 | fb->width, fb->height, crtc); |
|
- | 366 | }; |
|
- | 367 | ||
- | 368 | LEAVE(); |
|
- | 369 | ||
- | 370 | return ret; |
|
- | 371 | }; |
|
- | 372 | } |
|
- | 373 | }; |
|
- | 374 | LEAVE(); |
|
- | 375 | return ret; |
|
- | 376 | }; |
|
- | 377 | ||
- | 378 | ||
- | 379 | int init_display(struct radeon_device *rdev, mode_t *usermode) |
|
- | 380 | { |
|
- | 381 | cursor_t *cursor; |
|
- | 382 | ||
- | 383 | ENTER(); |
|
- | 384 | ||
- | 385 | rdisplay = GetDisplay(); |
|
- | 386 | ||
- | 387 | rdisplay->ddev = rdev->ddev; |
|
- | 388 | ||
- | 389 | list_for_each_entry(cursor, &rdisplay->cursors, list) |
|
- | 390 | { |
|
- | 391 | init_cursor(cursor); |
|
- | 392 | }; |
|
- | 393 | ||
- | 394 | if( (usermode->width != 0) && |
|
- | 395 | (usermode->height != 0) ) |
|
- | 396 | { |
|
- | 397 | set_mode(rdev->ddev, usermode->width, usermode->height); |
|
- | 398 | } |
|
- | 399 | else |
|
- | 400 | set_mode(rdev->ddev, 800, 600); |
|
- | 401 | ||
- | 402 | select_cursor(rdisplay->cursor); |
|
- | 403 | radeon_show_cursor(rdisplay->crtc); |
|
- | 404 | ||
- | 405 | rdisplay->init_cursor = init_cursor; |
|
- | 406 | rdisplay->select_cursor = select_cursor; |
|
- | 407 | rdisplay->show_cursor = NULL; |
|
- | 408 | rdisplay->move_cursor = move_cursor; |
|
- | 409 | rdisplay->restore_cursor = restore_cursor; |
|
- | 410 | ||
- | 411 | LEAVE(); |
|
- | 412 | ||
- | 413 | return 1; |
|
- | 414 | }; |
|
- | 415 | ||
- | 416 | static int my_atoi(char **cmd) |
|
- | 417 | { |
|
- | 418 | char* p = *cmd; |
|
- | 419 | int val = 0; |
|
- | 420 | ||
- | 421 | for (;; *p++) { |
|
- | 422 | switch (*p) { |
|
- | 423 | case '0' ... '9': |
|
- | 424 | val = 10*val+(*p-'0'); |
|
- | 425 | break; |
|
- | 426 | default: |
|
- | 427 | *cmd = p; |
|
- | 428 | return val; |
|
- | 429 | } |
|
- | 430 | } |
|
- | 431 | } |
|
- | 432 | ||
- | 433 | char* parse_mode(char *p, mode_t *mode) |
|
- | 434 | { |
|
- | 435 | char c; |
|
- | 436 | ||
- | 437 | while( (c = *p++) == ' '); |
|
- | 438 | ||
- | 439 | if( c ) |
|
- | 440 | { |
|
- | 441 | p--; |
|
- | 442 | ||
- | 443 | mode->width = my_atoi(&p); |
|
- | 444 | p++; |
|
- | 445 | ||
- | 446 | mode->height = my_atoi(&p); |
|
- | 447 | p++; |
|
- | 448 | ||
- | 449 | mode->freq = my_atoi(&p); |
|
- | 450 | } |
|
- | 451 | ||
- | 452 | return p; |
|
- | 453 | }; |
|
- | 454 | ||
- | 455 | char* parse_path(char *p, char *log) |
|
- | 456 | { |
|
- | 457 | char c; |
|
- | 458 | ||
- | 459 | while( (c = *p++) == ' '); |
|
- | 460 | p--; |
|
- | 461 | while( (c = *log++ = *p++) && (c != ' ')); |
|
- | 462 | *log = 0; |
|
- | 463 | ||
- | 464 | return p; |
|
- | 465 | }; |
|
- | 466 | ||
- | 467 | void parse_cmdline(char *cmdline, mode_t *mode, char *log) |
|
- | 468 | { |
|
- | 469 | char *p = cmdline; |
|
- | 470 | ||
- | 471 | char c = *p++; |
|
- | 472 | ||
- | 473 | while( c ) |
|
- | 474 | { |
|
- | 475 | if( c == '-') |
|
- | 476 | { |
|
- | 477 | switch(*p++) |
|
- | 478 | { |
|
- | 479 | case 'm': |
|
- | 480 | p = parse_mode(p, mode); |
|
- | 481 | break; |
|
- | 482 | ||
- | 483 | case 'l': |
|
- | 484 | p = parse_path(p, log); |
|
- | 485 | break; |
|
- | 486 | }; |
|
- | 487 | }; |
|
- | 488 | c = *p++; |
|
- | 489 | }; |
|
- | 490 | };><>><>><>><>><>><>><>><>><>><>><>=>><>><>>>>> |
|
- | 491 |