WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/radeon_vm.c

 	bo_va->vm = vm;
 	bo_va->bo = bo;
 	bo_va->it.start = 0;
 	bo_va->it.last = 0;
 	bo_va->flags = 0;
-	bo_va->addr = 0;
 	bo_va->ref_count = 1;
 	INIT_LIST_HEAD(&bo_va->bo_list);
 	INIT_LIST_HEAD(&bo_va->vm_status);
 	if (soffset) {
 		/* make sure object fit at this offset */
 		eoffset = soffset + size;
 		if (soffset >= eoffset) {
+			r = -EINVAL;
-			return -EINVAL;
+			goto error_unreserve;
+		}
 		last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
 		if (last_pfn > rdev->vm_manager.max_pfn) {
 			dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
+				last_pfn, rdev->vm_manager.max_pfn);
-				last_pfn, rdev->vm_manager.max_pfn);
+			r = -EINVAL;
-			return -EINVAL;
+			goto error_unreserve;
+		}
 	} else {
+		eoffset = last_pfn = 0;
+	}
+	mutex_lock(&vm->mutex);
+	soffset /= RADEON_GPU_PAGE_SIZE;
+	eoffset /= RADEON_GPU_PAGE_SIZE;
+	if (soffset || eoffset) {
+		struct interval_tree_node *it;
+		it = interval_tree_iter_first(&vm->va, soffset, eoffset - 1);
+		if (it && it != &bo_va->it) {
+			struct radeon_bo_va *tmp;
+			tmp = container_of(it, struct radeon_bo_va, it);
+			/* bo and tmp overlap, invalid offset */
+			dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with "
+				"(bo %p 0x%010lx 0x%010lx)\n", bo_va->bo,
+				soffset, tmp->bo, tmp->it.start, tmp->it.last);
+			mutex_unlock(&vm->mutex);
+			r = -EINVAL;
-		eoffset = last_pfn = 0;
+			goto error_unreserve;
-	}
+		}
 	mutex_lock(&vm->mutex);
 	if (bo_va->it.start || bo_va->it.last) {
-		if (bo_va->addr) {
+	if (bo_va->it.start || bo_va->it.last) {
-			/* add a clone of the bo_va to clear the old address */
+		/* add a clone of the bo_va to clear the old address */
-			struct radeon_bo_va *tmp;
+		struct radeon_bo_va *tmp;
+		tmp = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
-			tmp = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
+		if (!tmp) {
-			if (!tmp) {
+			mutex_unlock(&vm->mutex);
-				mutex_unlock(&vm->mutex);
+			r = -ENOMEM;
-				return -ENOMEM;
+			goto error_unreserve;
-			}
 			tmp->it.start = bo_va->it.start;
-			tmp->it.last = bo_va->it.last;
-			tmp->vm = vm;
-			tmp->addr = bo_va->addr;
-			tmp->bo = radeon_bo_ref(bo_va->bo);
-			spin_lock(&vm->status_lock);
+		tmp->it.start = bo_va->it.start;
+		tmp->it.last = bo_va->it.last;
-			list_add(&tmp->vm_status, &vm->freed);
+		tmp->vm = vm;
-			spin_unlock(&vm->status_lock);
+		tmp->bo = radeon_bo_ref(bo_va->bo);
+		interval_tree_remove(&bo_va->it, &vm->va);
+		spin_lock(&vm->status_lock);
 		bo_va->it.start = 0;
-		interval_tree_remove(&bo_va->it, &vm->va);
-		bo_va->it.start = 0;
+		bo_va->it.last = 0;
-		bo_va->it.last = 0;
-	}
-	soffset /= RADEON_GPU_PAGE_SIZE;
-	eoffset /= RADEON_GPU_PAGE_SIZE;
-	if (soffset || eoffset) {
-		struct interval_tree_node *it;
-		it = interval_tree_iter_first(&vm->va, soffset, eoffset - 1);
-		if (it) {
-			struct radeon_bo_va *tmp;
+		list_del_init(&bo_va->vm_status);
-			tmp = container_of(it, struct radeon_bo_va, it);
-			/* bo and tmp overlap, invalid offset */
-			dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with "
+		list_add(&tmp->vm_status, &vm->freed);
-				"(bo %p 0x%010lx 0x%010lx)\n", bo_va->bo,
+		spin_unlock(&vm->status_lock);
+	}
-				soffset, tmp->bo, tmp->it.start, tmp->it.last);
+	if (soffset || eoffset) {
-			mutex_unlock(&vm->mutex);
+		spin_lock(&vm->status_lock);
-			return -EINVAL;
+		bo_va->it.start = soffset;
-		}
-		bo_va->it.start = soffset;
+		bo_va->it.last = eoffset - 1;
-		bo_va->it.last = eoffset - 1;
+		list_add(&bo_va->vm_status, &vm->cleared);
-		interval_tree_insert(&bo_va->it, &vm->va);
+		spin_unlock(&vm->status_lock);
 			return r;
 		r = radeon_vm_clear_bo(rdev, pt);
 		if (r) {
-			radeon_bo_unref(&pt);
-			radeon_bo_reserve(bo_va->bo, false);
+			radeon_bo_unref(&pt);
 			return r;
+		}
 		vm->page_tables[pt_idx].bo = pt;
+	}
 	mutex_unlock(&vm->mutex);
+	return 0;
+error_unreserve:
+	radeon_bo_unreserve(bo_va->bo);
-	return 0;
+	return r;
+}
 /**
 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
+{
 	uint64_t result;
 	/* page table offset */
-	result = rdev->gart.pages_addr[addr >> PAGE_SHIFT];
-	/* in case cpu page size != gpu page size*/
+	result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT];
-	result |= addr & (~PAGE_MASK);
+	result &= ~RADEON_GPU_PAGE_MASK;
 	return result;
 	 * Userspace can support this by aligning virtual base address and
 	 * allocation size to the fragment size.
 	 */
 	/* NI is optimized for 256KB fragments, SI and newer for 64KB */
+	uint64_t frag_flags = ((rdev->family == CHIP_CAYMAN) ||
-	uint64_t frag_flags = rdev->family == CHIP_CAYMAN ?
+			       (rdev->family == CHIP_ARUBA)) ?
 			R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB;
+	uint64_t frag_align = ((rdev->family == CHIP_CAYMAN) ||
-	uint64_t frag_align = rdev->family == CHIP_CAYMAN ? 0x200 : 0x80;
+			       (rdev->family == CHIP_ARUBA)) ? 0x200 : 0x80;
 	uint64_t frag_start = ALIGN(pe_start, frag_align);
 			bo_va->bo, vm);
 		return -EINVAL;
+	}
+	spin_lock(&vm->status_lock);
+	if (mem) {
+		if (list_empty(&bo_va->vm_status)) {
+			spin_unlock(&vm->status_lock);
+			return 0;
 	spin_lock(&vm->status_lock);
+		list_del_init(&bo_va->vm_status);
+	} else {
+		list_del(&bo_va->vm_status);
+		list_add(&bo_va->vm_status, &vm->cleared);
 	list_del_init(&bo_va->vm_status);
 	spin_unlock(&vm->status_lock);
 	bo_va->flags &= ~RADEON_VM_PAGE_VALID;
+		}
 	} else {
 		addr = 0;
+	}
-	if (addr == bo_va->addr)
-		return 0;
-	bo_va->addr = addr;
 	trace_radeon_vm_bo_update(bo_va);
  */
 int radeon_vm_clear_freed(struct radeon_device *rdev,
 			  struct radeon_vm *vm)
+{
 	struct radeon_bo_va *bo_va;
-	int r;
+	int r = 0;
 	spin_lock(&vm->status_lock);
 	while (!list_empty(&vm->freed)) {
 		bo_va = list_first_entry(&vm->freed,
 			struct radeon_bo_va, vm_status);
 		spin_unlock(&vm->status_lock);
 		r = radeon_vm_bo_update(rdev, bo_va, NULL);
+		radeon_bo_unref(&bo_va->bo);
+		radeon_fence_unref(&bo_va->last_pt_update);
-		radeon_bo_unref(&bo_va->bo);
+		spin_lock(&vm->status_lock);
-		radeon_fence_unref(&bo_va->last_pt_update);
+		list_del(&bo_va->vm_status);
 		kfree(bo_va);
-		if (r)
-			return r;
+		if (r)
 			break;
-		spin_lock(&vm->status_lock);
+	}
 	spin_unlock(&vm->status_lock);
-	return 0;
+	return r;
 	struct radeon_vm *vm = bo_va->vm;
 	list_del(&bo_va->bo_list);
 	mutex_lock(&vm->mutex);
+	if (bo_va->it.start || bo_va->it.last)
-	mutex_lock(&vm->mutex);
+		interval_tree_remove(&bo_va->it, &vm->va);
 	interval_tree_remove(&bo_va->it, &vm->va);
-	spin_lock(&vm->status_lock);
-	list_del(&bo_va->vm_status);
+	spin_lock(&vm->status_lock);
 	list_del(&bo_va->vm_status);
-	if (bo_va->addr) {
+	if (bo_va->it.start || bo_va->it.last) {
 		bo_va->bo = radeon_bo_ref(bo_va->bo);
 		list_add(&bo_va->vm_status, &vm->freed);
 	} else {
 			     struct radeon_bo *bo)
+{
 	struct radeon_bo_va *bo_va;
-	list_for_each_entry(bo_va, &bo->va, bo_list) {
-		if (bo_va->addr) {
+	list_for_each_entry(bo_va, &bo->va, bo_list) {
-			spin_lock(&bo_va->vm->status_lock);
+		spin_lock(&bo_va->vm->status_lock);
+		if (list_empty(&bo_va->vm_status) &&
-			list_del(&bo_va->vm_status);
+		    (bo_va->it.start || bo_va->it.last))
 			list_add(&bo_va->vm_status, &bo_va->vm->invalidated);
-			spin_unlock(&bo_va->vm->status_lock);
+		spin_unlock(&bo_va->vm->status_lock);
+	}
-	}
+}
 /**
  * radeon_vm_init - initialize a vm instance
 	mutex_init(&vm->mutex);
 	vm->va = RB_ROOT;
 	spin_lock_init(&vm->status_lock);
 	INIT_LIST_HEAD(&vm->invalidated);
 	INIT_LIST_HEAD(&vm->freed);
+	INIT_LIST_HEAD(&vm->cleared);
 	pd_size = radeon_vm_directory_size(rdev);
 	pd_entries = radeon_vm_num_pdes(rdev);

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/radeon_vm.c @ 5271 – Rev 5271 → 6104