WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/radeon_object.c


/*
 * Copyright 2009 Jerome Glisse.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Jerome Glisse 
 *    Thomas Hellstrom 
 *    Dave Airlie
 */
#include 
#include 
#include "radeon_drm.h"
#include "radeon.h"
#include 
#include "radeon_object.h"
 
int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
             int pages, u32_t *pagelist);
 
 
 
 
static struct drm_mm   mm_gtt;
static struct drm_mm   mm_vram;
 
 
int radeon_object_init(struct radeon_device *rdev)
{
    int r = 0;
 
    ENTER();
 
    r = drm_mm_init(&mm_vram, 0xC00000 >> PAGE_SHIFT,
               ((rdev->mc.real_vram_size - 0xC00000) >> PAGE_SHIFT));
    if (r) {
        DRM_ERROR("Failed initializing VRAM heap.\n");
        return r;
    };
 
    r = drm_mm_init(&mm_gtt, 0, ((rdev->mc.gtt_size) >> PAGE_SHIFT));
    if (r) {
        DRM_ERROR("Failed initializing GTT heap.\n");
        return r;
    }
 
    return r;
 //   return radeon_ttm_init(rdev);
}
 
static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
{
    uint32_t flags = 0;
    if (domain & RADEON_GEM_DOMAIN_VRAM) {
        flags |= TTM_PL_FLAG_VRAM;
    }
    if (domain & RADEON_GEM_DOMAIN_GTT) {
        flags |= TTM_PL_FLAG_TT;
    }
    if (domain & RADEON_GEM_DOMAIN_CPU) {
        flags |= TTM_PL_FLAG_SYSTEM;
    }
    if (!flags) {
        flags |= TTM_PL_FLAG_SYSTEM;
    }
    return flags;
}
 
 
int radeon_object_create(struct radeon_device *rdev,
             struct drm_gem_object *gobj,
             unsigned long size,
             bool kernel,
             uint32_t domain,
             bool interruptible,
             struct radeon_object **robj_ptr)
{
    struct radeon_object *robj;
    enum ttm_bo_type type;
    uint32_t flags;
    int r;
 
    if (kernel) {
        type = ttm_bo_type_kernel;
    } else {
        type = ttm_bo_type_device;
    }
    *robj_ptr = NULL;
    robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
    if (robj == NULL) {
        return -ENOMEM;
    }
    robj->rdev = rdev;
//    robj->gobj = gobj;
    INIT_LIST_HEAD(&robj->list);
 
    flags = radeon_object_flags_from_domain(domain);
 
    robj->flags = flags;
 
    if( flags & TTM_PL_FLAG_VRAM)
    {
        size_t num_pages;
 
        struct drm_mm_node *vm_node;
 
        num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
 
        if (num_pages == 0) {
            dbgprintf("Illegal buffer object size.\n");
            return -EINVAL;
        }
retry_pre_get:
        r = drm_mm_pre_get(&mm_vram);
 
        if (unlikely(r != 0))
            return r;
 
        vm_node = drm_mm_search_free(&mm_vram, num_pages, 0, 0);
 
        if (unlikely(vm_node == NULL)) {
            r = -ENOMEM;
            return r;
        }
 
        robj->mm_node =  drm_mm_get_block_atomic(vm_node, num_pages, 0);
 
        if (unlikely(robj->mm_node == NULL)) {
            goto retry_pre_get;
        }
 
        robj->vm_addr = ((uint32_t)robj->mm_node->start);
 
//        dbgprintf("alloc vram: base %x size %x\n",
//                   robj->vm_addr << PAGE_SHIFT, num_pages  << PAGE_SHIFT);
 
    };
 
    if( flags & TTM_PL_FLAG_TT)
    {
        size_t num_pages;
 
        struct drm_mm_node *vm_node;
 
        num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
 
        if (num_pages == 0) {
            dbgprintf("Illegal buffer object size.\n");
            return -EINVAL;
        }
retry_pre_get1:
        r = drm_mm_pre_get(&mm_gtt);
 
        if (unlikely(r != 0))
            return r;
 
        vm_node = drm_mm_search_free(&mm_gtt, num_pages, 0, 0);
 
        if (unlikely(vm_node == NULL)) {
            r = -ENOMEM;
            return r;
        }
 
        robj->mm_node =  drm_mm_get_block_atomic(vm_node, num_pages, 0);
 
        if (unlikely(robj->mm_node == NULL)) {
            goto retry_pre_get1;
        }
 
        robj->vm_addr = ((uint32_t)robj->mm_node->start) ;
 
//        dbgprintf("alloc gtt: base %x size %x\n",
//                   robj->vm_addr << PAGE_SHIFT, num_pages  << PAGE_SHIFT);
    };
 
//   r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,
//                  0, 0, false, NULL, size,
//                  &radeon_ttm_object_object_destroy);
    if (unlikely(r != 0)) {
        /* ttm call radeon_ttm_object_object_destroy if error happen */
        DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",
              size, flags, 0);
        return r;
    }
    *robj_ptr = robj;
//   if (gobj) {
//       list_add_tail(&robj->list, &rdev->gem.objects);
//   }
    return 0;
}
 
#define page_tabs  0xFDC00000
 
int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
              uint64_t *gpu_addr)
{
    uint32_t flags;
    uint32_t tmp;
    int r = 0;
 
//    flags = radeon_object_flags_from_domain(domain);
//   spin_lock(&robj->tobj.lock);
    if (robj->pin_count) {
        robj->pin_count++;
        if (gpu_addr != NULL) {
            *gpu_addr = robj->gpu_addr;
        }
//       spin_unlock(&robj->tobj.lock);
        return 0;
    }
//   spin_unlock(&robj->tobj.lock);
//    r = radeon_object_reserve(robj, false);
//    if (unlikely(r != 0)) {
//        DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
//        return r;
//    }
//    tmp = robj->tobj.mem.placement;
//    ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
//    robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING;
//    r = ttm_buffer_object_validate(&robj->tobj,
//                       robj->tobj.proposed_placement,
//                       false, false);
 
    robj->gpu_addr = ((u64)robj->vm_addr) << PAGE_SHIFT;
 
    if(robj->flags & TTM_PL_FLAG_VRAM)
        robj->gpu_addr += (u64)robj->rdev->mc.vram_location;
    else if (robj->flags & TTM_PL_FLAG_TT)
    {
        u32_t *pagelist;
        robj->kptr  = KernelAlloc( robj->mm_node->size << PAGE_SHIFT );
        dbgprintf("kernel alloc %x\n", robj->kptr );
 
        pagelist =  &((u32_t*)page_tabs)[(u32_t)robj->kptr >> 12];
        dbgprintf("pagelist %x\n", pagelist);
        radeon_gart_bind(robj->rdev, robj->gpu_addr,
                         robj->mm_node->size,  pagelist);
        robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;
    }
    else
    {
        DRM_ERROR("Unknown placement %d\n", robj->flags);
        robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
        r = -1;
    };
 
//    flags & TTM_PL_FLAG_VRAM
    if (gpu_addr != NULL) {
        *gpu_addr = robj->gpu_addr;
    }
    robj->pin_count = 1;
    if (unlikely(r != 0)) {
        DRM_ERROR("radeon: failed to pin object.\n");
    }
 
    return r;
}
 
int radeon_object_kmap(struct radeon_object *robj, void **ptr)
{
    int r = 0;
 
//   spin_lock(&robj->tobj.lock);
    if (robj->kptr) {
        if (ptr) {
            *ptr = robj->kptr;
        }
//       spin_unlock(&robj->tobj.lock);
        return 0;
    }
//   spin_unlock(&robj->tobj.lock);
 
    if(robj->flags & TTM_PL_FLAG_VRAM)
    {
        robj->cpu_addr = robj->rdev->mc.aper_base +
                         (robj->vm_addr << PAGE_SHIFT);
        robj->kptr = (void*)MapIoMem(robj->cpu_addr,
                           robj->mm_node->size << 12, PG_SW);
 
 
    }
    else
    {
        return -1;
    }
 
    if (ptr) {
        *ptr = robj->kptr;
    }
 
    return 0;
}
 
void radeon_object_kunmap(struct radeon_object *robj)
{
//   spin_lock(&robj->tobj.lock);
    if (robj->kptr == NULL) {
//       spin_unlock(&robj->tobj.lock);
        return;
    }
 
    if (robj->flags & TTM_PL_FLAG_VRAM)
    {
        FreeKernelSpace(robj->kptr);
        robj->kptr = NULL;
    }
//   spin_unlock(&robj->tobj.lock);
}
 
 
 
void radeon_object_unpin(struct radeon_object *robj)
{
    uint32_t flags;
    int r;
 
//   spin_lock(&robj->tobj.lock);
    if (!robj->pin_count) {
//       spin_unlock(&robj->tobj.lock);
        printk(KERN_WARNING "Unpin not necessary for %p !\n", robj);
        return;
    }
    robj->pin_count--;
    if (robj->pin_count) {
//       spin_unlock(&robj->tobj.lock);
        return;
    }
//   spin_unlock(&robj->tobj.lock);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
    drm_mm_put_block(robj->mm_node);
 
    kfree(robj);
}
 
 
#if 0
 
 
/*
 * To exclude mutual BO access we rely on bo_reserve exclusion, as all
 * function are calling it.
 */
 
static int radeon_object_reserve(struct radeon_object *robj, bool interruptible)
{
	return ttm_bo_reserve(&robj->tobj, interruptible, false, false, 0);
}
 
static void radeon_object_unreserve(struct radeon_object *robj)
{
	ttm_bo_unreserve(&robj->tobj);
}
 
static void radeon_ttm_object_object_destroy(struct ttm_buffer_object *tobj)
{
	struct radeon_object *robj;
 
	robj = container_of(tobj, struct radeon_object, tobj);
//   list_del_init(&robj->list);
	kfree(robj);
}
 
static inline void radeon_object_gpu_addr(struct radeon_object *robj)
{
	/* Default gpu address */
	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
	if (robj->tobj.mem.mm_node == NULL) {
		return;
	}
	robj->gpu_addr = ((u64)robj->tobj.mem.mm_node->start) << PAGE_SHIFT;
	switch (robj->tobj.mem.mem_type) {
	case TTM_PL_VRAM:
		robj->gpu_addr += (u64)robj->rdev->mc.vram_location;
		break;
	case TTM_PL_TT:
		robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;
		break;
	default:
		DRM_ERROR("Unknown placement %d\n", robj->tobj.mem.mem_type);
		robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
		return;
	}
}
 
 
int radeon_object_create(struct radeon_device *rdev,
			 struct drm_gem_object *gobj,
			 unsigned long size,
			 bool kernel,
			 uint32_t domain,
			 bool interruptible,
			 struct radeon_object **robj_ptr)
{
	struct radeon_object *robj;
	enum ttm_bo_type type;
	uint32_t flags;
	int r;
 
//   if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
//       rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
//   }
	if (kernel) {
		type = ttm_bo_type_kernel;
	} else {
		type = ttm_bo_type_device;
	}
	*robj_ptr = NULL;
	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
	if (robj == NULL) {
		return -ENOMEM;
	}
	robj->rdev = rdev;
	robj->gobj = gobj;
//   INIT_LIST_HEAD(&robj->list);
 
	flags = radeon_object_flags_from_domain(domain);
//   r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,
//                  0, 0, false, NULL, size,
//                  &radeon_ttm_object_object_destroy);
	if (unlikely(r != 0)) {
		/* ttm call radeon_ttm_object_object_destroy if error happen */
		DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",
			  size, flags, 0);
		return r;
	}
	*robj_ptr = robj;
//   if (gobj) {
//       list_add_tail(&robj->list, &rdev->gem.objects);
//   }
	return 0;
}
 
int radeon_object_kmap(struct radeon_object *robj, void **ptr)
{
	int r;
 
//   spin_lock(&robj->tobj.lock);
	if (robj->kptr) {
		if (ptr) {
			*ptr = robj->kptr;
		}
//       spin_unlock(&robj->tobj.lock);
		return 0;
	}
//   spin_unlock(&robj->tobj.lock);
	r = ttm_bo_kmap(&robj->tobj, 0, robj->tobj.num_pages, &robj->kmap);
	if (r) {
		return r;
	}
//   spin_lock(&robj->tobj.lock);
	robj->kptr = ttm_kmap_obj_virtual(&robj->kmap, &robj->is_iomem);
//   spin_unlock(&robj->tobj.lock);
	if (ptr) {
		*ptr = robj->kptr;
	}
	return 0;
}
 
void radeon_object_kunmap(struct radeon_object *robj)
{
//   spin_lock(&robj->tobj.lock);
	if (robj->kptr == NULL) {
//       spin_unlock(&robj->tobj.lock);
		return;
	}
	robj->kptr = NULL;
//   spin_unlock(&robj->tobj.lock);
	ttm_bo_kunmap(&robj->kmap);
}
 
void radeon_object_unref(struct radeon_object **robj)
{
	struct ttm_buffer_object *tobj;
 
	if ((*robj) == NULL) {
		return;
	}
	tobj = &((*robj)->tobj);
	ttm_bo_unref(&tobj);
	if (tobj == NULL) {
		*robj = NULL;
	}
}
 
int radeon_object_mmap(struct radeon_object *robj, uint64_t *offset)
{
	*offset = robj->tobj.addr_space_offset;
	return 0;
}
 
int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
		      uint64_t *gpu_addr)
{
	uint32_t flags;
	uint32_t tmp;
	int r;
 
	flags = radeon_object_flags_from_domain(domain);
//   spin_lock(&robj->tobj.lock);
	if (robj->pin_count) {
		robj->pin_count++;
		if (gpu_addr != NULL) {
			*gpu_addr = robj->gpu_addr;
		}
//       spin_unlock(&robj->tobj.lock);
		return 0;
	}
//   spin_unlock(&robj->tobj.lock);
	r = radeon_object_reserve(robj, false);
	if (unlikely(r != 0)) {
		DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
		return r;
	}
	tmp = robj->tobj.mem.placement;
	ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
	robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING;
	r = ttm_buffer_object_validate(&robj->tobj,
				       robj->tobj.proposed_placement,
				       false, false);
	radeon_object_gpu_addr(robj);
	if (gpu_addr != NULL) {
		*gpu_addr = robj->gpu_addr;
	}
	robj->pin_count = 1;
	if (unlikely(r != 0)) {
		DRM_ERROR("radeon: failed to pin object.\n");
	}
	radeon_object_unreserve(robj);
	return r;
}
 
void radeon_object_unpin(struct radeon_object *robj)
{
	uint32_t flags;
	int r;
 
//   spin_lock(&robj->tobj.lock);
	if (!robj->pin_count) {
//       spin_unlock(&robj->tobj.lock);
		printk(KERN_WARNING "Unpin not necessary for %p !\n", robj);
		return;
	}
	robj->pin_count--;
	if (robj->pin_count) {
//       spin_unlock(&robj->tobj.lock);
		return;
	}
//   spin_unlock(&robj->tobj.lock);
	r = radeon_object_reserve(robj, false);
	if (unlikely(r != 0)) {
		DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
		return;
	}
	flags = robj->tobj.mem.placement;
	robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
	r = ttm_buffer_object_validate(&robj->tobj,
				       robj->tobj.proposed_placement,
				       false, false);
	if (unlikely(r != 0)) {
		DRM_ERROR("radeon: failed to unpin buffer.\n");
	}
	radeon_object_unreserve(robj);
}
 
int radeon_object_wait(struct radeon_object *robj)
{
	int r = 0;
 
	/* FIXME: should use block reservation instead */
	r = radeon_object_reserve(robj, true);
	if (unlikely(r != 0)) {
		DRM_ERROR("radeon: failed to reserve object for waiting.\n");
		return r;
	}
//   spin_lock(&robj->tobj.lock);
	if (robj->tobj.sync_obj) {
		r = ttm_bo_wait(&robj->tobj, true, false, false);
	}
//   spin_unlock(&robj->tobj.lock);
	radeon_object_unreserve(robj);
	return r;
}
 
int radeon_object_evict_vram(struct radeon_device *rdev)
{
	if (rdev->flags & RADEON_IS_IGP) {
		/* Useless to evict on IGP chips */
		return 0;
	}
	return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
}
 
void radeon_object_force_delete(struct radeon_device *rdev)
{
	struct radeon_object *robj, *n;
	struct drm_gem_object *gobj;
 
	if (list_empty(&rdev->gem.objects)) {
		return;
	}
	DRM_ERROR("Userspace still has active objects !\n");
	list_for_each_entry_safe(robj, n, &rdev->gem.objects, list) {
		mutex_lock(&rdev->ddev->struct_mutex);
		gobj = robj->gobj;
		DRM_ERROR("Force free for (%p,%p,%lu,%lu)\n",
			  gobj, robj, (unsigned long)gobj->size,
			  *((unsigned long *)&gobj->refcount));
		list_del_init(&robj->list);
		radeon_object_unref(&robj);
		gobj->driver_private = NULL;
		drm_gem_object_unreference(gobj);
		mutex_unlock(&rdev->ddev->struct_mutex);
	}
}
 
void radeon_object_fini(struct radeon_device *rdev)
{
	radeon_ttm_fini(rdev);
}
 
void radeon_object_list_add_object(struct radeon_object_list *lobj,
				   struct list_head *head)
{
	if (lobj->wdomain) {
		list_add(&lobj->list, head);
	} else {
		list_add_tail(&lobj->list, head);
	}
}
 
int radeon_object_list_reserve(struct list_head *head)
{
	struct radeon_object_list *lobj;
	struct list_head *i;
	int r;
 
	list_for_each(i, head) {
		lobj = list_entry(i, struct radeon_object_list, list);
		if (!lobj->robj->pin_count) {
			r = radeon_object_reserve(lobj->robj, true);
			if (unlikely(r != 0)) {
				DRM_ERROR("radeon: failed to reserve object.\n");
				return r;
			}
		} else {
		}
	}
	return 0;
}
 
void radeon_object_list_unreserve(struct list_head *head)
{
	struct radeon_object_list *lobj;
	struct list_head *i;
 
	list_for_each(i, head) {
		lobj = list_entry(i, struct radeon_object_list, list);
		if (!lobj->robj->pin_count) {
			radeon_object_unreserve(lobj->robj);
		} else {
		}
	}
}
 
int radeon_object_list_validate(struct list_head *head, void *fence)
{
	struct radeon_object_list *lobj;
	struct radeon_object *robj;
	struct radeon_fence *old_fence = NULL;
	struct list_head *i;
	uint32_t flags;
	int r;
 
	r = radeon_object_list_reserve(head);
	if (unlikely(r != 0)) {
		radeon_object_list_unreserve(head);
		return r;
	}
	list_for_each(i, head) {
		lobj = list_entry(i, struct radeon_object_list, list);
		robj = lobj->robj;
		if (lobj->wdomain) {
			flags = radeon_object_flags_from_domain(lobj->wdomain);
			flags |= TTM_PL_FLAG_TT;
		} else {
			flags = radeon_object_flags_from_domain(lobj->rdomain);
			flags |= TTM_PL_FLAG_TT;
			flags |= TTM_PL_FLAG_VRAM;
		}
		if (!robj->pin_count) {
			robj->tobj.proposed_placement = flags | TTM_PL_MASK_CACHING;
			r = ttm_buffer_object_validate(&robj->tobj,
						       robj->tobj.proposed_placement,
						       true, false);
			if (unlikely(r)) {
				radeon_object_list_unreserve(head);
				DRM_ERROR("radeon: failed to validate.\n");
				return r;
			}
			radeon_object_gpu_addr(robj);
		}
		lobj->gpu_offset = robj->gpu_addr;
		if (fence) {
			old_fence = (struct radeon_fence *)robj->tobj.sync_obj;
			robj->tobj.sync_obj = radeon_fence_ref(fence);
			robj->tobj.sync_obj_arg = NULL;
		}
		if (old_fence) {
			radeon_fence_unref(&old_fence);
		}
	}
	return 0;
}
 
void radeon_object_list_unvalidate(struct list_head *head)
{
	struct radeon_object_list *lobj;
	struct radeon_fence *old_fence = NULL;
	struct list_head *i;
 
	list_for_each(i, head) {
		lobj = list_entry(i, struct radeon_object_list, list);
		old_fence = (struct radeon_fence *)lobj->robj->tobj.sync_obj;
		lobj->robj->tobj.sync_obj = NULL;
		if (old_fence) {
			radeon_fence_unref(&old_fence);
		}
	}
	radeon_object_list_unreserve(head);
}
 
void radeon_object_list_clean(struct list_head *head)
{
	radeon_object_list_unreserve(head);
}
 
int radeon_object_fbdev_mmap(struct radeon_object *robj,
			     struct vm_area_struct *vma)
{
	return ttm_fbdev_mmap(vma, &robj->tobj);
}
 
#endif
 
unsigned long radeon_object_size(struct radeon_object *robj)
{
	return robj->tobj.num_pages << PAGE_SHIFT;
}

Rev 1275	Rev 1313
1	/*	1	/*
2	* Copyright 2009 Jerome Glisse.	2	* Copyright 2009 Jerome Glisse.
3	* All Rights Reserved.	3	* All Rights Reserved.
4	*	4	*
5	* Permission is hereby granted, free of charge, to any person obtaining a	5	* Permission is hereby granted, free of charge, to any person obtaining a
6	* copy of this software and associated documentation files (the	6	* copy of this software and associated documentation files (the
7	* "Software"), to deal in the Software without restriction, including	7	* "Software"), to deal in the Software without restriction, including
8	* without limitation the rights to use, copy, modify, merge, publish,	8	* without limitation the rights to use, copy, modify, merge, publish,
9	* distribute, sub license, and/or sell copies of the Software, and to	9	* distribute, sub license, and/or sell copies of the Software, and to
10	* permit persons to whom the Software is furnished to do so, subject to	10	* permit persons to whom the Software is furnished to do so, subject to
11	* the following conditions:	11	* the following conditions:
12	*	12	*
13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19	* USE OR OTHER DEALINGS IN THE SOFTWARE.	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
20	*	20	*
21	* The above copyright notice and this permission notice (including the	21	* The above copyright notice and this permission notice (including the
22	* next paragraph) shall be included in all copies or substantial portions	22	* next paragraph) shall be included in all copies or substantial portions
23	* of the Software.	23	* of the Software.
24	*	24	*
25	*/	25	*/
26	/*	26	/*
27	* Authors:	27	* Authors:
28	* Jerome Glisse	28	* Jerome Glisse
29	* Thomas Hellstrom	29	* Thomas Hellstrom
30	* Dave Airlie	30	* Dave Airlie
31	*/	31	*/
32	#include	32	#include
33	#include	33	#include
34	#include "radeon_drm.h"	34	#include "radeon_drm.h"
35	#include "radeon.h"	35	#include "radeon.h"
36	#include	36	#include
37	#include "radeon_object.h"	37	#include "radeon_object.h"
38		38
39	int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,	39	int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
40	int pages, u32_t *pagelist);	40	int pages, u32_t *pagelist);
41		41
42		42
43		43
44		44
45	static struct drm_mm mm_gtt;	45	static struct drm_mm mm_gtt;
46	static struct drm_mm mm_vram;	46	static struct drm_mm mm_vram;
47		47
48		48
49	int radeon_object_init(struct radeon_device *rdev)	49	int radeon_object_init(struct radeon_device *rdev)
50	{	50	{
51	int r = 0;	51	int r = 0;
52		52
53	ENTER();	53	ENTER();
54		54
55	r = drm_mm_init(&mm_vram, 0x800000 >> PAGE_SHIFT,	55	r = drm_mm_init(&mm_vram, 0xC00000 >> PAGE_SHIFT,
56	((rdev->mc.real_vram_size - 0x800000) >> PAGE_SHIFT));	56	((rdev->mc.real_vram_size - 0xC00000) >> PAGE_SHIFT));
57	if (r) {	57	if (r) {
58	DRM_ERROR("Failed initializing VRAM heap.\n");	58	DRM_ERROR("Failed initializing VRAM heap.\n");
59	return r;	59	return r;
60	};	60	};
61		61
62	r = drm_mm_init(&mm_gtt, 0, ((rdev->mc.gtt_size) >> PAGE_SHIFT));	62	r = drm_mm_init(&mm_gtt, 0, ((rdev->mc.gtt_size) >> PAGE_SHIFT));
63	if (r) {	63	if (r) {
64	DRM_ERROR("Failed initializing GTT heap.\n");	64	DRM_ERROR("Failed initializing GTT heap.\n");
65	return r;	65	return r;
66	}	66	}
67		67
68	return r;	68	return r;
69	// return radeon_ttm_init(rdev);	69	// return radeon_ttm_init(rdev);
70	}	70	}
71		71
72	static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)	72	static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
73	{	73	{
74	uint32_t flags = 0;	74	uint32_t flags = 0;
75	if (domain & RADEON_GEM_DOMAIN_VRAM) {	75	if (domain & RADEON_GEM_DOMAIN_VRAM) {
76	flags \|= TTM_PL_FLAG_VRAM;	76	flags \|= TTM_PL_FLAG_VRAM;
77	}	77	}
78	if (domain & RADEON_GEM_DOMAIN_GTT) {	78	if (domain & RADEON_GEM_DOMAIN_GTT) {
79	flags \|= TTM_PL_FLAG_TT;	79	flags \|= TTM_PL_FLAG_TT;
80	}	80	}
81	if (domain & RADEON_GEM_DOMAIN_CPU) {	81	if (domain & RADEON_GEM_DOMAIN_CPU) {
82	flags \|= TTM_PL_FLAG_SYSTEM;	82	flags \|= TTM_PL_FLAG_SYSTEM;
83	}	83	}
84	if (!flags) {	84	if (!flags) {
85	flags \|= TTM_PL_FLAG_SYSTEM;	85	flags \|= TTM_PL_FLAG_SYSTEM;
86	}	86	}
87	return flags;	87	return flags;
88	}	88	}
89		89
90		90
91	int radeon_object_create(struct radeon_device *rdev,	91	int radeon_object_create(struct radeon_device *rdev,
92	struct drm_gem_object *gobj,	92	struct drm_gem_object *gobj,
93	unsigned long size,	93	unsigned long size,
94	bool kernel,	94	bool kernel,
95	uint32_t domain,	95	uint32_t domain,
96	bool interruptible,	96	bool interruptible,
97	struct radeon_object **robj_ptr)	97	struct radeon_object **robj_ptr)
98	{	98	{
99	struct radeon_object *robj;	99	struct radeon_object *robj;
100	enum ttm_bo_type type;	100	enum ttm_bo_type type;
101	uint32_t flags;	101	uint32_t flags;
102	int r;	102	int r;
103		103
104	if (kernel) {	104	if (kernel) {
105	type = ttm_bo_type_kernel;	105	type = ttm_bo_type_kernel;
106	} else {	106	} else {
107	type = ttm_bo_type_device;	107	type = ttm_bo_type_device;
108	}	108	}
109	*robj_ptr = NULL;	109	*robj_ptr = NULL;
110	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);	110	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
111	if (robj == NULL) {	111	if (robj == NULL) {
112	return -ENOMEM;	112	return -ENOMEM;
113	}	113	}
114	robj->rdev = rdev;	114	robj->rdev = rdev;
115	// robj->gobj = gobj;	115	// robj->gobj = gobj;
116	INIT_LIST_HEAD(&robj->list);	116	INIT_LIST_HEAD(&robj->list);
117		117
118	flags = radeon_object_flags_from_domain(domain);	118	flags = radeon_object_flags_from_domain(domain);
119		119
120	robj->flags = flags;	120	robj->flags = flags;
121		121
122	if( flags & TTM_PL_FLAG_VRAM)	122	if( flags & TTM_PL_FLAG_VRAM)
123	{	123	{
124	size_t num_pages;	124	size_t num_pages;
125		125
126	struct drm_mm_node *vm_node;	126	struct drm_mm_node *vm_node;
127		127
128	num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;	128	num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
129		129
130	if (num_pages == 0) {	130	if (num_pages == 0) {
131	dbgprintf("Illegal buffer object size.\n");	131	dbgprintf("Illegal buffer object size.\n");
132	return -EINVAL;	132	return -EINVAL;
133	}	133	}
134	retry_pre_get:	134	retry_pre_get:
135	r = drm_mm_pre_get(&mm_vram);	135	r = drm_mm_pre_get(&mm_vram);
136		136
137	if (unlikely(r != 0))	137	if (unlikely(r != 0))
138	return r;	138	return r;
139		139
140	vm_node = drm_mm_search_free(&mm_vram, num_pages, 0, 0);	140	vm_node = drm_mm_search_free(&mm_vram, num_pages, 0, 0);
141		141
142	if (unlikely(vm_node == NULL)) {	142	if (unlikely(vm_node == NULL)) {
143	r = -ENOMEM;	143	r = -ENOMEM;
144	return r;	144	return r;
145	}	145	}
146		146
147	robj->mm_node = drm_mm_get_block_atomic(vm_node, num_pages, 0);	147	robj->mm_node = drm_mm_get_block_atomic(vm_node, num_pages, 0);
148		148
149	if (unlikely(robj->mm_node == NULL)) {	149	if (unlikely(robj->mm_node == NULL)) {
150	goto retry_pre_get;	150	goto retry_pre_get;
151	}	151	}
152		152
153	robj->vm_addr = ((uint32_t)robj->mm_node->start);	153	robj->vm_addr = ((uint32_t)robj->mm_node->start);
154		154
155	// dbgprintf("alloc vram: base %x size %x\n",	155	// dbgprintf("alloc vram: base %x size %x\n",
156	// robj->vm_addr << PAGE_SHIFT, num_pages << PAGE_SHIFT);	156	// robj->vm_addr << PAGE_SHIFT, num_pages << PAGE_SHIFT);
157		157
158	};	158	};
159		159
160	if( flags & TTM_PL_FLAG_TT)	160	if( flags & TTM_PL_FLAG_TT)
161	{	161	{
162	size_t num_pages;	162	size_t num_pages;
163		163
164	struct drm_mm_node *vm_node;	164	struct drm_mm_node *vm_node;
165		165
166	num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;	166	num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
167		167
168	if (num_pages == 0) {	168	if (num_pages == 0) {
169	dbgprintf("Illegal buffer object size.\n");	169	dbgprintf("Illegal buffer object size.\n");
170	return -EINVAL;	170	return -EINVAL;
171	}	171	}
172	retry_pre_get1:	172	retry_pre_get1:
173	r = drm_mm_pre_get(&mm_gtt);	173	r = drm_mm_pre_get(&mm_gtt);
174		174
175	if (unlikely(r != 0))	175	if (unlikely(r != 0))
176	return r;	176	return r;
177		177
178	vm_node = drm_mm_search_free(&mm_gtt, num_pages, 0, 0);	178	vm_node = drm_mm_search_free(&mm_gtt, num_pages, 0, 0);
179		179
180	if (unlikely(vm_node == NULL)) {	180	if (unlikely(vm_node == NULL)) {
181	r = -ENOMEM;	181	r = -ENOMEM;
182	return r;	182	return r;
183	}	183	}
184		184
185	robj->mm_node = drm_mm_get_block_atomic(vm_node, num_pages, 0);	185	robj->mm_node = drm_mm_get_block_atomic(vm_node, num_pages, 0);
186		186
187	if (unlikely(robj->mm_node == NULL)) {	187	if (unlikely(robj->mm_node == NULL)) {
188	goto retry_pre_get1;	188	goto retry_pre_get1;
189	}	189	}
190		190
191	robj->vm_addr = ((uint32_t)robj->mm_node->start) ;	191	robj->vm_addr = ((uint32_t)robj->mm_node->start) ;
192		192
193	// dbgprintf("alloc gtt: base %x size %x\n",	193	// dbgprintf("alloc gtt: base %x size %x\n",
194	// robj->vm_addr << PAGE_SHIFT, num_pages << PAGE_SHIFT);	194	// robj->vm_addr << PAGE_SHIFT, num_pages << PAGE_SHIFT);
195	};	195	};
196		196
197	// r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,	197	// r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,
198	// 0, 0, false, NULL, size,	198	// 0, 0, false, NULL, size,
199	// &radeon_ttm_object_object_destroy);	199	// &radeon_ttm_object_object_destroy);
200	if (unlikely(r != 0)) {	200	if (unlikely(r != 0)) {
201	/* ttm call radeon_ttm_object_object_destroy if error happen */	201	/* ttm call radeon_ttm_object_object_destroy if error happen */
202	DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",	202	DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",
203	size, flags, 0);	203	size, flags, 0);
204	return r;	204	return r;
205	}	205	}
206	*robj_ptr = robj;	206	*robj_ptr = robj;
207	// if (gobj) {	207	// if (gobj) {
208	// list_add_tail(&robj->list, &rdev->gem.objects);	208	// list_add_tail(&robj->list, &rdev->gem.objects);
209	// }	209	// }
210	return 0;	210	return 0;
211	}	211	}
212		212
213	#define page_tabs 0xFDC00000	213	#define page_tabs 0xFDC00000
214		214
215	int radeon_object_pin(struct radeon_object *robj, uint32_t domain,	215	int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
216	uint64_t *gpu_addr)	216	uint64_t *gpu_addr)
217	{	217	{
218	uint32_t flags;	218	uint32_t flags;
219	uint32_t tmp;	219	uint32_t tmp;
220	int r = 0;	220	int r = 0;
221		221
222	// flags = radeon_object_flags_from_domain(domain);	222	// flags = radeon_object_flags_from_domain(domain);
223	// spin_lock(&robj->tobj.lock);	223	// spin_lock(&robj->tobj.lock);
224	if (robj->pin_count) {	224	if (robj->pin_count) {
225	robj->pin_count++;	225	robj->pin_count++;
226	if (gpu_addr != NULL) {	226	if (gpu_addr != NULL) {
227	*gpu_addr = robj->gpu_addr;	227	*gpu_addr = robj->gpu_addr;
228	}	228	}
229	// spin_unlock(&robj->tobj.lock);	229	// spin_unlock(&robj->tobj.lock);
230	return 0;	230	return 0;
231	}	231	}
232	// spin_unlock(&robj->tobj.lock);	232	// spin_unlock(&robj->tobj.lock);
233	// r = radeon_object_reserve(robj, false);	233	// r = radeon_object_reserve(robj, false);
234	// if (unlikely(r != 0)) {	234	// if (unlikely(r != 0)) {
235	// DRM_ERROR("radeon: failed to reserve object for pinning it.\n");	235	// DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
236	// return r;	236	// return r;
237	// }	237	// }
238	// tmp = robj->tobj.mem.placement;	238	// tmp = robj->tobj.mem.placement;
239	// ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);	239	// ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
240	// robj->tobj.proposed_placement = tmp \| TTM_PL_FLAG_NO_EVICT \| TTM_PL_MASK_CACHING;	240	// robj->tobj.proposed_placement = tmp \| TTM_PL_FLAG_NO_EVICT \| TTM_PL_MASK_CACHING;
241	// r = ttm_buffer_object_validate(&robj->tobj,	241	// r = ttm_buffer_object_validate(&robj->tobj,
242	// robj->tobj.proposed_placement,	242	// robj->tobj.proposed_placement,
243	// false, false);	243	// false, false);
244		244
245	robj->gpu_addr = ((u64)robj->vm_addr) << PAGE_SHIFT;	245	robj->gpu_addr = ((u64)robj->vm_addr) << PAGE_SHIFT;
246		246
247	if(robj->flags & TTM_PL_FLAG_VRAM)	247	if(robj->flags & TTM_PL_FLAG_VRAM)
248	robj->gpu_addr += (u64)robj->rdev->mc.vram_location;	248	robj->gpu_addr += (u64)robj->rdev->mc.vram_location;
249	else if (robj->flags & TTM_PL_FLAG_TT)	249	else if (robj->flags & TTM_PL_FLAG_TT)
250	{	250	{
251	u32_t *pagelist;	251	u32_t *pagelist;
252	robj->kptr = KernelAlloc( robj->mm_node->size << PAGE_SHIFT );	252	robj->kptr = KernelAlloc( robj->mm_node->size << PAGE_SHIFT );
253	dbgprintf("kernel alloc %x\n", robj->kptr );	253	dbgprintf("kernel alloc %x\n", robj->kptr );
254		254
255	pagelist = &((u32_t*)page_tabs)[(u32_t)robj->kptr >> 12];	255	pagelist = &((u32_t*)page_tabs)[(u32_t)robj->kptr >> 12];
256	dbgprintf("pagelist %x\n", pagelist);	256	dbgprintf("pagelist %x\n", pagelist);
257	radeon_gart_bind(robj->rdev, robj->gpu_addr,	257	radeon_gart_bind(robj->rdev, robj->gpu_addr,
258	robj->mm_node->size, pagelist);	258	robj->mm_node->size, pagelist);
259	robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;	259	robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;
260	}	260	}
261	else	261	else
262	{	262	{
263	DRM_ERROR("Unknown placement %d\n", robj->flags);	263	DRM_ERROR("Unknown placement %d\n", robj->flags);
264	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;	264	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
265	r = -1;	265	r = -1;
266	};	266	};
267		267
268	// flags & TTM_PL_FLAG_VRAM	268	// flags & TTM_PL_FLAG_VRAM
269	if (gpu_addr != NULL) {	269	if (gpu_addr != NULL) {
270	*gpu_addr = robj->gpu_addr;	270	*gpu_addr = robj->gpu_addr;
271	}	271	}
272	robj->pin_count = 1;	272	robj->pin_count = 1;
273	if (unlikely(r != 0)) {	273	if (unlikely(r != 0)) {
274	DRM_ERROR("radeon: failed to pin object.\n");	274	DRM_ERROR("radeon: failed to pin object.\n");
275	}	275	}
276		276
277	return r;	277	return r;
278	}	278	}
279		279
280	int radeon_object_kmap(struct radeon_object robj, void *ptr)	280	int radeon_object_kmap(struct radeon_object robj, void *ptr)
281	{	281	{
282	int r = 0;	282	int r = 0;
283		283
284	// spin_lock(&robj->tobj.lock);	284	// spin_lock(&robj->tobj.lock);
285	if (robj->kptr) {	285	if (robj->kptr) {
286	if (ptr) {	286	if (ptr) {
287	*ptr = robj->kptr;	287	*ptr = robj->kptr;
288	}	288	}
289	// spin_unlock(&robj->tobj.lock);	289	// spin_unlock(&robj->tobj.lock);
290	return 0;	290	return 0;
291	}	291	}
292	// spin_unlock(&robj->tobj.lock);	292	// spin_unlock(&robj->tobj.lock);
293		293
294	if(robj->flags & TTM_PL_FLAG_VRAM)	294	if(robj->flags & TTM_PL_FLAG_VRAM)
295	{	295	{
296	robj->cpu_addr = robj->rdev->mc.aper_base +	296	robj->cpu_addr = robj->rdev->mc.aper_base +
297	(robj->vm_addr << PAGE_SHIFT);	297	(robj->vm_addr << PAGE_SHIFT);
298	robj->kptr = (void*)MapIoMem(robj->cpu_addr,	298	robj->kptr = (void*)MapIoMem(robj->cpu_addr,
299	robj->mm_node->size << 12, PG_SW);	299	robj->mm_node->size << 12, PG_SW);
300	// dbgprintf("map io mem %x at %x\n", robj->cpu_addr, robj->kptr);	-
301		-
302	}	300	}
303	else	301	else
304	{	302	{
305	return -1;	303	return -1;
306	}	304	}
307		305
308	if (ptr) {	306	if (ptr) {
309	*ptr = robj->kptr;	307	*ptr = robj->kptr;
310	}	308	}
311		309
312	return 0;	310	return 0;
313	}	311	}
314		312
315	void radeon_object_kunmap(struct radeon_object *robj)	313	void radeon_object_kunmap(struct radeon_object *robj)
316	{	314	{
317	// spin_lock(&robj->tobj.lock);	315	// spin_lock(&robj->tobj.lock);
318	if (robj->kptr == NULL) {	316	if (robj->kptr == NULL) {
319	// spin_unlock(&robj->tobj.lock);	317	// spin_unlock(&robj->tobj.lock);
320	return;	318	return;
321	}	319	}
322		320
323	if (robj->flags & TTM_PL_FLAG_VRAM)	321	if (robj->flags & TTM_PL_FLAG_VRAM)
324	{	322	{
325	FreeKernelSpace(robj->kptr);	323	FreeKernelSpace(robj->kptr);
326	robj->kptr = NULL;	324	robj->kptr = NULL;
327	}	325	}
328	// spin_unlock(&robj->tobj.lock);	326	// spin_unlock(&robj->tobj.lock);
329	}	327	}
330		-
331	#if 0	328
332		329
333	void radeon_object_unpin(struct radeon_object *robj)	330	void radeon_object_unpin(struct radeon_object *robj)
334	{	331	{
335	uint32_t flags;	332	uint32_t flags;
336	int r;	333	int r;
337		334
338	// spin_lock(&robj->tobj.lock);	335	// spin_lock(&robj->tobj.lock);
339	if (!robj->pin_count) {	336	if (!robj->pin_count) {
340	// spin_unlock(&robj->tobj.lock);	337	// spin_unlock(&robj->tobj.lock);
341	printk(KERN_WARNING "Unpin not necessary for %p !\n", robj);	338	printk(KERN_WARNING "Unpin not necessary for %p !\n", robj);
342	return;	339	return;
343	}	340	}
344	robj->pin_count--;	341	robj->pin_count--;
345	if (robj->pin_count) {	342	if (robj->pin_count) {
346	// spin_unlock(&robj->tobj.lock);	343	// spin_unlock(&robj->tobj.lock);
347	return;	344	return;
348	}	345	}
349	// spin_unlock(&robj->tobj.lock);	346	// spin_unlock(&robj->tobj.lock);
350	r = radeon_object_reserve(robj, false);	-
351	if (unlikely(r != 0)) {	-
352	DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");	-
353	return;	-
354	}	-
355	flags = robj->tobj.mem.placement;	-
356	robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;	-
357	r = ttm_buffer_object_validate(&robj->tobj,	-
358	robj->tobj.proposed_placement,	-
359	false, false);	-
360	if (unlikely(r != 0)) {	-
361	DRM_ERROR("radeon: failed to unpin buffer.\n");	-
362	}	-
363	radeon_object_unreserve(robj);	-
364	}	-
-		347
-		348	drm_mm_put_block(robj->mm_node);
-		349
-		350	kfree(robj);
-		351	}
365		352
366		353
367		354	#if 0
368		355
369		356
370	/*	357	/*
371	* To exclude mutual BO access we rely on bo_reserve exclusion, as all	358	* To exclude mutual BO access we rely on bo_reserve exclusion, as all
372	* function are calling it.	359	* function are calling it.
373	*/	360	*/
374		361
375	static int radeon_object_reserve(struct radeon_object *robj, bool interruptible)	362	static int radeon_object_reserve(struct radeon_object *robj, bool interruptible)
376	{	363	{
377	return ttm_bo_reserve(&robj->tobj, interruptible, false, false, 0);	364	return ttm_bo_reserve(&robj->tobj, interruptible, false, false, 0);
378	}	365	}
379		366
380	static void radeon_object_unreserve(struct radeon_object *robj)	367	static void radeon_object_unreserve(struct radeon_object *robj)
381	{	368	{
382	ttm_bo_unreserve(&robj->tobj);	369	ttm_bo_unreserve(&robj->tobj);
383	}	370	}
384		371
385	static void radeon_ttm_object_object_destroy(struct ttm_buffer_object *tobj)	372	static void radeon_ttm_object_object_destroy(struct ttm_buffer_object *tobj)
386	{	373	{
387	struct radeon_object *robj;	374	struct radeon_object *robj;
388		375
389	robj = container_of(tobj, struct radeon_object, tobj);	376	robj = container_of(tobj, struct radeon_object, tobj);
390	// list_del_init(&robj->list);	377	// list_del_init(&robj->list);
391	kfree(robj);	378	kfree(robj);
392	}	379	}
393		380
394	static inline void radeon_object_gpu_addr(struct radeon_object *robj)	381	static inline void radeon_object_gpu_addr(struct radeon_object *robj)
395	{	382	{
396	/* Default gpu address */	383	/* Default gpu address */
397	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;	384	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
398	if (robj->tobj.mem.mm_node == NULL) {	385	if (robj->tobj.mem.mm_node == NULL) {
399	return;	386	return;
400	}	387	}
401	robj->gpu_addr = ((u64)robj->tobj.mem.mm_node->start) << PAGE_SHIFT;	388	robj->gpu_addr = ((u64)robj->tobj.mem.mm_node->start) << PAGE_SHIFT;
402	switch (robj->tobj.mem.mem_type) {	389	switch (robj->tobj.mem.mem_type) {
403	case TTM_PL_VRAM:	390	case TTM_PL_VRAM:
404	robj->gpu_addr += (u64)robj->rdev->mc.vram_location;	391	robj->gpu_addr += (u64)robj->rdev->mc.vram_location;
405	break;	392	break;
406	case TTM_PL_TT:	393	case TTM_PL_TT:
407	robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;	394	robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;
408	break;	395	break;
409	default:	396	default:
410	DRM_ERROR("Unknown placement %d\n", robj->tobj.mem.mem_type);	397	DRM_ERROR("Unknown placement %d\n", robj->tobj.mem.mem_type);
411	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;	398	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
412	return;	399	return;
413	}	400	}
414	}	401	}
415		402
416		403
417	int radeon_object_create(struct radeon_device *rdev,	404	int radeon_object_create(struct radeon_device *rdev,
418	struct drm_gem_object *gobj,	405	struct drm_gem_object *gobj,
419	unsigned long size,	406	unsigned long size,
420	bool kernel,	407	bool kernel,
421	uint32_t domain,	408	uint32_t domain,
422	bool interruptible,	409	bool interruptible,
423	struct radeon_object **robj_ptr)	410	struct radeon_object **robj_ptr)
424	{	411	{
425	struct radeon_object *robj;	412	struct radeon_object *robj;
426	enum ttm_bo_type type;	413	enum ttm_bo_type type;
427	uint32_t flags;	414	uint32_t flags;
428	int r;	415	int r;
429		416
430	// if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {	417	// if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
431	// rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;	418	// rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
432	// }	419	// }
433	if (kernel) {	420	if (kernel) {
434	type = ttm_bo_type_kernel;	421	type = ttm_bo_type_kernel;
435	} else {	422	} else {
436	type = ttm_bo_type_device;	423	type = ttm_bo_type_device;
437	}	424	}
438	*robj_ptr = NULL;	425	*robj_ptr = NULL;
439	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);	426	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
440	if (robj == NULL) {	427	if (robj == NULL) {
441	return -ENOMEM;	428	return -ENOMEM;
442	}	429	}
443	robj->rdev = rdev;	430	robj->rdev = rdev;
444	robj->gobj = gobj;	431	robj->gobj = gobj;
445	// INIT_LIST_HEAD(&robj->list);	432	// INIT_LIST_HEAD(&robj->list);
446		433
447	flags = radeon_object_flags_from_domain(domain);	434	flags = radeon_object_flags_from_domain(domain);
448	// r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,	435	// r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,
449	// 0, 0, false, NULL, size,	436	// 0, 0, false, NULL, size,
450	// &radeon_ttm_object_object_destroy);	437	// &radeon_ttm_object_object_destroy);
451	if (unlikely(r != 0)) {	438	if (unlikely(r != 0)) {
452	/* ttm call radeon_ttm_object_object_destroy if error happen */	439	/* ttm call radeon_ttm_object_object_destroy if error happen */
453	DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",	440	DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",
454	size, flags, 0);	441	size, flags, 0);
455	return r;	442	return r;
456	}	443	}
457	*robj_ptr = robj;	444	*robj_ptr = robj;
458	// if (gobj) {	445	// if (gobj) {
459	// list_add_tail(&robj->list, &rdev->gem.objects);	446	// list_add_tail(&robj->list, &rdev->gem.objects);
460	// }	447	// }
461	return 0;	448	return 0;
462	}	449	}
463		450
464	int radeon_object_kmap(struct radeon_object robj, void *ptr)	451	int radeon_object_kmap(struct radeon_object robj, void *ptr)
465	{	452	{
466	int r;	453	int r;
467		454
468	// spin_lock(&robj->tobj.lock);	455	// spin_lock(&robj->tobj.lock);
469	if (robj->kptr) {	456	if (robj->kptr) {
470	if (ptr) {	457	if (ptr) {
471	*ptr = robj->kptr;	458	*ptr = robj->kptr;
472	}	459	}
473	// spin_unlock(&robj->tobj.lock);	460	// spin_unlock(&robj->tobj.lock);
474	return 0;	461	return 0;
475	}	462	}
476	// spin_unlock(&robj->tobj.lock);	463	// spin_unlock(&robj->tobj.lock);
477	r = ttm_bo_kmap(&robj->tobj, 0, robj->tobj.num_pages, &robj->kmap);	464	r = ttm_bo_kmap(&robj->tobj, 0, robj->tobj.num_pages, &robj->kmap);
478	if (r) {	465	if (r) {
479	return r;	466	return r;
480	}	467	}
481	// spin_lock(&robj->tobj.lock);	468	// spin_lock(&robj->tobj.lock);
482	robj->kptr = ttm_kmap_obj_virtual(&robj->kmap, &robj->is_iomem);	469	robj->kptr = ttm_kmap_obj_virtual(&robj->kmap, &robj->is_iomem);
483	// spin_unlock(&robj->tobj.lock);	470	// spin_unlock(&robj->tobj.lock);
484	if (ptr) {	471	if (ptr) {
485	*ptr = robj->kptr;	472	*ptr = robj->kptr;
486	}	473	}
487	return 0;	474	return 0;
488	}	475	}
489		476
490	void radeon_object_kunmap(struct radeon_object *robj)	477	void radeon_object_kunmap(struct radeon_object *robj)
491	{	478	{
492	// spin_lock(&robj->tobj.lock);	479	// spin_lock(&robj->tobj.lock);
493	if (robj->kptr == NULL) {	480	if (robj->kptr == NULL) {
494	// spin_unlock(&robj->tobj.lock);	481	// spin_unlock(&robj->tobj.lock);
495	return;	482	return;

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/radeon_object.c – Rev 1275 → 1313