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Rev 3764 | Rev 5078 | ||
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Line 44... | Line 44... | ||
44 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
44 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
45 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
45 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
Line -... | Line 48... | ||
- | 48 | ||
- | 49 | #define RADEON_MAX_HPD_PINS 7 |
|
- | 50 | #define RADEON_MAX_CRTCS 6 |
|
- | 51 | #define RADEON_MAX_AFMT_BLOCKS 7 |
|
48 | 52 | ||
49 | enum radeon_rmx_type { |
53 | enum radeon_rmx_type { |
50 | RMX_OFF, |
54 | RMX_OFF, |
51 | RMX_FULL, |
55 | RMX_FULL, |
52 | RMX_CENTER, |
56 | RMX_CENTER, |
Line 185... | Line 189... | ||
185 | }; |
189 | }; |
Line 186... | Line 190... | ||
186 | 190 | ||
187 | struct radeon_i2c_chan { |
191 | struct radeon_i2c_chan { |
188 | struct i2c_adapter adapter; |
192 | struct i2c_adapter adapter; |
189 | struct drm_device *dev; |
- | |
190 | union { |
193 | struct drm_device *dev; |
191 | struct i2c_algo_bit_data bit; |
- | |
192 | struct i2c_algo_dp_aux_data dp; |
- | |
193 | } algo; |
194 | struct i2c_algo_bit_data bit; |
- | 195 | struct radeon_i2c_bus_rec rec; |
|
- | 196 | struct drm_dp_aux aux; |
|
- | 197 | bool has_aux; |
|
194 | struct radeon_i2c_bus_rec rec; |
198 | struct mutex mutex; |
Line 195... | Line 199... | ||
195 | }; |
199 | }; |
196 | 200 | ||
197 | /* mostly for macs, but really any system without connector tables */ |
201 | /* mostly for macs, but really any system without connector tables */ |
Line 223... | Line 227... | ||
223 | struct radeon_afmt { |
227 | struct radeon_afmt { |
224 | bool enabled; |
228 | bool enabled; |
225 | int offset; |
229 | int offset; |
226 | bool last_buffer_filled_status; |
230 | bool last_buffer_filled_status; |
227 | int id; |
231 | int id; |
- | 232 | struct r600_audio_pin *pin; |
|
228 | }; |
233 | }; |
Line 229... | Line 234... | ||
229 | 234 | ||
230 | struct radeon_mode_info { |
235 | struct radeon_mode_info { |
231 | struct atom_context *atom_context; |
236 | struct atom_context *atom_context; |
232 | struct card_info *atom_card_info; |
237 | struct card_info *atom_card_info; |
233 | enum radeon_connector_table connector_table; |
238 | enum radeon_connector_table connector_table; |
234 | bool mode_config_initialized; |
239 | bool mode_config_initialized; |
235 | struct radeon_crtc *crtcs[6]; |
240 | struct radeon_crtc *crtcs[RADEON_MAX_CRTCS]; |
236 | struct radeon_afmt *afmt[6]; |
241 | struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS]; |
237 | /* DVI-I properties */ |
242 | /* DVI-I properties */ |
238 | struct drm_property *coherent_mode_property; |
243 | struct drm_property *coherent_mode_property; |
239 | /* DAC enable load detect */ |
244 | /* DAC enable load detect */ |
240 | struct drm_property *load_detect_property; |
245 | struct drm_property *load_detect_property; |
Line 244... | Line 249... | ||
244 | struct drm_property *tmds_pll_property; |
249 | struct drm_property *tmds_pll_property; |
245 | /* underscan */ |
250 | /* underscan */ |
246 | struct drm_property *underscan_property; |
251 | struct drm_property *underscan_property; |
247 | struct drm_property *underscan_hborder_property; |
252 | struct drm_property *underscan_hborder_property; |
248 | struct drm_property *underscan_vborder_property; |
253 | struct drm_property *underscan_vborder_property; |
- | 254 | /* audio */ |
|
- | 255 | struct drm_property *audio_property; |
|
- | 256 | /* FMT dithering */ |
|
- | 257 | struct drm_property *dither_property; |
|
249 | /* hardcoded DFP edid from BIOS */ |
258 | /* hardcoded DFP edid from BIOS */ |
250 | struct edid *bios_hardcoded_edid; |
259 | struct edid *bios_hardcoded_edid; |
251 | int bios_hardcoded_edid_size; |
260 | int bios_hardcoded_edid_size; |
Line 252... | Line 261... | ||
252 | 261 | ||
Line 284... | Line 293... | ||
284 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
293 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
285 | }; |
294 | }; |
Line 286... | Line 295... | ||
286 | 295 | ||
287 | struct radeon_atom_ss { |
296 | struct radeon_atom_ss { |
- | 297 | uint16_t percentage; |
|
288 | uint16_t percentage; |
298 | uint16_t percentage_divider; |
289 | uint8_t type; |
299 | uint8_t type; |
290 | uint16_t step; |
300 | uint16_t step; |
291 | uint8_t delay; |
301 | uint8_t delay; |
292 | uint8_t range; |
302 | uint8_t range; |
293 | uint8_t refdiv; |
303 | uint8_t refdiv; |
294 | /* asic_ss */ |
304 | /* asic_ss */ |
295 | uint16_t rate; |
305 | uint16_t rate; |
296 | uint16_t amount; |
306 | uint16_t amount; |
Line -... | Line 307... | ||
- | 307 | }; |
|
- | 308 | ||
- | 309 | enum radeon_flip_status { |
|
- | 310 | RADEON_FLIP_NONE, |
|
- | 311 | RADEON_FLIP_PENDING, |
|
- | 312 | RADEON_FLIP_SUBMITTED |
|
297 | }; |
313 | }; |
298 | 314 | ||
299 | struct radeon_crtc { |
315 | struct radeon_crtc { |
300 | struct drm_crtc base; |
316 | struct drm_crtc base; |
301 | int crtc_id; |
317 | int crtc_id; |
Line 305... | Line 321... | ||
305 | uint32_t crtc_offset; |
321 | uint32_t crtc_offset; |
306 | struct drm_gem_object *cursor_bo; |
322 | struct drm_gem_object *cursor_bo; |
307 | uint64_t cursor_addr; |
323 | uint64_t cursor_addr; |
308 | int cursor_width; |
324 | int cursor_width; |
309 | int cursor_height; |
325 | int cursor_height; |
- | 326 | int max_cursor_width; |
|
- | 327 | int max_cursor_height; |
|
310 | uint32_t legacy_display_base_addr; |
328 | uint32_t legacy_display_base_addr; |
311 | uint32_t legacy_cursor_offset; |
329 | uint32_t legacy_cursor_offset; |
312 | enum radeon_rmx_type rmx_type; |
330 | enum radeon_rmx_type rmx_type; |
313 | u8 h_border; |
331 | u8 h_border; |
314 | u8 v_border; |
332 | u8 v_border; |
315 | fixed20_12 vsc; |
333 | fixed20_12 vsc; |
316 | fixed20_12 hsc; |
334 | fixed20_12 hsc; |
317 | struct drm_display_mode native_mode; |
335 | struct drm_display_mode native_mode; |
318 | int pll_id; |
336 | int pll_id; |
- | 337 | /* page flipping */ |
|
- | 338 | struct workqueue_struct *flip_queue; |
|
319 | int deferred_flip_completion; |
339 | struct radeon_flip_work *flip_work; |
- | 340 | enum radeon_flip_status flip_status; |
|
320 | /* pll sharing */ |
341 | /* pll sharing */ |
321 | struct radeon_atom_ss ss; |
342 | struct radeon_atom_ss ss; |
322 | bool ss_enabled; |
343 | bool ss_enabled; |
323 | u32 adjusted_clock; |
344 | u32 adjusted_clock; |
324 | int bpc; |
345 | int bpc; |
325 | u32 pll_reference_div; |
346 | u32 pll_reference_div; |
326 | u32 pll_post_div; |
347 | u32 pll_post_div; |
327 | u32 pll_flags; |
348 | u32 pll_flags; |
328 | struct drm_encoder *encoder; |
349 | struct drm_encoder *encoder; |
329 | struct drm_connector *connector; |
350 | struct drm_connector *connector; |
- | 351 | /* for dpm */ |
|
- | 352 | u32 line_time; |
|
- | 353 | u32 wm_low; |
|
- | 354 | u32 wm_high; |
|
- | 355 | struct drm_display_mode hw_mode; |
|
330 | }; |
356 | }; |
Line 331... | Line 357... | ||
331 | 357 | ||
332 | struct radeon_encoder_primary_dac { |
358 | struct radeon_encoder_primary_dac { |
333 | /* legacy primary dac */ |
359 | /* legacy primary dac */ |
Line 422... | Line 448... | ||
422 | }; |
448 | }; |
Line 423... | Line 449... | ||
423 | 449 | ||
424 | struct radeon_connector_atom_dig { |
450 | struct radeon_connector_atom_dig { |
425 | uint32_t igp_lane_info; |
451 | uint32_t igp_lane_info; |
426 | /* displayport */ |
- | |
427 | struct radeon_i2c_chan *dp_i2c_bus; |
452 | /* displayport */ |
428 | u8 dpcd[DP_RECEIVER_CAP_SIZE]; |
453 | u8 dpcd[DP_RECEIVER_CAP_SIZE]; |
429 | u8 dp_sink_type; |
454 | u8 dp_sink_type; |
430 | int dp_clock; |
455 | int dp_clock; |
431 | int dp_lane_count; |
456 | int dp_lane_count; |
Line 459... | Line 484... | ||
459 | u8 cd_mux_type; |
484 | u8 cd_mux_type; |
460 | u8 cd_mux_control_pin; |
485 | u8 cd_mux_control_pin; |
461 | u8 cd_mux_state; |
486 | u8 cd_mux_state; |
462 | }; |
487 | }; |
Line -... | Line 488... | ||
- | 488 | ||
- | 489 | enum radeon_connector_audio { |
|
- | 490 | RADEON_AUDIO_DISABLE = 0, |
|
- | 491 | RADEON_AUDIO_ENABLE = 1, |
|
- | 492 | RADEON_AUDIO_AUTO = 2 |
|
- | 493 | }; |
|
- | 494 | ||
- | 495 | enum radeon_connector_dither { |
|
- | 496 | RADEON_FMT_DITHER_DISABLE = 0, |
|
- | 497 | RADEON_FMT_DITHER_ENABLE = 1, |
|
- | 498 | }; |
|
463 | 499 | ||
464 | struct radeon_connector { |
500 | struct radeon_connector { |
465 | struct drm_connector base; |
501 | struct drm_connector base; |
466 | uint32_t connector_id; |
502 | uint32_t connector_id; |
467 | uint32_t devices; |
503 | uint32_t devices; |
Line 477... | Line 513... | ||
477 | bool detected_by_load; /* if the connection status was determined by load */ |
513 | bool detected_by_load; /* if the connection status was determined by load */ |
478 | uint16_t connector_object_id; |
514 | uint16_t connector_object_id; |
479 | struct radeon_hpd hpd; |
515 | struct radeon_hpd hpd; |
480 | struct radeon_router router; |
516 | struct radeon_router router; |
481 | struct radeon_i2c_chan *router_bus; |
517 | struct radeon_i2c_chan *router_bus; |
- | 518 | enum radeon_connector_audio audio; |
|
- | 519 | enum radeon_connector_dither dither; |
|
- | 520 | int pixelclock_for_modeset; |
|
482 | }; |
521 | }; |
Line 483... | Line 522... | ||
483 | 522 | ||
484 | struct radeon_framebuffer { |
523 | struct radeon_framebuffer { |
485 | struct drm_framebuffer base; |
524 | struct drm_framebuffer base; |
Line 508... | Line 547... | ||
508 | u32 ref_div; |
547 | u32 ref_div; |
509 | bool enable_post_div; |
548 | bool enable_post_div; |
510 | bool enable_dithen; |
549 | bool enable_dithen; |
511 | u32 vco_mode; |
550 | u32 vco_mode; |
512 | u32 real_clock; |
551 | u32 real_clock; |
- | 552 | /* added for CI */ |
|
- | 553 | u32 post_divider; |
|
- | 554 | u32 flags; |
|
513 | }; |
555 | }; |
Line -... | Line 556... | ||
- | 556 | ||
- | 557 | struct atom_mpll_param { |
|
- | 558 | union { |
|
- | 559 | struct { |
|
- | 560 | #ifdef __BIG_ENDIAN |
|
- | 561 | u32 reserved : 8; |
|
- | 562 | u32 clkfrac : 12; |
|
- | 563 | u32 clkf : 12; |
|
- | 564 | #else |
|
- | 565 | u32 clkf : 12; |
|
- | 566 | u32 clkfrac : 12; |
|
- | 567 | u32 reserved : 8; |
|
- | 568 | #endif |
|
- | 569 | }; |
|
- | 570 | u32 fb_div; |
|
- | 571 | }; |
|
- | 572 | u32 post_div; |
|
- | 573 | u32 bwcntl; |
|
- | 574 | u32 dll_speed; |
|
- | 575 | u32 vco_mode; |
|
- | 576 | u32 yclk_sel; |
|
- | 577 | u32 qdr; |
|
- | 578 | u32 half_rate; |
|
- | 579 | }; |
|
- | 580 | ||
- | 581 | #define MEM_TYPE_GDDR5 0x50 |
|
- | 582 | #define MEM_TYPE_GDDR4 0x40 |
|
- | 583 | #define MEM_TYPE_GDDR3 0x30 |
|
- | 584 | #define MEM_TYPE_DDR2 0x20 |
|
- | 585 | #define MEM_TYPE_GDDR1 0x10 |
|
- | 586 | #define MEM_TYPE_DDR3 0xb0 |
|
- | 587 | #define MEM_TYPE_MASK 0xf0 |
|
- | 588 | ||
- | 589 | struct atom_memory_info { |
|
- | 590 | u8 mem_vendor; |
|
- | 591 | u8 mem_type; |
|
- | 592 | }; |
|
- | 593 | ||
- | 594 | #define MAX_AC_TIMING_ENTRIES 16 |
|
- | 595 | ||
- | 596 | struct atom_memory_clock_range_table |
|
- | 597 | { |
|
- | 598 | u8 num_entries; |
|
- | 599 | u8 rsv[3]; |
|
- | 600 | u32 mclk[MAX_AC_TIMING_ENTRIES]; |
|
- | 601 | }; |
|
- | 602 | ||
- | 603 | #define VBIOS_MC_REGISTER_ARRAY_SIZE 32 |
|
- | 604 | #define VBIOS_MAX_AC_TIMING_ENTRIES 20 |
|
- | 605 | ||
- | 606 | struct atom_mc_reg_entry { |
|
- | 607 | u32 mclk_max; |
|
- | 608 | u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; |
|
- | 609 | }; |
|
- | 610 | ||
- | 611 | struct atom_mc_register_address { |
|
- | 612 | u16 s1; |
|
- | 613 | u8 pre_reg_data; |
|
- | 614 | }; |
|
- | 615 | ||
- | 616 | struct atom_mc_reg_table { |
|
- | 617 | u8 last; |
|
- | 618 | u8 num_entries; |
|
- | 619 | struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES]; |
|
- | 620 | struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; |
|
- | 621 | }; |
|
- | 622 | ||
- | 623 | #define MAX_VOLTAGE_ENTRIES 32 |
|
- | 624 | ||
- | 625 | struct atom_voltage_table_entry |
|
- | 626 | { |
|
- | 627 | u16 value; |
|
- | 628 | u32 smio_low; |
|
- | 629 | }; |
|
- | 630 | ||
- | 631 | struct atom_voltage_table |
|
- | 632 | { |
|
- | 633 | u32 count; |
|
- | 634 | u32 mask_low; |
|
- | 635 | u32 phase_delay; |
|
- | 636 | struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES]; |
|
- | 637 | }; |
|
- | 638 | ||
- | 639 | ||
- | 640 | extern void |
|
- | 641 | radeon_add_atom_connector(struct drm_device *dev, |
|
- | 642 | uint32_t connector_id, |
|
- | 643 | uint32_t supported_device, |
|
- | 644 | int connector_type, |
|
- | 645 | struct radeon_i2c_bus_rec *i2c_bus, |
|
- | 646 | uint32_t igp_lane_info, |
|
- | 647 | uint16_t connector_object_id, |
|
- | 648 | struct radeon_hpd *hpd, |
|
- | 649 | struct radeon_router *router); |
|
- | 650 | extern void |
|
- | 651 | radeon_add_legacy_connector(struct drm_device *dev, |
|
- | 652 | uint32_t connector_id, |
|
- | 653 | uint32_t supported_device, |
|
- | 654 | int connector_type, |
|
- | 655 | struct radeon_i2c_bus_rec *i2c_bus, |
|
- | 656 | uint16_t connector_object_id, |
|
- | 657 | struct radeon_hpd *hpd); |
|
- | 658 | extern uint32_t |
|
- | 659 | radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, |
|
- | 660 | uint8_t dac); |
|
- | 661 | extern void radeon_link_encoder_connector(struct drm_device *dev); |
|
514 | 662 | ||
515 | extern enum radeon_tv_std |
663 | extern enum radeon_tv_std |
516 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
664 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
517 | extern enum radeon_tv_std |
665 | extern enum radeon_tv_std |
- | 666 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
|
- | 667 | extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev, |
|
- | 668 | u16 *vddc, u16 *vddci, u16 *mvdd); |
|
- | 669 | ||
- | 670 | extern void |
|
- | 671 | radeon_combios_connected_scratch_regs(struct drm_connector *connector, |
|
- | 672 | struct drm_encoder *encoder, |
|
- | 673 | bool connected); |
|
- | 674 | extern void |
|
- | 675 | radeon_atombios_connected_scratch_regs(struct drm_connector *connector, |
|
- | 676 | struct drm_encoder *encoder, |
|
Line 518... | Line 677... | ||
518 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
677 | bool connected); |
519 | 678 | ||
520 | extern struct drm_connector * |
679 | extern struct drm_connector * |
521 | radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
680 | radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
522 | extern struct drm_connector * |
681 | extern struct drm_connector * |
523 | radeon_get_connector_for_encoder_init(struct drm_encoder *encoder); |
682 | radeon_get_connector_for_encoder_init(struct drm_encoder *encoder); |
Line 524... | Line 683... | ||
524 | extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, |
683 | extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, |
525 | u32 pixel_clock); |
684 | u32 pixel_clock); |
526 | - | ||
527 | extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder); |
685 | |
528 | extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector); |
686 | extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder); |
Line -... | Line 687... | ||
- | 687 | extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector); |
|
- | 688 | extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
|
529 | extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector); |
689 | extern int radeon_get_monitor_bpc(struct drm_connector *connector); |
530 | extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
690 | |
531 | extern int radeon_get_monitor_bpc(struct drm_connector *connector); |
691 | extern struct edid *radeon_connector_edid(struct drm_connector *connector); |
532 | 692 | ||
533 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
693 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
Line 540... | Line 700... | ||
540 | extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
700 | extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
541 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
701 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
542 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
702 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
543 | extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder, |
703 | extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder, |
544 | struct drm_connector *connector); |
704 | struct drm_connector *connector); |
- | 705 | extern void radeon_dp_set_rx_power_state(struct drm_connector *connector, |
|
- | 706 | u8 power_state); |
|
- | 707 | extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector); |
|
545 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
708 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
546 | extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
709 | extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
547 | extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev); |
710 | extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev); |
548 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
711 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
549 | int action, uint8_t lane_num, |
712 | int action, uint8_t lane_num, |
550 | uint8_t lane_set); |
713 | uint8_t lane_set); |
551 | extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); |
714 | extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); |
552 | extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder); |
715 | extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder); |
553 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
716 | void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le); |
554 | u8 write_byte, u8 *read_byte); |
- | |
Line 555... | Line 717... | ||
555 | 717 | ||
556 | extern void radeon_i2c_init(struct radeon_device *rdev); |
718 | extern void radeon_i2c_init(struct radeon_device *rdev); |
557 | extern void radeon_i2c_fini(struct radeon_device *rdev); |
719 | extern void radeon_i2c_fini(struct radeon_device *rdev); |
558 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); |
720 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); |
559 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); |
721 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); |
560 | extern void radeon_i2c_add(struct radeon_device *rdev, |
722 | extern void radeon_i2c_add(struct radeon_device *rdev, |
561 | struct radeon_i2c_bus_rec *rec, |
723 | struct radeon_i2c_bus_rec *rec, |
562 | const char *name); |
724 | const char *name); |
563 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, |
725 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, |
564 | struct radeon_i2c_bus_rec *i2c_bus); |
- | |
565 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
- | |
566 | struct radeon_i2c_bus_rec *rec, |
- | |
567 | const char *name); |
726 | struct radeon_i2c_bus_rec *i2c_bus); |
568 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
727 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
569 | struct radeon_i2c_bus_rec *rec, |
728 | struct radeon_i2c_bus_rec *rec, |
570 | const char *name); |
729 | const char *name); |
571 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
730 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
Line 578... | Line 737... | ||
578 | u8 addr, |
737 | u8 addr, |
579 | u8 val); |
738 | u8 val); |
580 | extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
739 | extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
581 | extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
740 | extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
582 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux); |
741 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux); |
583 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
- | |
Line 584... | Line 742... | ||
584 | 742 | ||
Line 585... | Line 743... | ||
585 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
743 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
586 | 744 | ||
Line 650... | Line 808... | ||
650 | uint32_t height); |
808 | uint32_t height); |
651 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
809 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
652 | int x, int y); |
810 | int x, int y); |
Line 653... | Line 811... | ||
653 | 811 | ||
- | 812 | extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, |
|
654 | extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, |
813 | unsigned int flags, |
- | 814 | int *vpos, int *hpos, void *stime, |
|
Line 655... | Line 815... | ||
655 | int *vpos, int *hpos); |
815 | void *etime); |
656 | 816 | ||
657 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
817 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
658 | extern struct edid * |
818 | extern struct edid * |
Line 742... | Line 902... | ||
742 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
902 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
743 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
903 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
744 | struct drm_display_mode *mode, |
904 | struct drm_display_mode *mode, |
745 | struct drm_display_mode *adjusted_mode); |
905 | struct drm_display_mode *adjusted_mode); |
Line -... | Line 906... | ||
- | 906 | ||
- | 907 | /* fmt blocks */ |
|
- | 908 | void avivo_program_fmt(struct drm_encoder *encoder); |
|
- | 909 | void dce3_program_fmt(struct drm_encoder *encoder); |
|
- | 910 | void dce4_program_fmt(struct drm_encoder *encoder); |
|
- | 911 | void dce8_program_fmt(struct drm_encoder *encoder); |
|
746 | 912 | ||
747 | /* fbdev layer */ |
913 | /* fbdev layer */ |
748 | int radeon_fbdev_init(struct radeon_device *rdev); |
914 | int radeon_fbdev_init(struct radeon_device *rdev); |
749 | void radeon_fbdev_fini(struct radeon_device *rdev); |
915 | void radeon_fbdev_fini(struct radeon_device *rdev); |
750 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
916 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
751 | int radeon_fbdev_total_size(struct radeon_device *rdev); |
917 | int radeon_fbdev_total_size(struct radeon_device *rdev); |
Line 752... | Line 918... | ||
752 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
918 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
Line -... | Line 919... | ||
- | 919 | ||
753 | 920 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
|
Line 754... | Line 921... | ||
754 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
921 | |
755 | 922 | void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id); |