Rev 1963 | Rev 2160 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1963 | Rev 1986 | ||
|---|---|---|---|
| 1 | /* |
1 | /* |
| 2 | * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and |
2 | * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and |
| 3 | * VA Linux Systems Inc., Fremont, California. |
3 | * VA Linux Systems Inc., Fremont, California. |
| 4 | * Copyright 2008 Red Hat Inc. |
4 | * Copyright 2008 Red Hat Inc. |
| 5 | * |
5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
14 | * all copies or substantial portions of the Software. |
| 15 | * |
15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
23 | * |
| 24 | * Original Authors: |
24 | * Original Authors: |
| 25 | * Kevin E. Martin, Rickard E. Faith, Alan Hourihane |
25 | * Kevin E. Martin, Rickard E. Faith, Alan Hourihane |
| 26 | * |
26 | * |
| 27 | * Kernel port Author: Dave Airlie |
27 | * Kernel port Author: Dave Airlie |
| 28 | */ |
28 | */ |
| 29 | 29 | ||
| 30 | #ifndef RADEON_MODE_H |
30 | #ifndef RADEON_MODE_H |
| 31 | #define RADEON_MODE_H |
31 | #define RADEON_MODE_H |
| 32 | 32 | ||
| 33 | #include |
33 | #include |
| 34 | #include |
34 | #include |
| 35 | #include |
35 | #include |
| 36 | #include |
36 | #include |
| 37 | #include |
37 | #include |
| 38 | #include |
38 | #include |
| 39 | #include |
39 | #include |
| 40 | #include |
40 | #include |
| 41 | 41 | ||
| 42 | struct radeon_bo; |
42 | struct radeon_bo; |
| 43 | struct radeon_device; |
43 | struct radeon_device; |
| 44 | 44 | ||
| 45 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
45 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
| 46 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
46 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
| 47 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
47 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
| 48 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
48 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
| 49 | 49 | ||
| 50 | enum radeon_rmx_type { |
50 | enum radeon_rmx_type { |
| 51 | RMX_OFF, |
51 | RMX_OFF, |
| 52 | RMX_FULL, |
52 | RMX_FULL, |
| 53 | RMX_CENTER, |
53 | RMX_CENTER, |
| 54 | RMX_ASPECT |
54 | RMX_ASPECT |
| 55 | }; |
55 | }; |
| 56 | 56 | ||
| 57 | enum radeon_tv_std { |
57 | enum radeon_tv_std { |
| 58 | TV_STD_NTSC, |
58 | TV_STD_NTSC, |
| 59 | TV_STD_PAL, |
59 | TV_STD_PAL, |
| 60 | TV_STD_PAL_M, |
60 | TV_STD_PAL_M, |
| 61 | TV_STD_PAL_60, |
61 | TV_STD_PAL_60, |
| 62 | TV_STD_NTSC_J, |
62 | TV_STD_NTSC_J, |
| 63 | TV_STD_SCART_PAL, |
63 | TV_STD_SCART_PAL, |
| 64 | TV_STD_SECAM, |
64 | TV_STD_SECAM, |
| 65 | TV_STD_PAL_CN, |
65 | TV_STD_PAL_CN, |
| 66 | TV_STD_PAL_N, |
66 | TV_STD_PAL_N, |
| 67 | }; |
67 | }; |
| 68 | 68 | ||
| 69 | enum radeon_underscan_type { |
69 | enum radeon_underscan_type { |
| 70 | UNDERSCAN_OFF, |
70 | UNDERSCAN_OFF, |
| 71 | UNDERSCAN_ON, |
71 | UNDERSCAN_ON, |
| 72 | UNDERSCAN_AUTO, |
72 | UNDERSCAN_AUTO, |
| 73 | }; |
73 | }; |
| 74 | 74 | ||
| 75 | enum radeon_hpd_id { |
75 | enum radeon_hpd_id { |
| 76 | RADEON_HPD_1 = 0, |
76 | RADEON_HPD_1 = 0, |
| 77 | RADEON_HPD_2, |
77 | RADEON_HPD_2, |
| 78 | RADEON_HPD_3, |
78 | RADEON_HPD_3, |
| 79 | RADEON_HPD_4, |
79 | RADEON_HPD_4, |
| 80 | RADEON_HPD_5, |
80 | RADEON_HPD_5, |
| 81 | RADEON_HPD_6, |
81 | RADEON_HPD_6, |
| 82 | RADEON_HPD_NONE = 0xff, |
82 | RADEON_HPD_NONE = 0xff, |
| 83 | }; |
83 | }; |
| 84 | 84 | ||
| 85 | #define RADEON_MAX_I2C_BUS 16 |
85 | #define RADEON_MAX_I2C_BUS 16 |
| 86 | 86 | ||
| 87 | /* radeon gpio-based i2c |
87 | /* radeon gpio-based i2c |
| 88 | * 1. "mask" reg and bits |
88 | * 1. "mask" reg and bits |
| 89 | * grabs the gpio pins for software use |
89 | * grabs the gpio pins for software use |
| 90 | * 0=not held 1=held |
90 | * 0=not held 1=held |
| 91 | * 2. "a" reg and bits |
91 | * 2. "a" reg and bits |
| 92 | * output pin value |
92 | * output pin value |
| 93 | * 0=low 1=high |
93 | * 0=low 1=high |
| 94 | * 3. "en" reg and bits |
94 | * 3. "en" reg and bits |
| 95 | * sets the pin direction |
95 | * sets the pin direction |
| 96 | * 0=input 1=output |
96 | * 0=input 1=output |
| 97 | * 4. "y" reg and bits |
97 | * 4. "y" reg and bits |
| 98 | * input pin value |
98 | * input pin value |
| 99 | * 0=low 1=high |
99 | * 0=low 1=high |
| 100 | */ |
100 | */ |
| 101 | struct radeon_i2c_bus_rec { |
101 | struct radeon_i2c_bus_rec { |
| 102 | bool valid; |
102 | bool valid; |
| 103 | /* id used by atom */ |
103 | /* id used by atom */ |
| 104 | uint8_t i2c_id; |
104 | uint8_t i2c_id; |
| 105 | /* id used by atom */ |
105 | /* id used by atom */ |
| 106 | enum radeon_hpd_id hpd; |
106 | enum radeon_hpd_id hpd; |
| 107 | /* can be used with hw i2c engine */ |
107 | /* can be used with hw i2c engine */ |
| 108 | bool hw_capable; |
108 | bool hw_capable; |
| 109 | /* uses multi-media i2c engine */ |
109 | /* uses multi-media i2c engine */ |
| 110 | bool mm_i2c; |
110 | bool mm_i2c; |
| 111 | /* regs and bits */ |
111 | /* regs and bits */ |
| 112 | uint32_t mask_clk_reg; |
112 | uint32_t mask_clk_reg; |
| 113 | uint32_t mask_data_reg; |
113 | uint32_t mask_data_reg; |
| 114 | uint32_t a_clk_reg; |
114 | uint32_t a_clk_reg; |
| 115 | uint32_t a_data_reg; |
115 | uint32_t a_data_reg; |
| 116 | uint32_t en_clk_reg; |
116 | uint32_t en_clk_reg; |
| 117 | uint32_t en_data_reg; |
117 | uint32_t en_data_reg; |
| 118 | uint32_t y_clk_reg; |
118 | uint32_t y_clk_reg; |
| 119 | uint32_t y_data_reg; |
119 | uint32_t y_data_reg; |
| 120 | uint32_t mask_clk_mask; |
120 | uint32_t mask_clk_mask; |
| 121 | uint32_t mask_data_mask; |
121 | uint32_t mask_data_mask; |
| 122 | uint32_t a_clk_mask; |
122 | uint32_t a_clk_mask; |
| 123 | uint32_t a_data_mask; |
123 | uint32_t a_data_mask; |
| 124 | uint32_t en_clk_mask; |
124 | uint32_t en_clk_mask; |
| 125 | uint32_t en_data_mask; |
125 | uint32_t en_data_mask; |
| 126 | uint32_t y_clk_mask; |
126 | uint32_t y_clk_mask; |
| 127 | uint32_t y_data_mask; |
127 | uint32_t y_data_mask; |
| 128 | }; |
128 | }; |
| 129 | 129 | ||
| 130 | struct radeon_tmds_pll { |
130 | struct radeon_tmds_pll { |
| 131 | uint32_t freq; |
131 | uint32_t freq; |
| 132 | uint32_t value; |
132 | uint32_t value; |
| 133 | }; |
133 | }; |
| 134 | 134 | ||
| 135 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
135 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
| 136 | 136 | ||
| 137 | /* pll flags */ |
137 | /* pll flags */ |
| 138 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
138 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
| 139 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
139 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
| 140 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
140 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
| 141 | #define RADEON_PLL_LEGACY (1 << 3) |
141 | #define RADEON_PLL_LEGACY (1 << 3) |
| 142 | #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) |
142 | #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) |
| 143 | #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) |
143 | #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) |
| 144 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
144 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
| 145 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
145 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
| 146 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
146 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
| 147 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
147 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
| 148 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
148 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
| 149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
| 150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
| 151 | #define RADEON_PLL_IS_LCD (1 << 13) |
151 | #define RADEON_PLL_IS_LCD (1 << 13) |
| 152 | #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14) |
152 | #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14) |
| 153 | 153 | ||
| 154 | struct radeon_pll { |
154 | struct radeon_pll { |
| 155 | /* reference frequency */ |
155 | /* reference frequency */ |
| 156 | uint32_t reference_freq; |
156 | uint32_t reference_freq; |
| 157 | 157 | ||
| 158 | /* fixed dividers */ |
158 | /* fixed dividers */ |
| 159 | uint32_t reference_div; |
159 | uint32_t reference_div; |
| 160 | uint32_t post_div; |
160 | uint32_t post_div; |
| 161 | 161 | ||
| 162 | /* pll in/out limits */ |
162 | /* pll in/out limits */ |
| 163 | uint32_t pll_in_min; |
163 | uint32_t pll_in_min; |
| 164 | uint32_t pll_in_max; |
164 | uint32_t pll_in_max; |
| 165 | uint32_t pll_out_min; |
165 | uint32_t pll_out_min; |
| 166 | uint32_t pll_out_max; |
166 | uint32_t pll_out_max; |
| 167 | uint32_t lcd_pll_out_min; |
167 | uint32_t lcd_pll_out_min; |
| 168 | uint32_t lcd_pll_out_max; |
168 | uint32_t lcd_pll_out_max; |
| 169 | uint32_t best_vco; |
169 | uint32_t best_vco; |
| 170 | 170 | ||
| 171 | /* divider limits */ |
171 | /* divider limits */ |
| 172 | uint32_t min_ref_div; |
172 | uint32_t min_ref_div; |
| 173 | uint32_t max_ref_div; |
173 | uint32_t max_ref_div; |
| 174 | uint32_t min_post_div; |
174 | uint32_t min_post_div; |
| 175 | uint32_t max_post_div; |
175 | uint32_t max_post_div; |
| 176 | uint32_t min_feedback_div; |
176 | uint32_t min_feedback_div; |
| 177 | uint32_t max_feedback_div; |
177 | uint32_t max_feedback_div; |
| 178 | uint32_t min_frac_feedback_div; |
178 | uint32_t min_frac_feedback_div; |
| 179 | uint32_t max_frac_feedback_div; |
179 | uint32_t max_frac_feedback_div; |
| 180 | 180 | ||
| 181 | /* flags for the current clock */ |
181 | /* flags for the current clock */ |
| 182 | uint32_t flags; |
182 | uint32_t flags; |
| 183 | 183 | ||
| 184 | /* pll id */ |
184 | /* pll id */ |
| 185 | uint32_t id; |
185 | uint32_t id; |
| 186 | }; |
186 | }; |
| 187 | 187 | ||
| 188 | struct radeon_i2c_chan { |
188 | struct radeon_i2c_chan { |
| 189 | struct i2c_adapter adapter; |
189 | struct i2c_adapter adapter; |
| 190 | struct drm_device *dev; |
190 | struct drm_device *dev; |
| 191 | union { |
191 | union { |
| 192 | struct i2c_algo_bit_data bit; |
192 | struct i2c_algo_bit_data bit; |
| 193 | struct i2c_algo_dp_aux_data dp; |
193 | struct i2c_algo_dp_aux_data dp; |
| 194 | } algo; |
194 | } algo; |
| 195 | struct radeon_i2c_bus_rec rec; |
195 | struct radeon_i2c_bus_rec rec; |
| 196 | }; |
196 | }; |
| 197 | 197 | ||
| 198 | /* mostly for macs, but really any system without connector tables */ |
198 | /* mostly for macs, but really any system without connector tables */ |
| 199 | enum radeon_connector_table { |
199 | enum radeon_connector_table { |
| 200 | CT_NONE = 0, |
200 | CT_NONE = 0, |
| 201 | CT_GENERIC, |
201 | CT_GENERIC, |
| 202 | CT_IBOOK, |
202 | CT_IBOOK, |
| 203 | CT_POWERBOOK_EXTERNAL, |
203 | CT_POWERBOOK_EXTERNAL, |
| 204 | CT_POWERBOOK_INTERNAL, |
204 | CT_POWERBOOK_INTERNAL, |
| 205 | CT_POWERBOOK_VGA, |
205 | CT_POWERBOOK_VGA, |
| 206 | CT_MINI_EXTERNAL, |
206 | CT_MINI_EXTERNAL, |
| 207 | CT_MINI_INTERNAL, |
207 | CT_MINI_INTERNAL, |
| 208 | CT_IMAC_G5_ISIGHT, |
208 | CT_IMAC_G5_ISIGHT, |
| 209 | CT_EMAC, |
209 | CT_EMAC, |
| 210 | CT_RN50_POWER, |
210 | CT_RN50_POWER, |
| 211 | CT_MAC_X800, |
211 | CT_MAC_X800, |
| 212 | CT_MAC_G5_9600, |
212 | CT_MAC_G5_9600, |
| 213 | }; |
213 | }; |
| 214 | 214 | ||
| 215 | enum radeon_dvo_chip { |
215 | enum radeon_dvo_chip { |
| 216 | DVO_SIL164, |
216 | DVO_SIL164, |
| 217 | DVO_SIL1178, |
217 | DVO_SIL1178, |
| 218 | }; |
218 | }; |
| 219 | 219 | ||
| 220 | struct radeon_fbdev; |
220 | struct radeon_fbdev; |
| 221 | 221 | ||
| 222 | struct radeon_mode_info { |
222 | struct radeon_mode_info { |
| 223 | struct atom_context *atom_context; |
223 | struct atom_context *atom_context; |
| 224 | struct card_info *atom_card_info; |
224 | struct card_info *atom_card_info; |
| 225 | enum radeon_connector_table connector_table; |
225 | enum radeon_connector_table connector_table; |
| 226 | bool mode_config_initialized; |
226 | bool mode_config_initialized; |
| 227 | struct radeon_crtc *crtcs[6]; |
227 | struct radeon_crtc *crtcs[6]; |
| 228 | /* DVI-I properties */ |
228 | /* DVI-I properties */ |
| 229 | struct drm_property *coherent_mode_property; |
229 | struct drm_property *coherent_mode_property; |
| 230 | /* DAC enable load detect */ |
230 | /* DAC enable load detect */ |
| 231 | struct drm_property *load_detect_property; |
231 | struct drm_property *load_detect_property; |
| 232 | /* TV standard */ |
232 | /* TV standard */ |
| 233 | struct drm_property *tv_std_property; |
233 | struct drm_property *tv_std_property; |
| 234 | /* legacy TMDS PLL detect */ |
234 | /* legacy TMDS PLL detect */ |
| 235 | struct drm_property *tmds_pll_property; |
235 | struct drm_property *tmds_pll_property; |
| 236 | /* underscan */ |
236 | /* underscan */ |
| 237 | struct drm_property *underscan_property; |
237 | struct drm_property *underscan_property; |
| 238 | struct drm_property *underscan_hborder_property; |
238 | struct drm_property *underscan_hborder_property; |
| 239 | struct drm_property *underscan_vborder_property; |
239 | struct drm_property *underscan_vborder_property; |
| 240 | /* hardcoded DFP edid from BIOS */ |
240 | /* hardcoded DFP edid from BIOS */ |
| 241 | struct edid *bios_hardcoded_edid; |
241 | struct edid *bios_hardcoded_edid; |
| 242 | int bios_hardcoded_edid_size; |
242 | int bios_hardcoded_edid_size; |
| 243 | 243 | ||
| 244 | /* pointer to fbdev info structure */ |
244 | /* pointer to fbdev info structure */ |
| 245 | struct radeon_fbdev *rfbdev; |
245 | struct radeon_fbdev *rfbdev; |
| 246 | }; |
246 | }; |
| 247 | 247 | ||
| 248 | #define MAX_H_CODE_TIMING_LEN 32 |
248 | #define MAX_H_CODE_TIMING_LEN 32 |
| 249 | #define MAX_V_CODE_TIMING_LEN 32 |
249 | #define MAX_V_CODE_TIMING_LEN 32 |
| 250 | 250 | ||
| 251 | /* need to store these as reading |
251 | /* need to store these as reading |
| 252 | back code tables is excessive */ |
252 | back code tables is excessive */ |
| 253 | struct radeon_tv_regs { |
253 | struct radeon_tv_regs { |
| 254 | uint32_t tv_uv_adr; |
254 | uint32_t tv_uv_adr; |
| 255 | uint32_t timing_cntl; |
255 | uint32_t timing_cntl; |
| 256 | uint32_t hrestart; |
256 | uint32_t hrestart; |
| 257 | uint32_t vrestart; |
257 | uint32_t vrestart; |
| 258 | uint32_t frestart; |
258 | uint32_t frestart; |
| 259 | uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; |
259 | uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; |
| 260 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
260 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
| 261 | }; |
261 | }; |
| 262 | 262 | ||
| 263 | struct radeon_crtc { |
263 | struct radeon_crtc { |
| 264 | struct drm_crtc base; |
264 | struct drm_crtc base; |
| 265 | int crtc_id; |
265 | int crtc_id; |
| 266 | u16 lut_r[256], lut_g[256], lut_b[256]; |
266 | u16 lut_r[256], lut_g[256], lut_b[256]; |
| 267 | bool enabled; |
267 | bool enabled; |
| 268 | bool can_tile; |
268 | bool can_tile; |
| 269 | uint32_t crtc_offset; |
269 | uint32_t crtc_offset; |
| 270 | struct drm_gem_object *cursor_bo; |
270 | struct drm_gem_object *cursor_bo; |
| 271 | uint64_t cursor_addr; |
271 | uint64_t cursor_addr; |
| 272 | int cursor_width; |
272 | int cursor_width; |
| 273 | int cursor_height; |
273 | int cursor_height; |
| 274 | uint32_t legacy_display_base_addr; |
274 | uint32_t legacy_display_base_addr; |
| 275 | uint32_t legacy_cursor_offset; |
275 | uint32_t legacy_cursor_offset; |
| 276 | enum radeon_rmx_type rmx_type; |
276 | enum radeon_rmx_type rmx_type; |
| 277 | u8 h_border; |
277 | u8 h_border; |
| 278 | u8 v_border; |
278 | u8 v_border; |
| 279 | fixed20_12 vsc; |
279 | fixed20_12 vsc; |
| 280 | fixed20_12 hsc; |
280 | fixed20_12 hsc; |
| 281 | struct drm_display_mode native_mode; |
281 | struct drm_display_mode native_mode; |
| 282 | int pll_id; |
282 | int pll_id; |
| 283 | }; |
283 | }; |
| 284 | 284 | ||
| 285 | struct radeon_encoder_primary_dac { |
285 | struct radeon_encoder_primary_dac { |
| 286 | /* legacy primary dac */ |
286 | /* legacy primary dac */ |
| 287 | uint32_t ps2_pdac_adj; |
287 | uint32_t ps2_pdac_adj; |
| 288 | }; |
288 | }; |
| 289 | 289 | ||
| 290 | struct radeon_encoder_lvds { |
290 | struct radeon_encoder_lvds { |
| 291 | /* legacy lvds */ |
291 | /* legacy lvds */ |
| 292 | uint16_t panel_vcc_delay; |
292 | uint16_t panel_vcc_delay; |
| 293 | uint8_t panel_pwr_delay; |
293 | uint8_t panel_pwr_delay; |
| 294 | uint8_t panel_digon_delay; |
294 | uint8_t panel_digon_delay; |
| 295 | uint8_t panel_blon_delay; |
295 | uint8_t panel_blon_delay; |
| 296 | uint16_t panel_ref_divider; |
296 | uint16_t panel_ref_divider; |
| 297 | uint8_t panel_post_divider; |
297 | uint8_t panel_post_divider; |
| 298 | uint16_t panel_fb_divider; |
298 | uint16_t panel_fb_divider; |
| 299 | bool use_bios_dividers; |
299 | bool use_bios_dividers; |
| 300 | uint32_t lvds_gen_cntl; |
300 | uint32_t lvds_gen_cntl; |
| 301 | /* panel mode */ |
301 | /* panel mode */ |
| 302 | struct drm_display_mode native_mode; |
302 | struct drm_display_mode native_mode; |
| 303 | struct backlight_device *bl_dev; |
303 | struct backlight_device *bl_dev; |
| 304 | int dpms_mode; |
304 | int dpms_mode; |
| 305 | uint8_t backlight_level; |
305 | uint8_t backlight_level; |
| 306 | }; |
306 | }; |
| 307 | 307 | ||
| 308 | struct radeon_encoder_tv_dac { |
308 | struct radeon_encoder_tv_dac { |
| 309 | /* legacy tv dac */ |
309 | /* legacy tv dac */ |
| 310 | uint32_t ps2_tvdac_adj; |
310 | uint32_t ps2_tvdac_adj; |
| 311 | uint32_t ntsc_tvdac_adj; |
311 | uint32_t ntsc_tvdac_adj; |
| 312 | uint32_t pal_tvdac_adj; |
312 | uint32_t pal_tvdac_adj; |
| 313 | 313 | ||
| 314 | int h_pos; |
314 | int h_pos; |
| 315 | int v_pos; |
315 | int v_pos; |
| 316 | int h_size; |
316 | int h_size; |
| 317 | int supported_tv_stds; |
317 | int supported_tv_stds; |
| 318 | bool tv_on; |
318 | bool tv_on; |
| 319 | enum radeon_tv_std tv_std; |
319 | enum radeon_tv_std tv_std; |
| 320 | struct radeon_tv_regs tv; |
320 | struct radeon_tv_regs tv; |
| 321 | }; |
321 | }; |
| 322 | 322 | ||
| 323 | struct radeon_encoder_int_tmds { |
323 | struct radeon_encoder_int_tmds { |
| 324 | /* legacy int tmds */ |
324 | /* legacy int tmds */ |
| 325 | struct radeon_tmds_pll tmds_pll[4]; |
325 | struct radeon_tmds_pll tmds_pll[4]; |
| 326 | }; |
326 | }; |
| 327 | 327 | ||
| 328 | struct radeon_encoder_ext_tmds { |
328 | struct radeon_encoder_ext_tmds { |
| 329 | /* tmds over dvo */ |
329 | /* tmds over dvo */ |
| 330 | struct radeon_i2c_chan *i2c_bus; |
330 | struct radeon_i2c_chan *i2c_bus; |
| 331 | uint8_t slave_addr; |
331 | uint8_t slave_addr; |
| 332 | enum radeon_dvo_chip dvo_chip; |
332 | enum radeon_dvo_chip dvo_chip; |
| 333 | }; |
333 | }; |
| 334 | 334 | ||
| 335 | /* spread spectrum */ |
335 | /* spread spectrum */ |
| 336 | struct radeon_atom_ss { |
336 | struct radeon_atom_ss { |
| 337 | uint16_t percentage; |
337 | uint16_t percentage; |
| 338 | uint8_t type; |
338 | uint8_t type; |
| 339 | uint16_t step; |
339 | uint16_t step; |
| 340 | uint8_t delay; |
340 | uint8_t delay; |
| 341 | uint8_t range; |
341 | uint8_t range; |
| 342 | uint8_t refdiv; |
342 | uint8_t refdiv; |
| 343 | /* asic_ss */ |
343 | /* asic_ss */ |
| 344 | uint16_t rate; |
344 | uint16_t rate; |
| 345 | uint16_t amount; |
345 | uint16_t amount; |
| 346 | }; |
346 | }; |
| 347 | 347 | ||
| 348 | struct radeon_encoder_atom_dig { |
348 | struct radeon_encoder_atom_dig { |
| 349 | bool linkb; |
349 | bool linkb; |
| 350 | /* atom dig */ |
350 | /* atom dig */ |
| 351 | bool coherent_mode; |
351 | bool coherent_mode; |
| 352 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */ |
352 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */ |
| 353 | /* atom lvds/edp */ |
353 | /* atom lvds/edp */ |
| 354 | uint32_t lcd_misc; |
354 | uint32_t lcd_misc; |
| 355 | uint16_t panel_pwr_delay; |
355 | uint16_t panel_pwr_delay; |
| 356 | uint32_t lcd_ss_id; |
356 | uint32_t lcd_ss_id; |
| 357 | /* panel mode */ |
357 | /* panel mode */ |
| 358 | struct drm_display_mode native_mode; |
358 | struct drm_display_mode native_mode; |
| 359 | struct backlight_device *bl_dev; |
359 | struct backlight_device *bl_dev; |
| 360 | int dpms_mode; |
360 | int dpms_mode; |
| 361 | uint8_t backlight_level; |
361 | uint8_t backlight_level; |
| 362 | }; |
362 | }; |
| 363 | 363 | ||
| 364 | struct radeon_encoder_atom_dac { |
364 | struct radeon_encoder_atom_dac { |
| 365 | enum radeon_tv_std tv_std; |
365 | enum radeon_tv_std tv_std; |
| 366 | }; |
366 | }; |
| 367 | 367 | ||
| 368 | struct radeon_encoder { |
368 | struct radeon_encoder { |
| 369 | struct drm_encoder base; |
369 | struct drm_encoder base; |
| 370 | uint32_t encoder_enum; |
370 | uint32_t encoder_enum; |
| 371 | uint32_t encoder_id; |
371 | uint32_t encoder_id; |
| 372 | uint32_t devices; |
372 | uint32_t devices; |
| 373 | uint32_t active_device; |
373 | uint32_t active_device; |
| 374 | uint32_t flags; |
374 | uint32_t flags; |
| 375 | uint32_t pixel_clock; |
375 | uint32_t pixel_clock; |
| 376 | enum radeon_rmx_type rmx_type; |
376 | enum radeon_rmx_type rmx_type; |
| 377 | enum radeon_underscan_type underscan_type; |
377 | enum radeon_underscan_type underscan_type; |
| 378 | uint32_t underscan_hborder; |
378 | uint32_t underscan_hborder; |
| 379 | uint32_t underscan_vborder; |
379 | uint32_t underscan_vborder; |
| 380 | struct drm_display_mode native_mode; |
380 | struct drm_display_mode native_mode; |
| 381 | void *enc_priv; |
381 | void *enc_priv; |
| 382 | int audio_polling_active; |
382 | int audio_polling_active; |
| 383 | int hdmi_offset; |
383 | int hdmi_offset; |
| 384 | int hdmi_config_offset; |
384 | int hdmi_config_offset; |
| 385 | int hdmi_audio_workaround; |
385 | int hdmi_audio_workaround; |
| 386 | int hdmi_buffer_status; |
386 | int hdmi_buffer_status; |
| 387 | bool is_ext_encoder; |
387 | bool is_ext_encoder; |
| 388 | u16 caps; |
388 | u16 caps; |
| 389 | }; |
389 | }; |
| 390 | 390 | ||
| 391 | struct radeon_connector_atom_dig { |
391 | struct radeon_connector_atom_dig { |
| 392 | uint32_t igp_lane_info; |
392 | uint32_t igp_lane_info; |
| 393 | /* displayport */ |
393 | /* displayport */ |
| 394 | struct radeon_i2c_chan *dp_i2c_bus; |
394 | struct radeon_i2c_chan *dp_i2c_bus; |
| 395 | u8 dpcd[8]; |
395 | u8 dpcd[8]; |
| 396 | u8 dp_sink_type; |
396 | u8 dp_sink_type; |
| 397 | int dp_clock; |
397 | int dp_clock; |
| 398 | int dp_lane_count; |
398 | int dp_lane_count; |
| 399 | bool edp_on; |
399 | bool edp_on; |
| 400 | }; |
400 | }; |
| 401 | 401 | ||
| 402 | struct radeon_gpio_rec { |
402 | struct radeon_gpio_rec { |
| 403 | bool valid; |
403 | bool valid; |
| 404 | u8 id; |
404 | u8 id; |
| 405 | u32 reg; |
405 | u32 reg; |
| 406 | u32 mask; |
406 | u32 mask; |
| 407 | }; |
407 | }; |
| 408 | 408 | ||
| 409 | struct radeon_hpd { |
409 | struct radeon_hpd { |
| 410 | enum radeon_hpd_id hpd; |
410 | enum radeon_hpd_id hpd; |
| 411 | u8 plugged_state; |
411 | u8 plugged_state; |
| 412 | struct radeon_gpio_rec gpio; |
412 | struct radeon_gpio_rec gpio; |
| 413 | }; |
413 | }; |
| 414 | 414 | ||
| 415 | struct radeon_router { |
415 | struct radeon_router { |
| 416 | u32 router_id; |
416 | u32 router_id; |
| 417 | struct radeon_i2c_bus_rec i2c_info; |
417 | struct radeon_i2c_bus_rec i2c_info; |
| 418 | u8 i2c_addr; |
418 | u8 i2c_addr; |
| 419 | /* i2c mux */ |
419 | /* i2c mux */ |
| 420 | bool ddc_valid; |
420 | bool ddc_valid; |
| 421 | u8 ddc_mux_type; |
421 | u8 ddc_mux_type; |
| 422 | u8 ddc_mux_control_pin; |
422 | u8 ddc_mux_control_pin; |
| 423 | u8 ddc_mux_state; |
423 | u8 ddc_mux_state; |
| 424 | /* clock/data mux */ |
424 | /* clock/data mux */ |
| 425 | bool cd_valid; |
425 | bool cd_valid; |
| 426 | u8 cd_mux_type; |
426 | u8 cd_mux_type; |
| 427 | u8 cd_mux_control_pin; |
427 | u8 cd_mux_control_pin; |
| 428 | u8 cd_mux_state; |
428 | u8 cd_mux_state; |
| 429 | }; |
429 | }; |
| 430 | 430 | ||
| 431 | struct radeon_connector { |
431 | struct radeon_connector { |
| 432 | struct drm_connector base; |
432 | struct drm_connector base; |
| 433 | uint32_t connector_id; |
433 | uint32_t connector_id; |
| 434 | uint32_t devices; |
434 | uint32_t devices; |
| 435 | struct radeon_i2c_chan *ddc_bus; |
435 | struct radeon_i2c_chan *ddc_bus; |
| 436 | /* some systems have an hdmi and vga port with a shared ddc line */ |
436 | /* some systems have an hdmi and vga port with a shared ddc line */ |
| 437 | bool shared_ddc; |
437 | bool shared_ddc; |
| 438 | bool use_digital; |
438 | bool use_digital; |
| 439 | /* we need to mind the EDID between detect |
439 | /* we need to mind the EDID between detect |
| 440 | and get modes due to analog/digital/tvencoder */ |
440 | and get modes due to analog/digital/tvencoder */ |
| 441 | struct edid *edid; |
441 | struct edid *edid; |
| 442 | void *con_priv; |
442 | void *con_priv; |
| 443 | bool dac_load_detect; |
443 | bool dac_load_detect; |
| 444 | uint16_t connector_object_id; |
444 | uint16_t connector_object_id; |
| 445 | struct radeon_hpd hpd; |
445 | struct radeon_hpd hpd; |
| 446 | struct radeon_router router; |
446 | struct radeon_router router; |
| 447 | struct radeon_i2c_chan *router_bus; |
447 | struct radeon_i2c_chan *router_bus; |
| 448 | }; |
448 | }; |
| 449 | 449 | ||
| 450 | struct radeon_framebuffer { |
450 | struct radeon_framebuffer { |
| 451 | struct drm_framebuffer base; |
451 | struct drm_framebuffer base; |
| 452 | struct drm_gem_object *obj; |
452 | struct drm_gem_object *obj; |
| 453 | }; |
453 | }; |
| 454 | 454 | ||
| 455 | 455 | ||
| 456 | extern enum radeon_tv_std |
456 | extern enum radeon_tv_std |
| 457 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
457 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
| 458 | extern enum radeon_tv_std |
458 | extern enum radeon_tv_std |
| 459 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
459 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
| 460 | 460 | ||
| 461 | extern struct drm_connector * |
461 | extern struct drm_connector * |
| 462 | radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
462 | radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
| 463 | 463 | ||
| 464 | extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder); |
464 | extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder); |
| 465 | extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); |
465 | extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); |
| 466 | extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector); |
466 | extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector); |
| 467 | extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
467 | extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
| 468 | 468 | ||
| 469 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
469 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
| 470 | extern int radeon_dp_mode_valid_helper(struct drm_connector *connector, |
470 | extern int radeon_dp_mode_valid_helper(struct drm_connector *connector, |
| 471 | struct drm_display_mode *mode); |
471 | struct drm_display_mode *mode); |
| 472 | extern void radeon_dp_set_link_config(struct drm_connector *connector, |
472 | extern void radeon_dp_set_link_config(struct drm_connector *connector, |
| 473 | struct drm_display_mode *mode); |
473 | struct drm_display_mode *mode); |
| 474 | extern void radeon_dp_link_train(struct drm_encoder *encoder, |
474 | extern void radeon_dp_link_train(struct drm_encoder *encoder, |
| 475 | struct drm_connector *connector); |
475 | struct drm_connector *connector); |
| 476 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
476 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
| 477 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
477 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
| 478 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
478 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
| 479 | extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
479 | extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
| 480 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
480 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
| 481 | int action, uint8_t lane_num, |
481 | int action, uint8_t lane_num, |
| 482 | uint8_t lane_set); |
482 | uint8_t lane_set); |
| - | 483 | extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); |
|
| - | 484 | extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder); |
|
| 483 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
485 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
| 484 | u8 write_byte, u8 *read_byte); |
486 | u8 write_byte, u8 *read_byte); |
| 485 | 487 | ||
| 486 | extern void radeon_i2c_init(struct radeon_device *rdev); |
488 | extern void radeon_i2c_init(struct radeon_device *rdev); |
| 487 | extern void radeon_i2c_fini(struct radeon_device *rdev); |
489 | extern void radeon_i2c_fini(struct radeon_device *rdev); |
| 488 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); |
490 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); |
| 489 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); |
491 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); |
| 490 | extern void radeon_i2c_add(struct radeon_device *rdev, |
492 | extern void radeon_i2c_add(struct radeon_device *rdev, |
| 491 | struct radeon_i2c_bus_rec *rec, |
493 | struct radeon_i2c_bus_rec *rec, |
| 492 | const char *name); |
494 | const char *name); |
| 493 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, |
495 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, |
| 494 | struct radeon_i2c_bus_rec *i2c_bus); |
496 | struct radeon_i2c_bus_rec *i2c_bus); |
| 495 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
497 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
| 496 | struct radeon_i2c_bus_rec *rec, |
498 | struct radeon_i2c_bus_rec *rec, |
| 497 | const char *name); |
499 | const char *name); |
| 498 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
500 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
| 499 | struct radeon_i2c_bus_rec *rec, |
501 | struct radeon_i2c_bus_rec *rec, |
| 500 | const char *name); |
502 | const char *name); |
| 501 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
503 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
| 502 | extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, |
504 | extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, |
| 503 | u8 slave_addr, |
505 | u8 slave_addr, |
| 504 | u8 addr, |
506 | u8 addr, |
| 505 | u8 *val); |
507 | u8 *val); |
| 506 | extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, |
508 | extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, |
| 507 | u8 slave_addr, |
509 | u8 slave_addr, |
| 508 | u8 addr, |
510 | u8 addr, |
| 509 | u8 val); |
511 | u8 val); |
| 510 | extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
512 | extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
| 511 | extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
513 | extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
| 512 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
514 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
| 513 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
515 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
| 514 | 516 | ||
| 515 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
517 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
| 516 | 518 | ||
| 517 | extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, |
519 | extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, |
| 518 | struct radeon_atom_ss *ss, |
520 | struct radeon_atom_ss *ss, |
| 519 | int id); |
521 | int id); |
| 520 | extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, |
522 | extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, |
| 521 | struct radeon_atom_ss *ss, |
523 | struct radeon_atom_ss *ss, |
| 522 | int id, u32 clock); |
524 | int id, u32 clock); |
| 523 | 525 | ||
| 524 | extern void radeon_compute_pll_legacy(struct radeon_pll *pll, |
526 | extern void radeon_compute_pll_legacy(struct radeon_pll *pll, |
| 525 | uint64_t freq, |
527 | uint64_t freq, |
| 526 | uint32_t *dot_clock_p, |
528 | uint32_t *dot_clock_p, |
| 527 | uint32_t *fb_div_p, |
529 | uint32_t *fb_div_p, |
| 528 | uint32_t *frac_fb_div_p, |
530 | uint32_t *frac_fb_div_p, |
| 529 | uint32_t *ref_div_p, |
531 | uint32_t *ref_div_p, |
| 530 | uint32_t *post_div_p); |
532 | uint32_t *post_div_p); |
| 531 | 533 | ||
| 532 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
534 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
| 533 | u32 freq, |
535 | u32 freq, |
| 534 | u32 *dot_clock_p, |
536 | u32 *dot_clock_p, |
| 535 | u32 *fb_div_p, |
537 | u32 *fb_div_p, |
| 536 | u32 *frac_fb_div_p, |
538 | u32 *frac_fb_div_p, |
| 537 | u32 *ref_div_p, |
539 | u32 *ref_div_p, |
| 538 | u32 *post_div_p); |
540 | u32 *post_div_p); |
| 539 | 541 | ||
| 540 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
542 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
| 541 | 543 | ||
| 542 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
544 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
| 543 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
545 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
| 544 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
546 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
| 545 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
547 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
| 546 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
548 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
| 547 | extern void atombios_dvo_setup(struct drm_encoder *encoder, int action); |
549 | extern void atombios_dvo_setup(struct drm_encoder *encoder, int action); |
| 548 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); |
550 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); |
| 549 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
551 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
| 550 | extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action); |
552 | extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action); |
| 551 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); |
553 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); |
| 552 | 554 | ||
| 553 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
555 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
| 554 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
556 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
| 555 | struct drm_framebuffer *old_fb); |
557 | struct drm_framebuffer *old_fb); |
| 556 | extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, |
558 | extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, |
| 557 | struct drm_framebuffer *fb, |
559 | struct drm_framebuffer *fb, |
| 558 | int x, int y, |
560 | int x, int y, |
| 559 | enum mode_set_atomic state); |
561 | enum mode_set_atomic state); |
| 560 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
562 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
| 561 | struct drm_display_mode *mode, |
563 | struct drm_display_mode *mode, |
| 562 | struct drm_display_mode *adjusted_mode, |
564 | struct drm_display_mode *adjusted_mode, |
| 563 | int x, int y, |
565 | int x, int y, |
| 564 | struct drm_framebuffer *old_fb); |
566 | struct drm_framebuffer *old_fb); |
| 565 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
567 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
| 566 | 568 | ||
| 567 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
569 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
| 568 | struct drm_framebuffer *old_fb); |
570 | struct drm_framebuffer *old_fb); |
| 569 | extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, |
571 | extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, |
| 570 | struct drm_framebuffer *fb, |
572 | struct drm_framebuffer *fb, |
| 571 | int x, int y, |
573 | int x, int y, |
| 572 | enum mode_set_atomic state); |
574 | enum mode_set_atomic state); |
| 573 | extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, |
575 | extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, |
| 574 | struct drm_framebuffer *fb, |
576 | struct drm_framebuffer *fb, |
| 575 | int x, int y, int atomic); |
577 | int x, int y, int atomic); |
| 576 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
578 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
| 577 | struct drm_file *file_priv, |
579 | struct drm_file *file_priv, |
| 578 | uint32_t handle, |
580 | uint32_t handle, |
| 579 | uint32_t width, |
581 | uint32_t width, |
| 580 | uint32_t height); |
582 | uint32_t height); |
| 581 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
583 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
| 582 | int x, int y); |
584 | int x, int y); |
| 583 | 585 | ||
| 584 | extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, |
586 | extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, |
| 585 | int *vpos, int *hpos); |
587 | int *vpos, int *hpos); |
| 586 | 588 | ||
| 587 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
589 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
| 588 | extern struct edid * |
590 | extern struct edid * |
| 589 | radeon_bios_get_hardcoded_edid(struct radeon_device *rdev); |
591 | radeon_bios_get_hardcoded_edid(struct radeon_device *rdev); |
| 590 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
592 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
| 591 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
593 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
| 592 | extern struct radeon_encoder_atom_dig * |
594 | extern struct radeon_encoder_atom_dig * |
| 593 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
595 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
| 594 | extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
596 | extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
| 595 | struct radeon_encoder_int_tmds *tmds); |
597 | struct radeon_encoder_int_tmds *tmds); |
| 596 | extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, |
598 | extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, |
| 597 | struct radeon_encoder_int_tmds *tmds); |
599 | struct radeon_encoder_int_tmds *tmds); |
| 598 | extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
600 | extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
| 599 | struct radeon_encoder_int_tmds *tmds); |
601 | struct radeon_encoder_int_tmds *tmds); |
| 600 | extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, |
602 | extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, |
| 601 | struct radeon_encoder_ext_tmds *tmds); |
603 | struct radeon_encoder_ext_tmds *tmds); |
| 602 | extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, |
604 | extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, |
| 603 | struct radeon_encoder_ext_tmds *tmds); |
605 | struct radeon_encoder_ext_tmds *tmds); |
| 604 | extern struct radeon_encoder_primary_dac * |
606 | extern struct radeon_encoder_primary_dac * |
| 605 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
607 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
| 606 | extern struct radeon_encoder_tv_dac * |
608 | extern struct radeon_encoder_tv_dac * |
| 607 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
609 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
| 608 | extern struct radeon_encoder_lvds * |
610 | extern struct radeon_encoder_lvds * |
| 609 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
611 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
| 610 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
612 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
| 611 | extern struct radeon_encoder_tv_dac * |
613 | extern struct radeon_encoder_tv_dac * |
| 612 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
614 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
| 613 | extern struct radeon_encoder_primary_dac * |
615 | extern struct radeon_encoder_primary_dac * |
| 614 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
616 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
| 615 | extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder); |
617 | extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder); |
| 616 | extern void radeon_external_tmds_setup(struct drm_encoder *encoder); |
618 | extern void radeon_external_tmds_setup(struct drm_encoder *encoder); |
| 617 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
619 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
| 618 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
620 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
| 619 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
621 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
| 620 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
622 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
| 621 | extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); |
623 | extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); |
| 622 | extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); |
624 | extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); |
| 623 | extern void |
625 | extern void |
| 624 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
626 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
| 625 | extern void |
627 | extern void |
| 626 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
628 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
| 627 | extern void |
629 | extern void |
| 628 | radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
630 | radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
| 629 | extern void |
631 | extern void |
| 630 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
632 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
| 631 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
633 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
| 632 | u16 blue, int regno); |
634 | u16 blue, int regno); |
| 633 | extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
635 | extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
| 634 | u16 *blue, int regno); |
636 | u16 *blue, int regno); |
| 635 | void radeon_framebuffer_init(struct drm_device *dev, |
637 | void radeon_framebuffer_init(struct drm_device *dev, |
| 636 | struct radeon_framebuffer *rfb, |
638 | struct radeon_framebuffer *rfb, |
| 637 | struct drm_mode_fb_cmd *mode_cmd, |
639 | struct drm_mode_fb_cmd *mode_cmd, |
| 638 | struct drm_gem_object *obj); |
640 | struct drm_gem_object *obj); |
| 639 | 641 | ||
| 640 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
642 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
| 641 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
643 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
| 642 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
644 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
| 643 | void radeon_atombios_init_crtc(struct drm_device *dev, |
645 | void radeon_atombios_init_crtc(struct drm_device *dev, |
| 644 | struct radeon_crtc *radeon_crtc); |
646 | struct radeon_crtc *radeon_crtc); |
| 645 | void radeon_legacy_init_crtc(struct drm_device *dev, |
647 | void radeon_legacy_init_crtc(struct drm_device *dev, |
| 646 | struct radeon_crtc *radeon_crtc); |
648 | struct radeon_crtc *radeon_crtc); |
| 647 | 649 | ||
| 648 | void radeon_get_clock_info(struct drm_device *dev); |
650 | void radeon_get_clock_info(struct drm_device *dev); |
| 649 | 651 | ||
| 650 | extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); |
652 | extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); |
| 651 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
653 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
| 652 | 654 | ||
| 653 | void radeon_enc_destroy(struct drm_encoder *encoder); |
655 | void radeon_enc_destroy(struct drm_encoder *encoder); |
| 654 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
656 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
| 655 | void radeon_combios_asic_init(struct drm_device *dev); |
657 | void radeon_combios_asic_init(struct drm_device *dev); |
| 656 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
658 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
| 657 | struct drm_display_mode *mode, |
659 | struct drm_display_mode *mode, |
| 658 | struct drm_display_mode *adjusted_mode); |
660 | struct drm_display_mode *adjusted_mode); |
| 659 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
661 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
| 660 | struct drm_display_mode *adjusted_mode); |
662 | struct drm_display_mode *adjusted_mode); |
| 661 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
663 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
| 662 | 664 | ||
| 663 | /* legacy tv */ |
665 | /* legacy tv */ |
| 664 | void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, |
666 | void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, |
| 665 | uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, |
667 | uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, |
| 666 | uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); |
668 | uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); |
| 667 | void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, |
669 | void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, |
| 668 | uint32_t *htotal_cntl, uint32_t *ppll_ref_div, |
670 | uint32_t *htotal_cntl, uint32_t *ppll_ref_div, |
| 669 | uint32_t *ppll_div_3, uint32_t *pixclks_cntl); |
671 | uint32_t *ppll_div_3, uint32_t *pixclks_cntl); |
| 670 | void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, |
672 | void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, |
| 671 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, |
673 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, |
| 672 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
674 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
| 673 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
675 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
| 674 | struct drm_display_mode *mode, |
676 | struct drm_display_mode *mode, |
| 675 | struct drm_display_mode *adjusted_mode); |
677 | struct drm_display_mode *adjusted_mode); |
| 676 | 678 | ||
| 677 | /* fbdev layer */ |
679 | /* fbdev layer */ |
| 678 | int radeon_fbdev_init(struct radeon_device *rdev); |
680 | int radeon_fbdev_init(struct radeon_device *rdev); |
| 679 | void radeon_fbdev_fini(struct radeon_device *rdev); |
681 | void radeon_fbdev_fini(struct radeon_device *rdev); |
| 680 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
682 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
| 681 | int radeon_fbdev_total_size(struct radeon_device *rdev); |
683 | int radeon_fbdev_total_size(struct radeon_device *rdev); |
| 682 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
684 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
| 683 | 685 | ||
| 684 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
686 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
| 685 | 687 | ||
| 686 | void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id); |
688 | void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id); |
| 687 | 689 | ||
| 688 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); |
690 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); |
| 689 | #endif |
691 | #endif |