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| Rev 1125 | Rev 1179 | ||
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| Line 32... | Line 32... | ||
| 32 | 32 | ||
| 33 | #include |
33 | #include |
| 34 | #include |
34 | #include |
| 35 | #include |
35 | #include |
| - | 36 | #include |
|
| 36 | #include |
37 | #include |
| - | 38 | #include |
|
| - | 39 | #include "radeon_fixed.h" |
|
| - | 40 | ||
| Line 37... | Line 41... | ||
| 37 | #include |
41 | struct radeon_device; |
| 38 | 42 | ||
| 39 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
43 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
| 40 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
44 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
| Line 121... | Line 125... | ||
| 121 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
125 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
| 122 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
126 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
| 123 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
127 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
| 124 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
128 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
| 125 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
129 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
| - | 130 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
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| Line 126... | Line 131... | ||
| 126 | 131 | ||
| 127 | struct radeon_pll { |
132 | struct radeon_pll { |
| 128 | uint16_t reference_freq; |
133 | uint16_t reference_freq; |
| 129 | uint16_t reference_div; |
134 | uint16_t reference_div; |
| Line 167... | Line 172... | ||
| 167 | 172 | ||
| 168 | struct radeon_mode_info { |
173 | struct radeon_mode_info { |
| 169 | struct atom_context *atom_context; |
174 | struct atom_context *atom_context; |
| 170 | enum radeon_connector_table connector_table; |
175 | enum radeon_connector_table connector_table; |
| - | 176 | bool mode_config_initialized; |
|
| 171 | bool mode_config_initialized; |
177 | struct radeon_crtc *crtcs[2]; |
| - | 178 | /* DVI-I properties */ |
|
| - | 179 | struct drm_property *coherent_mode_property; |
|
| - | 180 | /* DAC enable load detect */ |
|
| - | 181 | struct drm_property *load_detect_property; |
|
| - | 182 | /* TV standard load detect */ |
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| - | 183 | struct drm_property *tv_std_property; |
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| - | 184 | /* legacy TMDS PLL detect */ |
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| Line 172... | Line -... | ||
| 172 | }; |
- | |
| 173 | - | ||
| 174 | struct radeon_crtc { |
- | |
| 175 | struct drm_crtc base; |
- | |
| 176 | int crtc_id; |
- | |
| 177 | u16_t lut_r[256], lut_g[256], lut_b[256]; |
- | |
| 178 | bool enabled; |
- | |
| 179 | bool can_tile; |
- | |
| 180 | uint32_t crtc_offset; |
- | |
| 181 | struct radeon_framebuffer *fbdev_fb; |
- | |
| 182 | struct drm_mode_set mode_set; |
- | |
| 183 | // struct drm_gem_object *cursor_bo; |
- | |
| 184 | uint64_t cursor_addr; |
- | |
| 185 | int cursor_width; |
185 | struct drm_property *tmds_pll_property; |
| Line 186... | Line -... | ||
| 186 | int cursor_height; |
- | |
| 187 | }; |
- | |
| 188 | 186 | ||
| 189 | #define RADEON_USE_RMX 1 |
187 | }; |
| 190 | 188 | ||
| 191 | struct radeon_native_mode { |
189 | struct radeon_native_mode { |
| 192 | /* preferred mode */ |
190 | /* preferred mode */ |
| Line 197... | Line 195... | ||
| 197 | uint32_t vblank; |
195 | uint32_t vblank; |
| 198 | uint32_t dotclock; |
196 | uint32_t dotclock; |
| 199 | uint32_t flags; |
197 | uint32_t flags; |
| 200 | }; |
198 | }; |
| Line -... | Line 199... | ||
| - | 199 | ||
| - | 200 | #define MAX_H_CODE_TIMING_LEN 32 |
|
| - | 201 | #define MAX_V_CODE_TIMING_LEN 32 |
|
| - | 202 | ||
| - | 203 | /* need to store these as reading |
|
| - | 204 | back code tables is excessive */ |
|
| - | 205 | struct radeon_tv_regs { |
|
| - | 206 | uint32_t tv_uv_adr; |
|
| - | 207 | uint32_t timing_cntl; |
|
| - | 208 | uint32_t hrestart; |
|
| - | 209 | uint32_t vrestart; |
|
| - | 210 | uint32_t frestart; |
|
| - | 211 | uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; |
|
| - | 212 | uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
|
| - | 213 | }; |
|
| - | 214 | ||
| - | 215 | struct radeon_crtc { |
|
| - | 216 | struct drm_crtc base; |
|
| - | 217 | int crtc_id; |
|
| - | 218 | u16 lut_r[256], lut_g[256], lut_b[256]; |
|
| - | 219 | bool enabled; |
|
| - | 220 | bool can_tile; |
|
| - | 221 | uint32_t crtc_offset; |
|
| - | 222 | // struct drm_gem_object *cursor_bo; |
|
| - | 223 | uint64_t cursor_addr; |
|
| - | 224 | int cursor_width; |
|
| - | 225 | int cursor_height; |
|
| - | 226 | uint32_t legacy_display_base_addr; |
|
| - | 227 | uint32_t legacy_cursor_offset; |
|
| - | 228 | enum radeon_rmx_type rmx_type; |
|
| - | 229 | fixed20_12 vsc; |
|
| - | 230 | fixed20_12 hsc; |
|
| - | 231 | struct radeon_native_mode native_mode; |
|
| - | 232 | }; |
|
| 201 | 233 | ||
| 202 | struct radeon_encoder_primary_dac { |
234 | struct radeon_encoder_primary_dac { |
| 203 | /* legacy primary dac */ |
235 | /* legacy primary dac */ |
| 204 | uint32_t ps2_pdac_adj; |
236 | uint32_t ps2_pdac_adj; |
| Line 223... | Line 255... | ||
| 223 | /* legacy tv dac */ |
255 | /* legacy tv dac */ |
| 224 | uint32_t ps2_tvdac_adj; |
256 | uint32_t ps2_tvdac_adj; |
| 225 | uint32_t ntsc_tvdac_adj; |
257 | uint32_t ntsc_tvdac_adj; |
| 226 | uint32_t pal_tvdac_adj; |
258 | uint32_t pal_tvdac_adj; |
| Line -... | Line 259... | ||
| - | 259 | ||
| - | 260 | int h_pos; |
|
| - | 261 | int v_pos; |
|
| - | 262 | int h_size; |
|
| - | 263 | int supported_tv_stds; |
|
| 227 | 264 | bool tv_on; |
|
| - | 265 | enum radeon_tv_std tv_std; |
|
| 228 | enum radeon_tv_std tv_std; |
266 | struct radeon_tv_regs tv; |
| Line 229... | Line 267... | ||
| 229 | }; |
267 | }; |
| 230 | 268 | ||
| 231 | struct radeon_encoder_int_tmds { |
269 | struct radeon_encoder_int_tmds { |
| Line 242... | Line 280... | ||
| 242 | uint16_t panel_pwr_delay; |
280 | uint16_t panel_pwr_delay; |
| 243 | /* panel mode */ |
281 | /* panel mode */ |
| 244 | struct radeon_native_mode native_mode; |
282 | struct radeon_native_mode native_mode; |
| 245 | }; |
283 | }; |
| Line -... | Line 284... | ||
| - | 284 | ||
| - | 285 | struct radeon_encoder_atom_dac { |
|
| - | 286 | enum radeon_tv_std tv_std; |
|
| - | 287 | }; |
|
| 246 | 288 | ||
| 247 | struct radeon_encoder { |
289 | struct radeon_encoder { |
| 248 | struct drm_encoder base; |
290 | struct drm_encoder base; |
| 249 | uint32_t encoder_id; |
291 | uint32_t encoder_id; |
| - | 292 | uint32_t devices; |
|
| 250 | uint32_t devices; |
293 | uint32_t active_device; |
| 251 | uint32_t flags; |
294 | uint32_t flags; |
| 252 | uint32_t pixel_clock; |
295 | uint32_t pixel_clock; |
| 253 | enum radeon_rmx_type rmx_type; |
296 | enum radeon_rmx_type rmx_type; |
| 254 | struct radeon_native_mode native_mode; |
297 | struct radeon_native_mode native_mode; |
| Line 263... | Line 306... | ||
| 263 | struct radeon_connector { |
306 | struct radeon_connector { |
| 264 | struct drm_connector base; |
307 | struct drm_connector base; |
| 265 | uint32_t connector_id; |
308 | uint32_t connector_id; |
| 266 | uint32_t devices; |
309 | uint32_t devices; |
| 267 | struct radeon_i2c_chan *ddc_bus; |
310 | struct radeon_i2c_chan *ddc_bus; |
| 268 | int use_digital; |
311 | bool use_digital; |
| - | 312 | /* we need to mind the EDID between detect |
|
| - | 313 | and get modes due to analog/digital/tvencoder */ |
|
| - | 314 | struct edid *edid; |
|
| 269 | void *con_priv; |
315 | void *con_priv; |
| - | 316 | bool dac_load_detect; |
|
| 270 | }; |
317 | }; |
| Line 271... | Line 318... | ||
| 271 | 318 | ||
| 272 | struct radeon_framebuffer { |
319 | struct radeon_framebuffer { |
| 273 | struct drm_framebuffer base; |
320 | struct drm_framebuffer base; |
| Line 297... | Line 344... | ||
| 297 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
344 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
| 298 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
345 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
| 299 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
346 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
| 300 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
347 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
| 301 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
348 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
| - | 349 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); |
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| Line 302... | Line 350... | ||
| 302 | 350 | ||
| 303 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
351 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
| 304 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
352 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
| 305 | struct drm_framebuffer *old_fb); |
353 | struct drm_framebuffer *old_fb); |
| Line 324... | Line 372... | ||
| 324 | 372 | ||
| 325 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
373 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
| 326 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
374 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
| 327 | extern struct radeon_encoder_atom_dig * |
375 | extern struct radeon_encoder_atom_dig * |
| - | 376 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
|
| 328 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
377 | bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
| - | 378 | struct radeon_encoder_int_tmds *tmds); |
|
| - | 379 | bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, |
|
| 329 | extern struct radeon_encoder_int_tmds * |
380 | struct radeon_encoder_int_tmds *tmds); |
| - | 381 | bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, |
|
| 330 | radeon_atombios_get_tmds_info(struct radeon_encoder *encoder); |
382 | struct radeon_encoder_int_tmds *tmds); |
| 331 | extern struct radeon_encoder_primary_dac * |
383 | extern struct radeon_encoder_primary_dac * |
| 332 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
384 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
| 333 | extern struct radeon_encoder_tv_dac * |
385 | extern struct radeon_encoder_tv_dac * |
| 334 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
386 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
| 335 | extern struct radeon_encoder_lvds * |
387 | extern struct radeon_encoder_lvds * |
| 336 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
- | |
| 337 | extern struct radeon_encoder_int_tmds * |
- | |
| 338 | radeon_combios_get_tmds_info(struct radeon_encoder *encoder); |
388 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
| 339 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
389 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
| 340 | extern struct radeon_encoder_tv_dac * |
390 | extern struct radeon_encoder_tv_dac * |
| 341 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
391 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
| 342 | extern struct radeon_encoder_primary_dac * |
392 | extern struct radeon_encoder_primary_dac * |
| 343 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
393 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
| 344 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
394 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
| 345 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
395 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
| 346 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
396 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
| - | 397 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
|
| - | 398 | extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); |
|
| 347 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
399 | extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); |
| 348 | extern void |
400 | extern void |
| 349 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
401 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
| 350 | extern void |
402 | extern void |
| 351 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
403 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
| Line 380... | Line 432... | ||
| 380 | struct drm_display_mode *adjusted_mode); |
432 | struct drm_display_mode *adjusted_mode); |
| 381 | void radeon_enc_destroy(struct drm_encoder *encoder); |
433 | void radeon_enc_destroy(struct drm_encoder *encoder); |
| 382 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
434 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
| 383 | void radeon_combios_asic_init(struct drm_device *dev); |
435 | void radeon_combios_asic_init(struct drm_device *dev); |
| 384 | extern int radeon_static_clocks_init(struct drm_device *dev); |
436 | extern int radeon_static_clocks_init(struct drm_device *dev); |
| 385 | void radeon_init_disp_bw_legacy(struct drm_device *dev, |
437 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
| 386 | struct drm_display_mode *mode1, |
438 | struct drm_display_mode *mode, |
| 387 | uint32_t pixel_bytes1, |
- | |
| 388 | struct drm_display_mode *mode2, |
439 | struct drm_display_mode *adjusted_mode); |
| 389 | uint32_t pixel_bytes2); |
- | |
| 390 | void radeon_init_disp_bw_avivo(struct drm_device *dev, |
- | |
| 391 | struct drm_display_mode *mode1, |
- | |
| 392 | uint32_t pixel_bytes1, |
- | |
| 393 | struct drm_display_mode *mode2, |
- | |
| 394 | uint32_t pixel_bytes2); |
- | |
| 395 | void radeon_init_disp_bandwidth(struct drm_device *dev); |
440 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
| Line -... | Line 441... | ||
| - | 441 | ||
| - | 442 | /* legacy tv */ |
|
| - | 443 | void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, |
|
| - | 444 | uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, |
|
| - | 445 | uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); |
|
| - | 446 | void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, |
|
| - | 447 | uint32_t *htotal_cntl, uint32_t *ppll_ref_div, |
|
| - | 448 | uint32_t *ppll_div_3, uint32_t *pixclks_cntl); |
|
| - | 449 | void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, |
|
| - | 450 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, |
|
| - | 451 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
|
| - | 452 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
|
| - | 453 | struct drm_display_mode *mode, |
|
| 396 | 454 | struct drm_display_mode *adjusted_mode); |
|