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Rev 1430 | Rev 1963 | ||
---|---|---|---|
Line 37... | Line 37... | ||
37 | encoder_funcs = encoder->helper_private; |
37 | encoder_funcs = encoder->helper_private; |
38 | encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF); |
38 | encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF); |
39 | radeon_encoder->active_device = 0; |
39 | radeon_encoder->active_device = 0; |
40 | } |
40 | } |
Line 41... | Line 41... | ||
41 | 41 | ||
42 | static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) |
42 | static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode) |
43 | { |
43 | { |
44 | struct drm_device *dev = encoder->dev; |
44 | struct drm_device *dev = encoder->dev; |
45 | struct radeon_device *rdev = dev->dev_private; |
45 | struct radeon_device *rdev = dev->dev_private; |
46 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
46 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; |
47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; |
48 | int panel_pwr_delay = 2000; |
48 | int panel_pwr_delay = 2000; |
- | 49 | bool is_mac = false; |
|
49 | bool is_mac = false; |
50 | uint8_t backlight_level; |
- | 51 | DRM_DEBUG_KMS("\n"); |
|
- | 52 | ||
- | 53 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
|
Line 50... | Line 54... | ||
50 | DRM_DEBUG("\n"); |
54 | backlight_level = (lvds_gen_cntl >> RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & 0xff; |
51 | 55 | ||
52 | if (radeon_encoder->enc_priv) { |
56 | if (radeon_encoder->enc_priv) { |
53 | if (rdev->is_atom_bios) { |
57 | if (rdev->is_atom_bios) { |
- | 58 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
|
- | 59 | panel_pwr_delay = lvds->panel_pwr_delay; |
|
54 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
60 | if (lvds->bl_dev) |
55 | panel_pwr_delay = lvds->panel_pwr_delay; |
61 | backlight_level = lvds->backlight_level; |
56 | } else { |
62 | } else { |
- | 63 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
|
- | 64 | panel_pwr_delay = lvds->panel_pwr_delay; |
|
57 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
65 | if (lvds->bl_dev) |
58 | panel_pwr_delay = lvds->panel_pwr_delay; |
66 | backlight_level = lvds->backlight_level; |
Line 59... | Line 67... | ||
59 | } |
67 | } |
60 | } |
68 | } |
Line 80... | Line 88... | ||
80 | 88 | ||
81 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); |
89 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); |
82 | lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; |
90 | lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; |
Line 83... | Line 91... | ||
83 | WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); |
91 | WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); |
- | 92 | ||
84 | 93 | lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS | |
|
- | 94 | RADEON_LVDS_BL_MOD_LEVEL_MASK); |
|
- | 95 | lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | |
|
85 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
96 | RADEON_LVDS_DIGON | RADEON_LVDS_BLON | |
86 | lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON); |
97 | (backlight_level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT)); |
87 | if (is_mac) |
- | |
88 | lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; |
98 | if (is_mac) |
89 | lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS); |
99 | lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; |
90 | udelay(panel_pwr_delay * 1000); |
100 | udelay(panel_pwr_delay * 1000); |
91 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
101 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
92 | break; |
102 | break; |
93 | case DRM_MODE_DPMS_STANDBY: |
103 | case DRM_MODE_DPMS_STANDBY: |
94 | case DRM_MODE_DPMS_SUSPEND: |
104 | case DRM_MODE_DPMS_SUSPEND: |
95 | case DRM_MODE_DPMS_OFF: |
105 | case DRM_MODE_DPMS_OFF: |
96 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); |
- | |
97 | WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); |
106 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); |
98 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
107 | WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); |
99 | lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; |
108 | lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; |
100 | if (is_mac) { |
109 | if (is_mac) { |
101 | lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; |
110 | lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; |
Line 106... | Line 115... | ||
106 | lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); |
115 | lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); |
107 | } |
116 | } |
108 | udelay(panel_pwr_delay * 1000); |
117 | udelay(panel_pwr_delay * 1000); |
109 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
118 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
110 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |
119 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |
- | 120 | udelay(panel_pwr_delay * 1000); |
|
111 | break; |
121 | break; |
112 | } |
122 | } |
Line 113... | Line 123... | ||
113 | 123 | ||
114 | if (rdev->is_atom_bios) |
124 | if (rdev->is_atom_bios) |
115 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
125 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
116 | else |
126 | else |
Line -... | Line 127... | ||
- | 127 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
|
- | 128 | ||
- | 129 | } |
|
- | 130 | ||
- | 131 | static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) |
|
- | 132 | { |
|
- | 133 | struct radeon_device *rdev = encoder->dev->dev_private; |
|
- | 134 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
- | 135 | DRM_DEBUG("\n"); |
|
- | 136 | ||
- | 137 | if (radeon_encoder->enc_priv) { |
|
117 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
138 | if (rdev->is_atom_bios) { |
- | 139 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
|
- | 140 | lvds->dpms_mode = mode; |
|
- | 141 | } else { |
|
- | 142 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
|
- | 143 | lvds->dpms_mode = mode; |
|
- | 144 | } |
|
118 | 145 | } |
|
119 | /* adjust pm to dpms change */ |
146 | |
Line 120... | Line 147... | ||
120 | radeon_pm_compute_clocks(rdev); |
147 | radeon_legacy_lvds_update(encoder, mode); |
121 | } |
148 | } |
122 | 149 | ||
Line 150... | Line 177... | ||
150 | struct radeon_device *rdev = dev->dev_private; |
177 | struct radeon_device *rdev = dev->dev_private; |
151 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
178 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
152 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
179 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
153 | uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl; |
180 | uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl; |
Line 154... | Line 181... | ||
154 | 181 | ||
Line 155... | Line 182... | ||
155 | DRM_DEBUG("\n"); |
182 | DRM_DEBUG_KMS("\n"); |
156 | 183 | ||
Line 157... | Line 184... | ||
157 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); |
184 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); |
Line 166... | Line 193... | ||
166 | atombios_digital_setup(encoder, PANEL_ENCODER_ACTION_ENABLE); |
193 | atombios_digital_setup(encoder, PANEL_ENCODER_ACTION_ENABLE); |
167 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
194 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
168 | } else { |
195 | } else { |
169 | struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; |
196 | struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; |
170 | if (lvds) { |
197 | if (lvds) { |
171 | DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); |
198 | DRM_DEBUG_KMS("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); |
172 | lvds_gen_cntl = lvds->lvds_gen_cntl; |
199 | lvds_gen_cntl = lvds->lvds_gen_cntl; |
173 | lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | |
200 | lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | |
174 | (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); |
201 | (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); |
175 | lvds_ss_gen_cntl |= ((lvds->panel_digon_delay << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | |
202 | lvds_ss_gen_cntl |= ((lvds->panel_digon_delay << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | |
176 | (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); |
203 | (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); |
Line 215... | Line 242... | ||
215 | static bool radeon_legacy_mode_fixup(struct drm_encoder *encoder, |
242 | static bool radeon_legacy_mode_fixup(struct drm_encoder *encoder, |
216 | struct drm_display_mode *mode, |
243 | struct drm_display_mode *mode, |
217 | struct drm_display_mode *adjusted_mode) |
244 | struct drm_display_mode *adjusted_mode) |
218 | { |
245 | { |
219 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
246 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
220 | struct drm_device *dev = encoder->dev; |
- | |
221 | struct radeon_device *rdev = dev->dev_private; |
- | |
222 | - | ||
223 | /* adjust pm to upcoming mode change */ |
- | |
224 | radeon_pm_compute_clocks(rdev); |
- | |
Line 225... | Line 247... | ||
225 | 247 | ||
226 | /* set the active encoder to connector routing */ |
248 | /* set the active encoder to connector routing */ |
227 | radeon_encoder_set_active_device(encoder); |
249 | radeon_encoder_set_active_device(encoder); |
Line 228... | Line 250... | ||
228 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
250 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
229 | 251 | ||
230 | /* get the native mode for LVDS */ |
- | |
231 | if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) { |
252 | /* get the native mode for LVDS */ |
232 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
- | |
233 | int mode_id = adjusted_mode->base.id; |
- | |
234 | *adjusted_mode = *native_mode; |
- | |
235 | adjusted_mode->hdisplay = mode->hdisplay; |
- | |
236 | adjusted_mode->vdisplay = mode->vdisplay; |
- | |
237 | adjusted_mode->crtc_hdisplay = mode->hdisplay; |
- | |
238 | adjusted_mode->crtc_vdisplay = mode->vdisplay; |
- | |
Line 239... | Line 253... | ||
239 | adjusted_mode->base.id = mode_id; |
253 | if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) |
240 | } |
254 | radeon_panel_mode_fixup(encoder, adjusted_mode); |
Line 241... | Line 255... | ||
241 | 255 | ||
Line 249... | Line 263... | ||
249 | .mode_set = radeon_legacy_lvds_mode_set, |
263 | .mode_set = radeon_legacy_lvds_mode_set, |
250 | .commit = radeon_legacy_lvds_commit, |
264 | .commit = radeon_legacy_lvds_commit, |
251 | .disable = radeon_legacy_encoder_disable, |
265 | .disable = radeon_legacy_encoder_disable, |
252 | }; |
266 | }; |
Line -... | Line 267... | ||
- | 267 | ||
- | 268 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) |
|
- | 269 | ||
- | 270 | #define MAX_RADEON_LEVEL 0xFF |
|
- | 271 | ||
- | 272 | struct radeon_backlight_privdata { |
|
- | 273 | struct radeon_encoder *encoder; |
|
- | 274 | uint8_t negative; |
|
- | 275 | }; |
|
- | 276 | ||
- | 277 | static uint8_t radeon_legacy_lvds_level(struct backlight_device *bd) |
|
- | 278 | { |
|
- | 279 | struct radeon_backlight_privdata *pdata = bl_get_data(bd); |
|
- | 280 | uint8_t level; |
|
- | 281 | ||
- | 282 | /* Convert brightness to hardware level */ |
|
- | 283 | if (bd->props.brightness < 0) |
|
- | 284 | level = 0; |
|
- | 285 | else if (bd->props.brightness > MAX_RADEON_LEVEL) |
|
- | 286 | level = MAX_RADEON_LEVEL; |
|
- | 287 | else |
|
- | 288 | level = bd->props.brightness; |
|
- | 289 | ||
- | 290 | if (pdata->negative) |
|
- | 291 | level = MAX_RADEON_LEVEL - level; |
|
- | 292 | ||
- | 293 | return level; |
|
- | 294 | } |
|
- | 295 | ||
- | 296 | static int radeon_legacy_backlight_update_status(struct backlight_device *bd) |
|
- | 297 | { |
|
- | 298 | struct radeon_backlight_privdata *pdata = bl_get_data(bd); |
|
- | 299 | struct radeon_encoder *radeon_encoder = pdata->encoder; |
|
- | 300 | struct drm_device *dev = radeon_encoder->base.dev; |
|
- | 301 | struct radeon_device *rdev = dev->dev_private; |
|
- | 302 | int dpms_mode = DRM_MODE_DPMS_ON; |
|
- | 303 | ||
- | 304 | if (radeon_encoder->enc_priv) { |
|
- | 305 | if (rdev->is_atom_bios) { |
|
- | 306 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
|
- | 307 | dpms_mode = lvds->dpms_mode; |
|
- | 308 | lvds->backlight_level = radeon_legacy_lvds_level(bd); |
|
- | 309 | } else { |
|
- | 310 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
|
- | 311 | dpms_mode = lvds->dpms_mode; |
|
- | 312 | lvds->backlight_level = radeon_legacy_lvds_level(bd); |
|
- | 313 | } |
|
- | 314 | } |
|
- | 315 | ||
- | 316 | if (bd->props.brightness > 0) |
|
- | 317 | radeon_legacy_lvds_update(&radeon_encoder->base, dpms_mode); |
|
- | 318 | else |
|
- | 319 | radeon_legacy_lvds_update(&radeon_encoder->base, DRM_MODE_DPMS_OFF); |
|
- | 320 | ||
- | 321 | return 0; |
|
- | 322 | } |
|
- | 323 | ||
- | 324 | static int radeon_legacy_backlight_get_brightness(struct backlight_device *bd) |
|
- | 325 | { |
|
- | 326 | struct radeon_backlight_privdata *pdata = bl_get_data(bd); |
|
- | 327 | struct radeon_encoder *radeon_encoder = pdata->encoder; |
|
- | 328 | struct drm_device *dev = radeon_encoder->base.dev; |
|
- | 329 | struct radeon_device *rdev = dev->dev_private; |
|
- | 330 | uint8_t backlight_level; |
|
- | 331 | ||
- | 332 | backlight_level = (RREG32(RADEON_LVDS_GEN_CNTL) >> |
|
- | 333 | RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & 0xff; |
|
- | 334 | ||
- | 335 | return pdata->negative ? MAX_RADEON_LEVEL - backlight_level : backlight_level; |
|
- | 336 | } |
|
- | 337 | ||
- | 338 | static const struct backlight_ops radeon_backlight_ops = { |
|
- | 339 | .get_brightness = radeon_legacy_backlight_get_brightness, |
|
- | 340 | .update_status = radeon_legacy_backlight_update_status, |
|
- | 341 | }; |
|
- | 342 | ||
- | 343 | void radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, |
|
- | 344 | struct drm_connector *drm_connector) |
|
- | 345 | { |
|
- | 346 | struct drm_device *dev = radeon_encoder->base.dev; |
|
- | 347 | struct radeon_device *rdev = dev->dev_private; |
|
- | 348 | struct backlight_device *bd; |
|
- | 349 | struct backlight_properties props; |
|
- | 350 | struct radeon_backlight_privdata *pdata; |
|
- | 351 | uint8_t backlight_level; |
|
- | 352 | ||
- | 353 | if (!radeon_encoder->enc_priv) |
|
- | 354 | return; |
|
- | 355 | ||
- | 356 | #ifdef CONFIG_PMAC_BACKLIGHT |
|
- | 357 | if (!pmac_has_backlight_type("ati") && |
|
- | 358 | !pmac_has_backlight_type("mnca")) |
|
- | 359 | return; |
|
- | 360 | #endif |
|
- | 361 | ||
- | 362 | pdata = kmalloc(sizeof(struct radeon_backlight_privdata), GFP_KERNEL); |
|
- | 363 | if (!pdata) { |
|
- | 364 | DRM_ERROR("Memory allocation failed\n"); |
|
- | 365 | goto error; |
|
- | 366 | } |
|
- | 367 | ||
- | 368 | props.max_brightness = MAX_RADEON_LEVEL; |
|
- | 369 | props.type = BACKLIGHT_RAW; |
|
- | 370 | bd = backlight_device_register("radeon_bl", &drm_connector->kdev, |
|
- | 371 | pdata, &radeon_backlight_ops, &props); |
|
- | 372 | if (IS_ERR(bd)) { |
|
- | 373 | DRM_ERROR("Backlight registration failed\n"); |
|
- | 374 | goto error; |
|
- | 375 | } |
|
- | 376 | ||
- | 377 | pdata->encoder = radeon_encoder; |
|
- | 378 | ||
- | 379 | backlight_level = (RREG32(RADEON_LVDS_GEN_CNTL) >> |
|
- | 380 | RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & 0xff; |
|
- | 381 | ||
- | 382 | /* First, try to detect backlight level sense based on the assumption |
|
- | 383 | * that firmware set it up at full brightness |
|
- | 384 | */ |
|
- | 385 | if (backlight_level == 0) |
|
- | 386 | pdata->negative = true; |
|
- | 387 | else if (backlight_level == 0xff) |
|
- | 388 | pdata->negative = false; |
|
- | 389 | else { |
|
- | 390 | /* XXX hack... maybe some day we can figure out in what direction |
|
- | 391 | * backlight should work on a given panel? |
|
- | 392 | */ |
|
- | 393 | pdata->negative = (rdev->family != CHIP_RV200 && |
|
- | 394 | rdev->family != CHIP_RV250 && |
|
- | 395 | rdev->family != CHIP_RV280 && |
|
- | 396 | rdev->family != CHIP_RV350); |
|
- | 397 | ||
- | 398 | #ifdef CONFIG_PMAC_BACKLIGHT |
|
- | 399 | pdata->negative = (pdata->negative || |
|
- | 400 | of_machine_is_compatible("PowerBook4,3") || |
|
- | 401 | of_machine_is_compatible("PowerBook6,3") || |
|
- | 402 | of_machine_is_compatible("PowerBook6,5")); |
|
- | 403 | #endif |
|
- | 404 | } |
|
- | 405 | ||
- | 406 | if (rdev->is_atom_bios) { |
|
- | 407 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
|
- | 408 | lvds->bl_dev = bd; |
|
- | 409 | } else { |
|
- | 410 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
|
- | 411 | lvds->bl_dev = bd; |
|
- | 412 | } |
|
- | 413 | ||
- | 414 | bd->props.brightness = radeon_legacy_backlight_get_brightness(bd); |
|
- | 415 | bd->props.power = FB_BLANK_UNBLANK; |
|
- | 416 | backlight_update_status(bd); |
|
- | 417 | ||
- | 418 | DRM_INFO("radeon legacy LVDS backlight initialized\n"); |
|
- | 419 | ||
- | 420 | return; |
|
- | 421 | ||
- | 422 | error: |
|
- | 423 | kfree(pdata); |
|
- | 424 | return; |
|
- | 425 | } |
|
- | 426 | ||
- | 427 | static void radeon_legacy_backlight_exit(struct radeon_encoder *radeon_encoder) |
|
- | 428 | { |
|
- | 429 | struct drm_device *dev = radeon_encoder->base.dev; |
|
- | 430 | struct radeon_device *rdev = dev->dev_private; |
|
- | 431 | struct backlight_device *bd = NULL; |
|
- | 432 | ||
- | 433 | if (!radeon_encoder->enc_priv) |
|
- | 434 | return; |
|
- | 435 | ||
- | 436 | if (rdev->is_atom_bios) { |
|
- | 437 | struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; |
|
- | 438 | bd = lvds->bl_dev; |
|
- | 439 | lvds->bl_dev = NULL; |
|
- | 440 | } else { |
|
- | 441 | struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; |
|
- | 442 | bd = lvds->bl_dev; |
|
- | 443 | lvds->bl_dev = NULL; |
|
- | 444 | } |
|
- | 445 | ||
- | 446 | if (bd) { |
|
- | 447 | struct radeon_legacy_backlight_privdata *pdata; |
|
- | 448 | ||
- | 449 | pdata = bl_get_data(bd); |
|
- | 450 | backlight_device_unregister(bd); |
|
- | 451 | kfree(pdata); |
|
- | 452 | ||
- | 453 | DRM_INFO("radeon legacy LVDS backlight unloaded\n"); |
|
- | 454 | } |
|
- | 455 | } |
|
- | 456 | ||
- | 457 | #else /* !CONFIG_BACKLIGHT_CLASS_DEVICE */ |
|
- | 458 | ||
- | 459 | void radeon_legacy_backlight_init(struct radeon_encoder *encoder) |
|
- | 460 | { |
|
- | 461 | } |
|
- | 462 | ||
- | 463 | static void radeon_legacy_backlight_exit(struct radeon_encoder *encoder) |
|
- | 464 | { |
|
- | 465 | } |
|
- | 466 | ||
- | 467 | #endif |
|
- | 468 | ||
- | 469 | ||
- | 470 | static void radeon_lvds_enc_destroy(struct drm_encoder *encoder) |
|
- | 471 | { |
|
- | 472 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
- | 473 | ||
- | 474 | if (radeon_encoder->enc_priv) { |
|
- | 475 | radeon_legacy_backlight_exit(radeon_encoder); |
|
- | 476 | kfree(radeon_encoder->enc_priv); |
|
- | 477 | } |
|
- | 478 | drm_encoder_cleanup(encoder); |
|
- | 479 | kfree(radeon_encoder); |
|
Line 253... | Line 480... | ||
253 | 480 | } |
|
254 | 481 | ||
255 | static const struct drm_encoder_funcs radeon_legacy_lvds_enc_funcs = { |
482 | static const struct drm_encoder_funcs radeon_legacy_lvds_enc_funcs = { |
Line 256... | Line 483... | ||
256 | .destroy = radeon_enc_destroy, |
483 | .destroy = radeon_lvds_enc_destroy, |
257 | }; |
484 | }; |
258 | 485 | ||
259 | static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode) |
486 | static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode) |
260 | { |
487 | { |
261 | struct drm_device *dev = encoder->dev; |
488 | struct drm_device *dev = encoder->dev; |
262 | struct radeon_device *rdev = dev->dev_private; |
489 | struct radeon_device *rdev = dev->dev_private; |
Line 263... | Line 490... | ||
263 | uint32_t crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
490 | uint32_t crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
Line 264... | Line 491... | ||
264 | uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL); |
491 | uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL); |
265 | uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL); |
492 | uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL); |
266 | 493 | ||
267 | DRM_DEBUG("\n"); |
494 | DRM_DEBUG_KMS("\n"); |
Line 292... | Line 519... | ||
292 | if (rdev->is_atom_bios) |
519 | if (rdev->is_atom_bios) |
293 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
520 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
294 | else |
521 | else |
295 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
522 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
Line 296... | Line -... | ||
296 | - | ||
297 | /* adjust pm to dpms change */ |
- | |
298 | radeon_pm_compute_clocks(rdev); |
523 | |
Line 299... | Line 524... | ||
299 | } |
524 | } |
300 | 525 | ||
301 | static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder) |
526 | static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder) |
Line 329... | Line 554... | ||
329 | struct radeon_device *rdev = dev->dev_private; |
554 | struct radeon_device *rdev = dev->dev_private; |
330 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
555 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
331 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
556 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
332 | uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl; |
557 | uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl; |
Line 333... | Line 558... | ||
333 | 558 | ||
Line 334... | Line 559... | ||
334 | DRM_DEBUG("\n"); |
559 | DRM_DEBUG_KMS("\n"); |
335 | 560 | ||
336 | if (radeon_crtc->crtc_id == 0) { |
561 | if (radeon_crtc->crtc_id == 0) { |
337 | if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { |
562 | if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { |
Line 460... | Line 685... | ||
460 | static void radeon_legacy_tmds_int_dpms(struct drm_encoder *encoder, int mode) |
685 | static void radeon_legacy_tmds_int_dpms(struct drm_encoder *encoder, int mode) |
461 | { |
686 | { |
462 | struct drm_device *dev = encoder->dev; |
687 | struct drm_device *dev = encoder->dev; |
463 | struct radeon_device *rdev = dev->dev_private; |
688 | struct radeon_device *rdev = dev->dev_private; |
464 | uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL); |
689 | uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL); |
465 | DRM_DEBUG("\n"); |
690 | DRM_DEBUG_KMS("\n"); |
Line 466... | Line 691... | ||
466 | 691 | ||
467 | switch (mode) { |
692 | switch (mode) { |
468 | case DRM_MODE_DPMS_ON: |
693 | case DRM_MODE_DPMS_ON: |
469 | fp_gen_cntl |= (RADEON_FP_FPON | RADEON_FP_TMDS_EN); |
694 | fp_gen_cntl |= (RADEON_FP_FPON | RADEON_FP_TMDS_EN); |
Line 480... | Line 705... | ||
480 | if (rdev->is_atom_bios) |
705 | if (rdev->is_atom_bios) |
481 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
706 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
482 | else |
707 | else |
483 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
708 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
Line 484... | Line -... | ||
484 | - | ||
485 | /* adjust pm to dpms change */ |
- | |
486 | radeon_pm_compute_clocks(rdev); |
709 | |
Line 487... | Line 710... | ||
487 | } |
710 | } |
488 | 711 | ||
489 | static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder) |
712 | static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder) |
Line 518... | Line 741... | ||
518 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
741 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
519 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
742 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
520 | uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl; |
743 | uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl; |
521 | int i; |
744 | int i; |
Line 522... | Line 745... | ||
522 | 745 | ||
Line 523... | Line 746... | ||
523 | DRM_DEBUG("\n"); |
746 | DRM_DEBUG_KMS("\n"); |
524 | 747 | ||
525 | tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); |
748 | tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); |
526 | tmp &= 0xfffff; |
749 | tmp &= 0xfffff; |
Line 626... | Line 849... | ||
626 | static void radeon_legacy_tmds_ext_dpms(struct drm_encoder *encoder, int mode) |
849 | static void radeon_legacy_tmds_ext_dpms(struct drm_encoder *encoder, int mode) |
627 | { |
850 | { |
628 | struct drm_device *dev = encoder->dev; |
851 | struct drm_device *dev = encoder->dev; |
629 | struct radeon_device *rdev = dev->dev_private; |
852 | struct radeon_device *rdev = dev->dev_private; |
630 | uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
853 | uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
631 | DRM_DEBUG("\n"); |
854 | DRM_DEBUG_KMS("\n"); |
Line 632... | Line 855... | ||
632 | 855 | ||
633 | switch (mode) { |
856 | switch (mode) { |
634 | case DRM_MODE_DPMS_ON: |
857 | case DRM_MODE_DPMS_ON: |
635 | fp2_gen_cntl &= ~RADEON_FP2_BLANK_EN; |
858 | fp2_gen_cntl &= ~RADEON_FP2_BLANK_EN; |
Line 648... | Line 871... | ||
648 | if (rdev->is_atom_bios) |
871 | if (rdev->is_atom_bios) |
649 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
872 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
650 | else |
873 | else |
651 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
874 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
Line 652... | Line -... | ||
652 | - | ||
653 | /* adjust pm to dpms change */ |
- | |
654 | radeon_pm_compute_clocks(rdev); |
875 | |
Line 655... | Line 876... | ||
655 | } |
876 | } |
656 | 877 | ||
657 | static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder) |
878 | static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder) |
Line 684... | Line 905... | ||
684 | struct radeon_device *rdev = dev->dev_private; |
905 | struct radeon_device *rdev = dev->dev_private; |
685 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
906 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
686 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
907 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
687 | uint32_t fp2_gen_cntl; |
908 | uint32_t fp2_gen_cntl; |
Line 688... | Line 909... | ||
688 | 909 | ||
Line 689... | Line 910... | ||
689 | DRM_DEBUG("\n"); |
910 | DRM_DEBUG_KMS("\n"); |
690 | 911 | ||
691 | if (rdev->is_atom_bios) { |
912 | if (rdev->is_atom_bios) { |
692 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
913 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
693 | atombios_external_tmds_setup(encoder, ATOM_ENABLE); |
914 | atombios_dvo_setup(encoder, ATOM_ENABLE); |
694 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
915 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
Line 695... | Line 916... | ||
695 | } else { |
916 | } else { |
Line 778... | Line 999... | ||
778 | struct radeon_device *rdev = dev->dev_private; |
999 | struct radeon_device *rdev = dev->dev_private; |
779 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1000 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
780 | uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0; |
1001 | uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0; |
781 | uint32_t tv_master_cntl = 0; |
1002 | uint32_t tv_master_cntl = 0; |
782 | bool is_tv; |
1003 | bool is_tv; |
783 | DRM_DEBUG("\n"); |
1004 | DRM_DEBUG_KMS("\n"); |
Line 784... | Line 1005... | ||
784 | 1005 | ||
Line 785... | Line 1006... | ||
785 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
1006 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
786 | 1007 | ||
Line 858... | Line 1079... | ||
858 | if (rdev->is_atom_bios) |
1079 | if (rdev->is_atom_bios) |
859 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
1080 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
860 | else |
1081 | else |
861 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
1082 | radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
Line 862... | Line -... | ||
862 | - | ||
863 | /* adjust pm to dpms change */ |
- | |
864 | radeon_pm_compute_clocks(rdev); |
1083 | |
Line 865... | Line 1084... | ||
865 | } |
1084 | } |
866 | 1085 | ||
867 | static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder) |
1086 | static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder) |
Line 898... | Line 1117... | ||
898 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
1117 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
899 | uint32_t tv_dac_cntl, gpiopad_a = 0, dac2_cntl, disp_output_cntl = 0; |
1118 | uint32_t tv_dac_cntl, gpiopad_a = 0, dac2_cntl, disp_output_cntl = 0; |
900 | uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0; |
1119 | uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0; |
901 | bool is_tv = false; |
1120 | bool is_tv = false; |
Line 902... | Line 1121... | ||
902 | 1121 | ||
Line 903... | Line 1122... | ||
903 | DRM_DEBUG("\n"); |
1122 | DRM_DEBUG_KMS("\n"); |
Line 904... | Line 1123... | ||
904 | 1123 | ||
905 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
1124 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
Line 923... | Line 1142... | ||
923 | RADEON_TV_DAC_RDACPD | |
1142 | RADEON_TV_DAC_RDACPD | |
924 | RADEON_TV_DAC_GDACPD | |
1143 | RADEON_TV_DAC_GDACPD | |
925 | RADEON_TV_DAC_BDACPD); |
1144 | RADEON_TV_DAC_BDACPD); |
926 | } |
1145 | } |
Line 927... | Line 1146... | ||
927 | 1146 | ||
- | 1147 | tv_dac_cntl |= RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD; |
|
928 | /* FIXME TV */ |
1148 | |
- | 1149 | if (is_tv) { |
|
- | 1150 | if (tv_dac->tv_std == TV_STD_NTSC || |
|
- | 1151 | tv_dac->tv_std == TV_STD_NTSC_J || |
|
- | 1152 | tv_dac->tv_std == TV_STD_PAL_M || |
|
929 | if (tv_dac) { |
1153 | tv_dac->tv_std == TV_STD_PAL_60) |
- | 1154 | tv_dac_cntl |= tv_dac->ntsc_tvdac_adj; |
|
930 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
1155 | else |
- | 1156 | tv_dac_cntl |= tv_dac->pal_tvdac_adj; |
|
931 | tv_dac_cntl |= (RADEON_TV_DAC_NBLANK | |
1157 | |
- | 1158 | if (tv_dac->tv_std == TV_STD_NTSC || |
|
932 | RADEON_TV_DAC_NHOLD | |
1159 | tv_dac->tv_std == TV_STD_NTSC_J) |
- | 1160 | tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC; |
|
933 | RADEON_TV_DAC_STD_PS2 | |
1161 | else |
934 | tv_dac->ps2_tvdac_adj); |
1162 | tv_dac_cntl |= RADEON_TV_DAC_STD_PAL; |
935 | } else |
1163 | } else |
936 | tv_dac_cntl |= (RADEON_TV_DAC_NBLANK | |
- | |
937 | RADEON_TV_DAC_NHOLD | |
1164 | tv_dac_cntl |= (RADEON_TV_DAC_STD_PS2 | |
Line 938... | Line 1165... | ||
938 | RADEON_TV_DAC_STD_PS2); |
1165 | tv_dac->ps2_tvdac_adj); |
939 | 1166 | ||
Line 940... | Line 1167... | ||
940 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1167 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
941 | } |
1168 | } |
942 | 1169 | ||
943 | if (ASIC_IS_R300(rdev)) { |
- | |
944 | gpiopad_a = RREG32(RADEON_GPIOPAD_A) | 1; |
- | |
945 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); |
1170 | if (ASIC_IS_R300(rdev)) { |
946 | } |
- | |
947 | - | ||
948 | if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) |
1171 | gpiopad_a = RREG32(RADEON_GPIOPAD_A) | 1; |
949 | disp_tv_out_cntl = RREG32(RADEON_DISP_TV_OUT_CNTL); |
- | |
950 | else |
1172 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); |
951 | disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG); |
1173 | } else if (rdev->family != CHIP_R200) |
Line -... | Line 1174... | ||
- | 1174 | disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG); |
|
- | 1175 | else if (rdev->family == CHIP_R200) |
|
- | 1176 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
|
952 | 1177 | ||
953 | if (rdev->family == CHIP_R200) |
1178 | if (rdev->family >= CHIP_R200) |
Line 954... | Line 1179... | ||
954 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
1179 | disp_tv_out_cntl = RREG32(RADEON_DISP_TV_OUT_CNTL); |
955 | 1180 | ||
Line 1015... | Line 1240... | ||
1015 | } |
1240 | } |
Line 1016... | Line 1241... | ||
1016 | 1241 | ||
1017 | if (ASIC_IS_R300(rdev)) { |
1242 | if (ASIC_IS_R300(rdev)) { |
1018 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); |
1243 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); |
1019 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); |
- | |
- | 1244 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); |
|
- | 1245 | } else if (rdev->family != CHIP_R200) |
|
- | 1246 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); |
|
- | 1247 | else if (rdev->family == CHIP_R200) |
|
Line 1020... | Line 1248... | ||
1020 | } |
1248 | WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); |
1021 | 1249 | ||
1022 | if (rdev->family >= CHIP_R200) |
- | |
1023 | WREG32(RADEON_DISP_TV_OUT_CNTL, disp_tv_out_cntl); |
- | |
1024 | else |
- | |
1025 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); |
- | |
1026 | - | ||
Line 1027... | Line 1250... | ||
1027 | if (rdev->family == CHIP_R200) |
1250 | if (rdev->family >= CHIP_R200) |
1028 | WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); |
1251 | WREG32(RADEON_DISP_TV_OUT_CNTL, disp_tv_out_cntl); |
Line 1029... | Line 1252... | ||
1029 | 1252 | ||
Line 1091... | Line 1314... | ||
1091 | mdelay(6); |
1314 | mdelay(6); |
Line 1092... | Line 1315... | ||
1092 | 1315 | ||
1093 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1316 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1094 | if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { |
1317 | if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { |
1095 | found = true; |
1318 | found = true; |
1096 | DRM_DEBUG("S-video TV connection detected\n"); |
1319 | DRM_DEBUG_KMS("S-video TV connection detected\n"); |
1097 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1320 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1098 | found = true; |
1321 | found = true; |
1099 | DRM_DEBUG("Composite TV connection detected\n"); |
1322 | DRM_DEBUG_KMS("Composite TV connection detected\n"); |
Line 1100... | Line 1323... | ||
1100 | } |
1323 | } |
1101 | 1324 | ||
1102 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1325 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
Line 1157... | Line 1380... | ||
1157 | 1380 | ||
1158 | mdelay(3); |
1381 | mdelay(3); |
1159 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1382 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1160 | if (tmp & RADEON_TV_DAC_GDACDET) { |
1383 | if (tmp & RADEON_TV_DAC_GDACDET) { |
1161 | found = true; |
1384 | found = true; |
1162 | DRM_DEBUG("S-video TV connection detected\n"); |
1385 | DRM_DEBUG_KMS("S-video TV connection detected\n"); |
1163 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1386 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1164 | found = true; |
1387 | found = true; |
1165 | DRM_DEBUG("Composite TV connection detected\n"); |
1388 | DRM_DEBUG_KMS("Composite TV connection detected\n"); |
Line 1166... | Line 1389... | ||
1166 | } |
1389 | } |
1167 | 1390 | ||
1168 | WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl); |
1391 | WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl); |
Line 1181... | Line 1404... | ||
1181 | uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; |
1404 | uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; |
1182 | enum drm_connector_status found = connector_status_disconnected; |
1405 | enum drm_connector_status found = connector_status_disconnected; |
1183 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1406 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1184 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
1407 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
1185 | bool color = true; |
1408 | bool color = true; |
- | 1409 | struct drm_crtc *crtc; |
|
- | 1410 | ||
- | 1411 | /* find out if crtc2 is in use or if this encoder is using it */ |
|
- | 1412 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
|
- | 1413 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
|
- | 1414 | if ((radeon_crtc->crtc_id == 1) && crtc->enabled) { |
|
- | 1415 | if (encoder->crtc != crtc) { |
|
- | 1416 | return connector_status_disconnected; |
|
- | 1417 | } |
|
- | 1418 | } |
|
- | 1419 | } |
|
Line 1186... | Line 1420... | ||
1186 | 1420 | ||
1187 | if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO || |
1421 | if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO || |
1188 | connector->connector_type == DRM_MODE_CONNECTOR_Composite || |
1422 | connector->connector_type == DRM_MODE_CONNECTOR_Composite || |
1189 | connector->connector_type == DRM_MODE_CONNECTOR_9PinDIN) { |
1423 | connector->connector_type == DRM_MODE_CONNECTOR_9PinDIN) { |
Line 1350... | Line 1584... | ||
1350 | 1584 | ||
1351 | return tmds; |
1585 | return tmds; |
Line 1352... | Line 1586... | ||
1352 | } |
1586 | } |
1353 | 1587 | ||
1354 | void |
1588 | void |
1355 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) |
1589 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device) |
1356 | { |
1590 | { |
1357 | struct radeon_device *rdev = dev->dev_private; |
1591 | struct radeon_device *rdev = dev->dev_private; |
Line 1358... | Line 1592... | ||
1358 | struct drm_encoder *encoder; |
1592 | struct drm_encoder *encoder; |
1359 | struct radeon_encoder *radeon_encoder; |
1593 | struct radeon_encoder *radeon_encoder; |
1360 | 1594 | ||
1361 | /* see if we already added it */ |
1595 | /* see if we already added it */ |
1362 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
1596 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
1363 | radeon_encoder = to_radeon_encoder(encoder); |
1597 | radeon_encoder = to_radeon_encoder(encoder); |
1364 | if (radeon_encoder->encoder_id == encoder_id) { |
1598 | if (radeon_encoder->encoder_enum == encoder_enum) { |
Line 1365... | Line 1599... | ||
1365 | radeon_encoder->devices |= supported_device; |
1599 | radeon_encoder->devices |= supported_device; |
Line 1379... | Line 1613... | ||
1379 | else |
1613 | else |
1380 | encoder->possible_crtcs = 0x3; |
1614 | encoder->possible_crtcs = 0x3; |
Line 1381... | Line 1615... | ||
1381 | 1615 | ||
Line 1382... | Line 1616... | ||
1382 | radeon_encoder->enc_priv = NULL; |
1616 | radeon_encoder->enc_priv = NULL; |
- | 1617 | ||
1383 | 1618 | radeon_encoder->encoder_enum = encoder_enum; |
|
1384 | radeon_encoder->encoder_id = encoder_id; |
1619 | radeon_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; |
Line 1385... | Line 1620... | ||
1385 | radeon_encoder->devices = supported_device; |
1620 | radeon_encoder->devices = supported_device; |
1386 | radeon_encoder->rmx_type = RMX_OFF; |
1621 | radeon_encoder->rmx_type = RMX_OFF; |