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Rev 3764 Rev 5078
Line 39... Line 39...
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/**
 41 
/**
42 
 * radeon_driver_irq_handler_kms - irq handler for KMS
 42 
 * radeon_driver_irq_handler_kms - irq handler for KMS
43 
 *
 43 
 *
44 
 * @DRM_IRQ_ARGS: args
 44 
 * @int irq, void *arg: args
45 
 *
 45 
 *
46 
 * This is the irq handler for the radeon KMS driver (all asics).
 46 
 * This is the irq handler for the radeon KMS driver (all asics).
47 
 * radeon_irq_process is a macro that points to the per-asic
 47 
 * radeon_irq_process is a macro that points to the per-asic
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 * irq handler callback.
 48 
 * irq handler callback.
49 
 */
 49 
 */
50 
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
 50 
irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
51 
{
 51 
{
Line 52... Line 52...
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	struct drm_device *dev = (struct drm_device *) arg;
 52 
	struct drm_device *dev = (struct drm_device *) arg;
Line 71... Line 71...
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 71 
 
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
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    /* Disable *all* interrupts */
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    /* Disable *all* interrupts */
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	for (i = 0; i < RADEON_NUM_RINGS; i++)
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	for (i = 0; i < RADEON_NUM_RINGS; i++)
- 
 
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		atomic_set(&rdev->irq.ring_int[i], 0);
75 
		atomic_set(&rdev->irq.ring_int[i], 0);
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	rdev->irq.dpm_thermal = false;
76 
	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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		rdev->irq.hpd[i] = false;
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		rdev->irq.hpd[i] = false;
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	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
79 
        rdev->irq.crtc_vblank_int[i] = false;
 80 
        rdev->irq.crtc_vblank_int[i] = false;
Line 118... Line 119...
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	}
 119 
	}
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
120 
	/* Disable *all* interrupts */
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	/* Disable *all* interrupts */
121 
	for (i = 0; i < RADEON_NUM_RINGS; i++)
 122 
	for (i = 0; i < RADEON_NUM_RINGS; i++)
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		atomic_set(&rdev->irq.ring_int[i], 0);
 123 
		atomic_set(&rdev->irq.ring_int[i], 0);
- 
 
 124 
	rdev->irq.dpm_thermal = false;
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	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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		rdev->irq.hpd[i] = false;
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		rdev->irq.hpd[i] = false;
125 
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 127 
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
126 
		rdev->irq.crtc_vblank_int[i] = false;
 128 
		rdev->irq.crtc_vblank_int[i] = false;
127 
		atomic_set(&rdev->irq.pflip[i], 0);
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		atomic_set(&rdev->irq.pflip[i], 0);
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 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
 143 
 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
142 
 * Returns 0 for success, error for failure.
 144 
 * Returns 0 for success, error for failure.
143 
 */
 145 
 */
144 
int radeon_irq_kms_init(struct radeon_device *rdev)
 146 
int radeon_irq_kms_init(struct radeon_device *rdev)
145 
{
 147 
{
146 
    int irq_line;
 - 
 
147 
	int r = 0;
 148 
	int r = 0;
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 - 
 
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    ENTER();
 - 
 
150 
 
 - 
 
151 
 
 149 
 
152 
	spin_lock_init(&rdev->irq.lock);
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	spin_lock_init(&rdev->irq.lock);
153 
	/* enable msi */
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	/* enable msi */
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	rdev->msi_enabled = 0;
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	rdev->msi_enabled = 0;
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 153 
 
156 
    rdev->irq.installed = true;
 154 
    rdev->irq.installed = true;
157 
	r = drm_irq_install(rdev->ddev);
 155 
	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
158 
    if (r) {
 156 
    if (r) {
159 
       rdev->irq.installed = false;
 157 
       rdev->irq.installed = false;
160 
       FAIL();
 158 
       FAIL();
- 
 
 159 
       return r;
161 
       return r;
 160 
   }
162 
   }
 161 
 
163 
	DRM_INFO("radeon: irq initialized.\n");
 162 
	DRM_INFO("radeon: irq initialized.\n");
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	return 0;
 163 
	return 0;
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//		drm_irq_uninstall(rdev->ddev);
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//		drm_irq_uninstall(rdev->ddev);
179 
		rdev->irq.installed = false;
 178 
		rdev->irq.installed = false;
180 
//       if (rdev->msi_enabled)
 179 
//       if (rdev->msi_enabled)
181 
//			pci_disable_msi(rdev->pdev);
 180 
//			pci_disable_msi(rdev->pdev);
182 
	}
 181 
	}
183 
//	flush_work(&rdev->hotplug_work);
 - 
 
184 
}
 182 
}
Line 185... Line 183...
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 183 
 
186 
/**
 184 
/**
187 
 * radeon_irq_kms_sw_irq_get - enable software interrupt
 185 
 * radeon_irq_kms_sw_irq_get - enable software interrupt
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void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 240 
void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
243 
{
 241 
{
244 
	unsigned long irqflags;
 242 
	unsigned long irqflags;
245 
	int i;
 243 
	int i;
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 244 
 
- 
 
 245 
	if (!rdev->ddev->irq_enabled)
- 
 
 246 
		return;
246 
 
 247 
 
247 
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 248 
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
248 
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 249 
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
249 
		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
 250 
		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
250 
	radeon_irq_set(rdev);
 251 
	radeon_irq_set(rdev);
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void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 263 
void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
263 
{
 264 
{
264 
	unsigned long irqflags;
 265 
	unsigned long irqflags;
265 
	int i;
 266 
	int i;
Line -... Line 267...
- 
 
 267 
 
- 
 
 268 
	if (!rdev->ddev->irq_enabled)
- 
 
 269 
		return;
266 
 
 270 
 
267 
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 271 
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
268 
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 272 
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
269 
		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
 273 
		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
270 
	radeon_irq_set(rdev);
 274 
	radeon_irq_set(rdev);
271 
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 275 
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
Line 272... Line -...
272 
}
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273 
 
 - 
 
274 
 
 - 
 
275 
static struct drm_driver drm_driver = {
 - 
 
276 
    .irq_preinstall = radeon_driver_irq_preinstall_kms,
 - 
 
277 
    .irq_postinstall = radeon_driver_irq_postinstall_kms,
 - 
 
278 
    .irq_handler = radeon_driver_irq_handler_kms
 - 
 
279 
};
 - 
 
280 
 
 - 
 
281 
static struct drm_driver *driver = &drm_driver;
 - 
 
282 
 
 - 
 
283 
int drm_irq_install(struct drm_device *dev)
 - 
 
284 
{
 - 
 
285 
    unsigned long sh_flags = 0;
 - 
 
286 
    int irq_line;
 - 
 
287 
    int ret = 0;
 - 
 
288 
 
 - 
 
289 
    char *irqname;
 - 
 
290 
 
 - 
 
291 
    mutex_lock(&dev->struct_mutex);
 - 
 
292 
 
 - 
 
293 
    /* Driver must have been initialized */
 - 
 
294 
    if (!dev->dev_private) {
 - 
 
295 
            mutex_unlock(&dev->struct_mutex);
 - 
 
296 
            return -EINVAL;
 - 
 
297 
    }
 - 
 
298 
 
 - 
 
299 
    if (dev->irq_enabled) {
 - 
 
300 
            mutex_unlock(&dev->struct_mutex);
 - 
 
301 
            return -EBUSY;
 - 
 
302 
    }
 - 
 
303 
    dev->irq_enabled = 1;
 - 
 
304 
    mutex_unlock(&dev->struct_mutex);
 - 
 
305 
 
 - 
 
306 
    irq_line   = drm_dev_to_irq(dev);
 - 
 
307 
 
 - 
 
308 
    DRM_DEBUG("irq=%d\n", drm_dev_to_irq(dev));
 - 
 
309 
 
 - 
 
310 
    /* Before installing handler */
 - 
 
311 
    if (driver->irq_preinstall)
 - 
 
312 
            driver->irq_preinstall(dev);
 - 
 
313 
 
 - 
 
314 
    ret = AttachIntHandler(irq_line, driver->irq_handler, (u32)dev);
 - 
 
315 
 
 - 
 
316 
    /* After installing handler */
 - 
 
317 
    if (driver->irq_postinstall)
 - 
 
318 
            ret = driver->irq_postinstall(dev);
 - 
 
319 
 
 - 
 
320 
    if (ret < 0) {
 - 
 
321 
            DRM_ERROR(__FUNCTION__);
 - 
 
322 
    }
 - 
 
323 
 
 - 
 
324 
    u16_t cmd = PciRead16(dev->pdev->busnr, dev->pdev->devfn, 4);
 - 
 
325 
    cmd&= ~(1<<10);
 - 
 
326 
    PciWrite16(dev->pdev->busnr, dev->pdev->devfn, 4, cmd);
 - 
 
327 
 
 -