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Line 27... Line 27...
27
 */
27
 */
28
//#include 
28
//#include 
Line 29... Line 29...
29
 
29
 
30
#include 
30
#include 
31
#include 
31
#include 
32
#include "radeon_drm.h"
32
#include 
33
#include "radeon_reg.h"
33
#include "radeon_reg.h"
34
#include "radeon.h"
34
#include "radeon.h"
35
#include "radeon_asic.h"
35
#include "radeon_asic.h"
Line -... Line 36...
-
 
36
#include "atom.h"
-
 
37
 
36
#include "atom.h"
38
#include 
Line 37... Line 39...
37
 
39
 
38
#include 
40
#include 
39
 
41
 
Line 271... Line 273...
271
    }
273
    }
272
    if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
274
    if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
273
        rdev->mc_rreg = &rs400_mc_rreg;
275
        rdev->mc_rreg = &rs400_mc_rreg;
274
        rdev->mc_wreg = &rs400_mc_wreg;
276
        rdev->mc_wreg = &rs400_mc_wreg;
275
    }
277
    }
276
//    if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
278
    if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
277
//        rdev->mc_rreg = &rs690_mc_rreg;
279
        rdev->mc_rreg = &rs690_mc_rreg;
278
//        rdev->mc_wreg = &rs690_mc_wreg;
280
        rdev->mc_wreg = &rs690_mc_wreg;
279
//    }
281
    }
280
//    if (rdev->family == CHIP_RS600) {
282
    if (rdev->family == CHIP_RS600) {
281
//        rdev->mc_rreg = &rs600_mc_rreg;
283
        rdev->mc_rreg = &rs600_mc_rreg;
282
//        rdev->mc_wreg = &rs600_mc_wreg;
284
        rdev->mc_wreg = &rs600_mc_wreg;
283
//    }
285
    }
284
//    if (rdev->family >= CHIP_R600) {
286
//    if (rdev->family >= CHIP_R600) {
285
//        rdev->pciep_rreg = &r600_pciep_rreg;
287
//        rdev->pciep_rreg = &r600_pciep_rreg;
286
//        rdev->pciep_wreg = &r600_pciep_wreg;
288
//        rdev->pciep_wreg = &r600_pciep_wreg;
287
//    }
289
//    }
288
}
290
}
Line 310... Line 312...
310
	case CHIP_R350:
312
	case CHIP_R350:
311
	case CHIP_RV350:
313
	case CHIP_RV350:
312
	case CHIP_RV380:
314
	case CHIP_RV380:
313
        rdev->asic = &r300_asic;
315
        rdev->asic = &r300_asic;
314
		if (rdev->flags & RADEON_IS_PCIE) {
316
		if (rdev->flags & RADEON_IS_PCIE) {
315
			rdev->asic->gart_init = &rv370_pcie_gart_init;
-
 
316
			rdev->asic->gart_fini = &rv370_pcie_gart_fini;
-
 
317
			rdev->asic->gart_enable = &rv370_pcie_gart_enable;
-
 
318
			rdev->asic->gart_disable = &rv370_pcie_gart_disable;
-
 
319
			rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
317
			rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
320
			rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
318
			rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
321
		}
319
		}
322
		break;
320
		break;
323
	case CHIP_R420:
321
	case CHIP_R420:
Line 328... Line 326...
328
	case CHIP_RS400:
326
	case CHIP_RS400:
329
	case CHIP_RS480:
327
	case CHIP_RS480:
330
       rdev->asic = &rs400_asic;
328
       rdev->asic = &rs400_asic;
331
		break;
329
		break;
332
	case CHIP_RS600:
330
	case CHIP_RS600:
333
//       rdev->asic = &rs600_asic;
331
        rdev->asic = &rs600_asic;
334
		break;
332
		break;
335
	case CHIP_RS690:
333
	case CHIP_RS690:
336
	case CHIP_RS740:
334
	case CHIP_RS740:
337
//        rdev->asic = &rs690_asic;
335
        rdev->asic = &rs690_asic;
338
		break;
336
		break;
339
	case CHIP_RV515:
337
	case CHIP_RV515:
340
        rdev->asic = &rv515_asic;
338
        rdev->asic = &rv515_asic;
341
		break;
339
		break;
342
	case CHIP_R520:
340
	case CHIP_R520:
Line 351... Line 349...
351
	case CHIP_RV630:
349
	case CHIP_RV630:
352
	case CHIP_RV620:
350
	case CHIP_RV620:
353
	case CHIP_RV635:
351
	case CHIP_RV635:
354
	case CHIP_RV670:
352
	case CHIP_RV670:
355
	case CHIP_RS780:
353
	case CHIP_RS780:
-
 
354
	case CHIP_RS880:
-
 
355
//		rdev->asic = &r600_asic;
-
 
356
		break;
356
	case CHIP_RV770:
357
	case CHIP_RV770:
357
	case CHIP_RV730:
358
	case CHIP_RV730:
358
	case CHIP_RV710:
359
	case CHIP_RV710:
-
 
360
	case CHIP_RV740:
-
 
361
//		rdev->asic = &rv770_asic;
-
 
362
		break;
359
	default:
363
	default:
360
		/* FIXME: not supported yet */
364
		/* FIXME: not supported yet */
361
		return -EINVAL;
365
		return -EINVAL;
362
	}
366
	}
363
	return 0;
367
	return 0;
Line 470... Line 474...
470
}
474
}
Line 471... Line 475...
471
 
475
 
472
int radeon_modeset_init(struct radeon_device *rdev);
476
int radeon_modeset_init(struct radeon_device *rdev);
Line -... Line 477...
-
 
477
void radeon_modeset_fini(struct radeon_device *rdev);
-
 
478
 
-
 
479
void radeon_agp_disable(struct radeon_device *rdev)
-
 
480
{
-
 
481
	rdev->flags &= ~RADEON_IS_AGP;
-
 
482
	if (rdev->family >= CHIP_R600) {
-
 
483
		DRM_INFO("Forcing AGP to PCIE mode\n");
-
 
484
		rdev->flags |= RADEON_IS_PCIE;
-
 
485
	} else if (rdev->family >= CHIP_RV515 ||
-
 
486
			rdev->family == CHIP_RV380 ||
-
 
487
			rdev->family == CHIP_RV410 ||
-
 
488
			rdev->family == CHIP_R423) {
-
 
489
		DRM_INFO("Forcing AGP to PCIE mode\n");
-
 
490
		rdev->flags |= RADEON_IS_PCIE;
-
 
491
		rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
-
 
492
		rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
-
 
493
	} else {
-
 
494
		DRM_INFO("Forcing AGP to PCI mode\n");
-
 
495
		rdev->flags |= RADEON_IS_PCI;
-
 
496
		rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
-
 
497
		rdev->asic->gart_set_page = &r100_pci_gart_set_page;
Line 473... Line 498...
473
void radeon_modeset_fini(struct radeon_device *rdev);
498
	}
474
 
499
}
475
 
500
 
476
/*
501
/*
477
 * Radeon device.
502
 * Radeon device.
478
 */
503
 */
479
int radeon_device_init(struct radeon_device *rdev,
504
int radeon_device_init(struct radeon_device *rdev,
480
               struct drm_device *ddev,
505
               struct drm_device *ddev,
481
               struct pci_dev *pdev,
506
               struct pci_dev *pdev,
482
               uint32_t flags)
507
               uint32_t flags)
Line 483... Line 508...
483
{
508
{
Line 484... Line 509...
484
	int r, ret;
509
	int r;
Line 494... Line 519...
494
    rdev->family = flags & RADEON_FAMILY_MASK;
519
    rdev->family = flags & RADEON_FAMILY_MASK;
495
    rdev->is_atom_bios = false;
520
    rdev->is_atom_bios = false;
496
    rdev->usec_timeout = RADEON_MAX_USEC_TIMEOUT;
521
    rdev->usec_timeout = RADEON_MAX_USEC_TIMEOUT;
497
    rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
522
    rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
498
    rdev->gpu_lockup = false;
523
    rdev->gpu_lockup = false;
-
 
524
	rdev->accel_working = false;
499
    /* mutex initialization are all done here so we
525
    /* mutex initialization are all done here so we
500
     * can recall function without having locking issues */
526
     * can recall function without having locking issues */
501
 //   mutex_init(&rdev->cs_mutex);
527
 //   mutex_init(&rdev->cs_mutex);
502
 //   mutex_init(&rdev->ib_pool.mutex);
528
 //   mutex_init(&rdev->ib_pool.mutex);
503
 //   mutex_init(&rdev->cp.mutex);
529
 //   mutex_init(&rdev->cp.mutex);
Line 508... Line 534...
508
	if (r) {
534
	if (r) {
509
		return r;
535
		return r;
510
	}
536
	}
Line 511... Line 537...
511
 
537
 
512
    if (radeon_agpmode == -1) {
-
 
513
        rdev->flags &= ~RADEON_IS_AGP;
-
 
514
		if (rdev->family >= CHIP_RV515 ||
-
 
515
            rdev->family == CHIP_RV380 ||
-
 
516
            rdev->family == CHIP_RV410 ||
-
 
517
            rdev->family == CHIP_R423) {
-
 
518
            DRM_INFO("Forcing AGP to PCIE mode\n");
-
 
519
            rdev->flags |= RADEON_IS_PCIE;
-
 
520
			rdev->asic->gart_init = &rv370_pcie_gart_init;
-
 
521
			rdev->asic->gart_fini = &rv370_pcie_gart_fini;
-
 
522
			rdev->asic->gart_enable = &rv370_pcie_gart_enable;
-
 
523
			rdev->asic->gart_disable = &rv370_pcie_gart_disable;
-
 
524
			rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
-
 
525
			rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
-
 
526
        } else {
-
 
527
            DRM_INFO("Forcing AGP to PCI mode\n");
-
 
528
            rdev->flags |= RADEON_IS_PCI;
-
 
529
			rdev->asic->gart_init = &r100_pci_gart_init;
-
 
530
			rdev->asic->gart_fini = &r100_pci_gart_fini;
-
 
531
			rdev->asic->gart_enable = &r100_pci_gart_enable;
538
    if (radeon_agpmode == -1) {
532
			rdev->asic->gart_disable = &r100_pci_gart_disable;
-
 
533
			rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
-
 
534
			rdev->asic->gart_set_page = &r100_pci_gart_set_page;
-
 
535
        }
539
		radeon_agp_disable(rdev);
Line 536... Line 540...
536
    }
540
    }
537
 
541
 
538
	/* set DMA mask + need_dma32 flags.
542
	/* set DMA mask + need_dma32 flags.
Line 566... Line 570...
566
        return -ENOMEM;
570
        return -ENOMEM;
567
    }
571
    }
568
    DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
572
    DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
569
    DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
573
    DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
Line 570... Line -...
570
 
-
 
571
	rdev->new_init_path = false;
-
 
572
	r = radeon_init(rdev);
-
 
573
	if (r) {
-
 
574
		return r;
-
 
575
	}
-
 
576
 
-
 
577
	if (!rdev->new_init_path) {
-
 
578
    /* Setup errata flags */
-
 
579
    radeon_errata(rdev);
-
 
580
    /* Initialize scratch registers */
-
 
581
    radeon_scratch_init(rdev);
-
 
582
	/* Initialize surface registers */
-
 
583
    radeon_surface_init(rdev);
-
 
584
 
-
 
585
    /* BIOS*/
-
 
586
    if (!radeon_get_bios(rdev)) {
-
 
587
        if (ASIC_IS_AVIVO(rdev))
-
 
588
            return -EINVAL;
-
 
589
    }
-
 
590
    if (rdev->is_atom_bios) {
-
 
591
        r = radeon_atombios_init(rdev);
-
 
592
        if (r) {
-
 
593
            return r;
-
 
594
        }
-
 
595
    } else {
-
 
596
        r = radeon_combios_init(rdev);
-
 
597
        if (r) {
-
 
598
            return r;
-
 
599
        }
-
 
600
    }
574
 
601
    /* Reset gpu before posting otherwise ATOM will enter infinite loop */
-
 
602
    if (radeon_gpu_reset(rdev)) {
-
 
603
        /* FIXME: what do we want to do here ? */
-
 
604
    }
-
 
605
    /* check if cards are posted or not */
-
 
606
    if (!radeon_card_posted(rdev) && rdev->bios) {
-
 
607
        DRM_INFO("GPU not posted. posting now...\n");
-
 
608
        if (rdev->is_atom_bios) {
575
	/* if we have > 1 VGA cards, then disable the radeon VGA resources */
609
            atom_asic_init(rdev->mode_info.atom_context);
-
 
610
        } else {
-
 
611
			radeon_combios_asic_init(rdev->ddev);
-
 
612
        }
-
 
613
    }
-
 
614
		/* Get clock & vram information */
-
 
615
		radeon_get_clock_info(rdev->ddev);
-
 
616
		radeon_vram_info(rdev);
-
 
617
	/* Initialize clocks */
-
 
618
	r = radeon_clocks_init(rdev);
576
//	r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
619
	if (r) {
577
//	if (r) {
620
		return r;
578
//		return -EINVAL;
Line 621... Line -...
621
	}
-
 
622
 
579
//	}
623
	/* Initialize memory controller (also test AGP) */
-
 
624
	r = radeon_mc_init(rdev);
-
 
625
	if (r) {
-
 
626
		return r;
-
 
627
	}
-
 
628
    /* Memory manager */
-
 
629
    r = radeon_object_init(rdev);
-
 
630
    if (r) {
-
 
631
        return r;
-
 
632
    }
580
 
633
		r = radeon_gpu_gart_init(rdev);
581
	r = radeon_init(rdev);
634
		if (r)
-
 
635
			return r;
-
 
636
    /* Initialize GART (initialize after TTM so we can allocate
-
 
637
     * memory through TTM but finalize after TTM) */
-
 
638
    r = radeon_gart_enable(rdev);
-
 
639
		if (r)
-
 
640
			return 0;
-
 
641
        r = radeon_gem_init(rdev);
-
 
Line 642... Line 582...
642
		if (r)
582
	if (r)
643
			return 0;
583
            return r;
644
 
-
 
645
    /* 1M ring buffer */
584
 
646
//        r = radeon_cp_init(rdev, 1024 * 1024);
585
	if (rdev->flags & RADEON_IS_AGP && !rdev->accel_working) {
647
//       if (r)
586
		/* Acceleration not working on AGP card try again
648
//           return 0;
587
		 * with fallback to PCI or PCIE GART
649
#if 0
-
 
650
		r = radeon_wb_init(rdev);
588
		 */
651
		if (r)
-
 
652
			DRM_ERROR("radeon: failled initializing WB (%d).\n", r);
-
 
653
        r = radeon_ib_pool_init(rdev);
589
		radeon_gpu_reset(rdev);
654
		if (r)
590
		radeon_fini(rdev);
655
			return 0;
591
		radeon_agp_disable(rdev);
656
		r = radeon_ib_test(rdev);
-
 
657
		if (r)
-
 
658
			return 0;
592
		r = radeon_init(rdev);
659
#endif
-
 
660
		rdev->accel_working = true;
593
		if (r)
661
	}
594
		return r;
662
	DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
595
	}
663
//	if (radeon_testing) {
596
//	if (radeon_testing) {
664
//		radeon_test_moves(rdev);
597
//		radeon_test_moves(rdev);
Line 711... Line 644...
711
    err = drm_get_dev(&device.pci_dev, ent);
644
    err = drm_get_dev(&device.pci_dev, ent);
Line 712... Line 645...
712
 
645
 
713
    return retval;
646
    return retval;
Line 714... Line -...
714
};
-
 
715
 
-
 
716
/*
-
 
717
static struct drm_driver kms_driver = {
-
 
718
    .driver_features =
-
 
719
        DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
-
 
720
        DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
-
 
721
    .dev_priv_size = 0,
-
 
722
    .load = radeon_driver_load_kms,
-
 
723
    .firstopen = radeon_driver_firstopen_kms,
-
 
724
    .open = radeon_driver_open_kms,
-
 
725
    .preclose = radeon_driver_preclose_kms,
-
 
726
    .postclose = radeon_driver_postclose_kms,
-
 
727
    .lastclose = radeon_driver_lastclose_kms,
-
 
728
    .unload = radeon_driver_unload_kms,
-
 
729
    .suspend = radeon_suspend_kms,
-
 
730
    .resume = radeon_resume_kms,
-
 
731
    .get_vblank_counter = radeon_get_vblank_counter_kms,
-
 
732
    .enable_vblank = radeon_enable_vblank_kms,
-
 
733
    .disable_vblank = radeon_disable_vblank_kms,
-
 
734
    .master_create = radeon_master_create_kms,
-
 
735
    .master_destroy = radeon_master_destroy_kms,
-
 
736
#if defined(CONFIG_DEBUG_FS)
-
 
737
    .debugfs_init = radeon_debugfs_init,
-
 
738
    .debugfs_cleanup = radeon_debugfs_cleanup,
-
 
739
#endif
-
 
740
    .irq_preinstall = radeon_driver_irq_preinstall_kms,
-
 
741
    .irq_postinstall = radeon_driver_irq_postinstall_kms,
-
 
742
    .irq_uninstall = radeon_driver_irq_uninstall_kms,
-
 
743
    .irq_handler = radeon_driver_irq_handler_kms,
-
 
744
    .reclaim_buffers = drm_core_reclaim_buffers,
-
 
745
    .get_map_ofs = drm_core_get_map_ofs,
-
 
746
    .get_reg_ofs = drm_core_get_reg_ofs,
-
 
747
    .ioctls = radeon_ioctls_kms,
-
 
748
    .gem_init_object = radeon_gem_object_init,
-
 
749
    .gem_free_object = radeon_gem_object_free,
-
 
750
    .dma_ioctl = radeon_dma_ioctl_kms,
-
 
751
    .fops = {
-
 
752
         .owner = THIS_MODULE,
-
 
753
         .open = drm_open,
-
 
754
         .release = drm_release,
-
 
755
         .ioctl = drm_ioctl,
-
 
756
         .mmap = radeon_mmap,
-
 
757
         .poll = drm_poll,
-
 
758
         .fasync = drm_fasync,
-
 
759
#ifdef CONFIG_COMPAT
-
 
760
         .compat_ioctl = NULL,
-
 
761
#endif
-
 
762
    },
-
 
763
 
-
 
764
    .pci_driver = {
-
 
765
         .name = DRIVER_NAME,
-
 
766
         .id_table = pciidlist,
-
 
767
         .probe = radeon_pci_probe,
-
 
768
         .remove = radeon_pci_remove,
-
 
769
         .suspend = radeon_pci_suspend,
-
 
770
         .resume = radeon_pci_resume,
-
 
771
    },
-
 
772
 
-
 
773
    .name = DRIVER_NAME,
-
 
774
    .desc = DRIVER_DESC,
-
 
775
    .date = DRIVER_DATE,
-
 
776
    .major = KMS_DRIVER_MAJOR,
-
 
777
    .minor = KMS_DRIVER_MINOR,
-
 
778
    .patchlevel = KMS_DRIVER_PATCHLEVEL,
-
 
Line 779... Line 647...
779
};
647
};
780
*/
648
 
781
 
649
 
Line 831... Line 699...
831
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
699
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
832
{
700
{
833
    struct drm_device *dev;
701
    struct drm_device *dev;
834
    int ret;
702
    int ret;
Line 835... Line 703...
835
 
703
 
Line 836... Line 704...
836
    dbgprintf("%s\n",__FUNCTION__);
704
    ENTER();
837
 
705
 
838
    dev = malloc(sizeof(*dev));
706
    dev = malloc(sizeof(*dev));
Line 880... Line 748...
880
 //        driver->name, driver->major, driver->minor, driver->patchlevel,
748
 //        driver->name, driver->major, driver->minor, driver->patchlevel,
881
 //        driver->date, pci_name(pdev), dev->primary->index);
749
 //        driver->date, pci_name(pdev), dev->primary->index);
Line 882... Line 750...
882
 
750
 
Line -... Line 751...
-
 
751
    set_mode(dev, 1280, 1024);
-
 
752
 
883
      set_mode(dev, 1280, 1024);
753
    LEAVE();
Line 884... Line 754...
884
 
754
 
885
    return 0;
755
    return 0;
886
 
756
 
Line 892... Line 762...
892
//err_g2:
762
//err_g2:
893
//    pci_disable_device(pdev);
763
//    pci_disable_device(pdev);
894
//err_g1:
764
//err_g1:
895
    free(dev);
765
    free(dev);
Line -... Line 766...
-
 
766
 
-
 
767
    LEAVE();
896
 
768
 
897
    return ret;
769
    return ret;
Line 898... Line 770...
898
}
770
}
899
 
771
 
Line 939... Line 811...
939
 
811
 
940
        *n = res;
812
        *n = res;
941
        return rem;
813
        return rem;
Line 942... Line -...
942
}
-
 
943
-
 
944
-
 
945
-
 
946
-