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Rev 5139 | Rev 5271 | ||
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Line 79... | Line 79... | ||
79 | struct radeon_semaphore *semaphore, |
79 | struct radeon_semaphore *semaphore, |
80 | bool emit_wait); |
80 | bool emit_wait); |
81 | int r100_cs_parse(struct radeon_cs_parser *p); |
81 | int r100_cs_parse(struct radeon_cs_parser *p); |
82 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
82 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
83 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
83 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
84 | int r100_copy_blit(struct radeon_device *rdev, |
84 | struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, |
85 | uint64_t src_offset, |
85 | uint64_t src_offset, |
86 | uint64_t dst_offset, |
86 | uint64_t dst_offset, |
87 | unsigned num_gpu_pages, |
87 | unsigned num_gpu_pages, |
88 | struct radeon_fence **fence); |
88 | struct reservation_object *resv); |
89 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
89 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
90 | uint32_t tiling_flags, uint32_t pitch, |
90 | uint32_t tiling_flags, uint32_t pitch, |
91 | uint32_t offset, uint32_t obj_size); |
91 | uint32_t offset, uint32_t obj_size); |
92 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
92 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
93 | void r100_bandwidth_update(struct radeon_device *rdev); |
93 | void r100_bandwidth_update(struct radeon_device *rdev); |
Line 150... | Line 150... | ||
150 | struct radeon_ring *ring); |
150 | struct radeon_ring *ring); |
Line 151... | Line 151... | ||
151 | 151 | ||
152 | /* |
152 | /* |
153 | * r200,rv250,rs300,rv280 |
153 | * r200,rv250,rs300,rv280 |
154 | */ |
154 | */ |
155 | extern int r200_copy_dma(struct radeon_device *rdev, |
155 | struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, |
156 | uint64_t src_offset, |
156 | uint64_t src_offset, |
157 | uint64_t dst_offset, |
157 | uint64_t dst_offset, |
158 | unsigned num_gpu_pages, |
158 | unsigned num_gpu_pages, |
159 | struct radeon_fence **fence); |
159 | struct reservation_object *resv); |
Line 160... | Line 160... | ||
160 | void r200_set_safe_registers(struct radeon_device *rdev); |
160 | void r200_set_safe_registers(struct radeon_device *rdev); |
161 | 161 | ||
162 | /* |
162 | /* |
Line 338... | Line 338... | ||
338 | int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
338 | int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
339 | int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
339 | int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
340 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
340 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
341 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
341 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
342 | int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
342 | int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
343 | int r600_copy_cpdma(struct radeon_device *rdev, |
343 | struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, |
344 | uint64_t src_offset, uint64_t dst_offset, |
344 | uint64_t src_offset, uint64_t dst_offset, |
345 | unsigned num_gpu_pages, struct radeon_fence **fence); |
345 | unsigned num_gpu_pages, |
- | 346 | struct reservation_object *resv); |
|
346 | int r600_copy_dma(struct radeon_device *rdev, |
347 | struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, |
347 | uint64_t src_offset, uint64_t dst_offset, |
348 | uint64_t src_offset, uint64_t dst_offset, |
348 | unsigned num_gpu_pages, struct radeon_fence **fence); |
349 | unsigned num_gpu_pages, |
- | 350 | struct reservation_object *resv); |
|
349 | void r600_hpd_init(struct radeon_device *rdev); |
351 | void r600_hpd_init(struct radeon_device *rdev); |
350 | void r600_hpd_fini(struct radeon_device *rdev); |
352 | void r600_hpd_fini(struct radeon_device *rdev); |
351 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
353 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
352 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
354 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
353 | enum radeon_hpd_id hpd); |
355 | enum radeon_hpd_id hpd); |
Line 387... | Line 389... | ||
387 | void r600_irq_suspend(struct radeon_device *rdev); |
389 | void r600_irq_suspend(struct radeon_device *rdev); |
388 | void r600_disable_interrupts(struct radeon_device *rdev); |
390 | void r600_disable_interrupts(struct radeon_device *rdev); |
389 | void r600_rlc_stop(struct radeon_device *rdev); |
391 | void r600_rlc_stop(struct radeon_device *rdev); |
390 | /* r600 audio */ |
392 | /* r600 audio */ |
391 | int r600_audio_init(struct radeon_device *rdev); |
393 | int r600_audio_init(struct radeon_device *rdev); |
392 | struct r600_audio_pin r600_audio_status(struct radeon_device *rdev); |
- | |
393 | void r600_audio_fini(struct radeon_device *rdev); |
394 | void r600_audio_fini(struct radeon_device *rdev); |
394 | void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
395 | void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
395 | void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
396 | void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
396 | size_t size); |
397 | size_t size); |
397 | void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
398 | void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
Line 459... | Line 460... | ||
459 | void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
460 | void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
460 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
461 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
461 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
462 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
462 | void r700_cp_stop(struct radeon_device *rdev); |
463 | void r700_cp_stop(struct radeon_device *rdev); |
463 | void r700_cp_fini(struct radeon_device *rdev); |
464 | void r700_cp_fini(struct radeon_device *rdev); |
464 | int rv770_copy_dma(struct radeon_device *rdev, |
465 | struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, |
465 | uint64_t src_offset, uint64_t dst_offset, |
466 | uint64_t src_offset, uint64_t dst_offset, |
466 | unsigned num_gpu_pages, |
467 | unsigned num_gpu_pages, |
467 | struct radeon_fence **fence); |
468 | struct reservation_object *resv); |
468 | u32 rv770_get_xclk(struct radeon_device *rdev); |
469 | u32 rv770_get_xclk(struct radeon_device *rdev); |
469 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
470 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
470 | int rv770_get_temp(struct radeon_device *rdev); |
471 | int rv770_get_temp(struct radeon_device *rdev); |
471 | /* hdmi */ |
472 | /* hdmi */ |
472 | void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
473 | void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
Line 533... | Line 534... | ||
533 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
534 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
534 | void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
535 | void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
535 | struct radeon_fence *fence); |
536 | struct radeon_fence *fence); |
536 | void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, |
537 | void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, |
537 | struct radeon_ib *ib); |
538 | struct radeon_ib *ib); |
538 | int evergreen_copy_dma(struct radeon_device *rdev, |
539 | struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, |
539 | uint64_t src_offset, uint64_t dst_offset, |
540 | uint64_t src_offset, uint64_t dst_offset, |
540 | unsigned num_gpu_pages, |
541 | unsigned num_gpu_pages, |
541 | struct radeon_fence **fence); |
542 | struct reservation_object *resv); |
542 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
543 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
543 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
544 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
544 | int evergreen_get_temp(struct radeon_device *rdev); |
545 | int evergreen_get_temp(struct radeon_device *rdev); |
545 | int sumo_get_temp(struct radeon_device *rdev); |
546 | int sumo_get_temp(struct radeon_device *rdev); |
546 | int tn_get_temp(struct radeon_device *rdev); |
547 | int tn_get_temp(struct radeon_device *rdev); |
Line 596... | Line 597... | ||
596 | int cayman_resume(struct radeon_device *rdev); |
597 | int cayman_resume(struct radeon_device *rdev); |
597 | int cayman_asic_reset(struct radeon_device *rdev); |
598 | int cayman_asic_reset(struct radeon_device *rdev); |
598 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
599 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
599 | int cayman_vm_init(struct radeon_device *rdev); |
600 | int cayman_vm_init(struct radeon_device *rdev); |
600 | void cayman_vm_fini(struct radeon_device *rdev); |
601 | void cayman_vm_fini(struct radeon_device *rdev); |
601 | void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
602 | void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
- | 603 | unsigned vm_id, uint64_t pd_addr); |
|
602 | uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); |
604 | uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); |
603 | int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
605 | int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
604 | int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
606 | int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
605 | void cayman_dma_ring_ib_execute(struct radeon_device *rdev, |
607 | void cayman_dma_ring_ib_execute(struct radeon_device *rdev, |
606 | struct radeon_ib *ib); |
608 | struct radeon_ib *ib); |
Line 621... | Line 623... | ||
621 | uint64_t pe, |
623 | uint64_t pe, |
622 | uint64_t addr, unsigned count, |
624 | uint64_t addr, unsigned count, |
623 | uint32_t incr, uint32_t flags); |
625 | uint32_t incr, uint32_t flags); |
624 | void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
626 | void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
Line 625... | Line 627... | ||
625 | 627 | ||
- | 628 | void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
|
Line 626... | Line 629... | ||
626 | void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
629 | unsigned vm_id, uint64_t pd_addr); |
627 | 630 | ||
628 | u32 cayman_gfx_get_rptr(struct radeon_device *rdev, |
631 | u32 cayman_gfx_get_rptr(struct radeon_device *rdev, |
629 | struct radeon_ring *ring); |
632 | struct radeon_ring *ring); |
Line 696... | Line 699... | ||
696 | void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
699 | void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
697 | int si_irq_set(struct radeon_device *rdev); |
700 | int si_irq_set(struct radeon_device *rdev); |
698 | int si_irq_process(struct radeon_device *rdev); |
701 | int si_irq_process(struct radeon_device *rdev); |
699 | int si_vm_init(struct radeon_device *rdev); |
702 | int si_vm_init(struct radeon_device *rdev); |
700 | void si_vm_fini(struct radeon_device *rdev); |
703 | void si_vm_fini(struct radeon_device *rdev); |
701 | void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
704 | void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
- | 705 | unsigned vm_id, uint64_t pd_addr); |
|
702 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
706 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
703 | int si_copy_dma(struct radeon_device *rdev, |
707 | struct radeon_fence *si_copy_dma(struct radeon_device *rdev, |
704 | uint64_t src_offset, uint64_t dst_offset, |
708 | uint64_t src_offset, uint64_t dst_offset, |
705 | unsigned num_gpu_pages, |
709 | unsigned num_gpu_pages, |
706 | struct radeon_fence **fence); |
710 | struct reservation_object *resv); |
Line 707... | Line 711... | ||
707 | 711 | ||
708 | void si_dma_vm_copy_pages(struct radeon_device *rdev, |
712 | void si_dma_vm_copy_pages(struct radeon_device *rdev, |
709 | struct radeon_ib *ib, |
713 | struct radeon_ib *ib, |
710 | uint64_t pe, uint64_t src, |
714 | uint64_t pe, uint64_t src, |
Line 718... | Line 722... | ||
718 | struct radeon_ib *ib, |
722 | struct radeon_ib *ib, |
719 | uint64_t pe, |
723 | uint64_t pe, |
720 | uint64_t addr, unsigned count, |
724 | uint64_t addr, unsigned count, |
721 | uint32_t incr, uint32_t flags); |
725 | uint32_t incr, uint32_t flags); |
Line 722... | Line 726... | ||
722 | 726 | ||
- | 727 | void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
|
723 | void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
728 | unsigned vm_id, uint64_t pd_addr); |
724 | u32 si_get_xclk(struct radeon_device *rdev); |
729 | u32 si_get_xclk(struct radeon_device *rdev); |
725 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
730 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
726 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
731 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
727 | int si_get_temp(struct radeon_device *rdev); |
732 | int si_get_temp(struct radeon_device *rdev); |
Line 757... | Line 762... | ||
757 | bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
762 | bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
758 | struct radeon_ring *ring, |
763 | struct radeon_ring *ring, |
759 | struct radeon_semaphore *semaphore, |
764 | struct radeon_semaphore *semaphore, |
760 | bool emit_wait); |
765 | bool emit_wait); |
761 | void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
766 | void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
762 | int cik_copy_dma(struct radeon_device *rdev, |
767 | struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, |
763 | uint64_t src_offset, uint64_t dst_offset, |
768 | uint64_t src_offset, uint64_t dst_offset, |
764 | unsigned num_gpu_pages, |
769 | unsigned num_gpu_pages, |
765 | struct radeon_fence **fence); |
770 | struct reservation_object *resv); |
766 | int cik_copy_cpdma(struct radeon_device *rdev, |
771 | struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, |
767 | uint64_t src_offset, uint64_t dst_offset, |
772 | uint64_t src_offset, uint64_t dst_offset, |
768 | unsigned num_gpu_pages, |
773 | unsigned num_gpu_pages, |
769 | struct radeon_fence **fence); |
774 | struct reservation_object *resv); |
770 | int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
775 | int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
771 | int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
776 | int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
772 | bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
777 | bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
773 | void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
778 | void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
774 | struct radeon_fence *fence); |
779 | struct radeon_fence *fence); |
Line 790... | Line 795... | ||
790 | int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
795 | int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
791 | int cik_irq_set(struct radeon_device *rdev); |
796 | int cik_irq_set(struct radeon_device *rdev); |
792 | int cik_irq_process(struct radeon_device *rdev); |
797 | int cik_irq_process(struct radeon_device *rdev); |
793 | int cik_vm_init(struct radeon_device *rdev); |
798 | int cik_vm_init(struct radeon_device *rdev); |
794 | void cik_vm_fini(struct radeon_device *rdev); |
799 | void cik_vm_fini(struct radeon_device *rdev); |
795 | void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
800 | void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
- | 801 | unsigned vm_id, uint64_t pd_addr); |
|
Line 796... | Line 802... | ||
796 | 802 | ||
797 | void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
803 | void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
798 | struct radeon_ib *ib, |
804 | struct radeon_ib *ib, |
799 | uint64_t pe, uint64_t src, |
805 | uint64_t pe, uint64_t src, |
Line 808... | Line 814... | ||
808 | uint64_t pe, |
814 | uint64_t pe, |
809 | uint64_t addr, unsigned count, |
815 | uint64_t addr, unsigned count, |
810 | uint32_t incr, uint32_t flags); |
816 | uint32_t incr, uint32_t flags); |
811 | void cik_sdma_vm_pad_ib(struct radeon_ib *ib); |
817 | void cik_sdma_vm_pad_ib(struct radeon_ib *ib); |
Line 812... | Line 818... | ||
812 | 818 | ||
- | 819 | void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
|
813 | void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
820 | unsigned vm_id, uint64_t pd_addr); |
814 | int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
821 | int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
815 | u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
822 | u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
816 | struct radeon_ring *ring); |
823 | struct radeon_ring *ring); |
817 | u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
824 | u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
Line 880... | Line 887... | ||
880 | struct radeon_ring *ring); |
887 | struct radeon_ring *ring); |
881 | uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, |
888 | uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, |
882 | struct radeon_ring *ring); |
889 | struct radeon_ring *ring); |
883 | void uvd_v1_0_set_wptr(struct radeon_device *rdev, |
890 | void uvd_v1_0_set_wptr(struct radeon_device *rdev, |
884 | struct radeon_ring *ring); |
891 | struct radeon_ring *ring); |
- | 892 | int uvd_v1_0_resume(struct radeon_device *rdev); |
|
Line 885... | Line 893... | ||
885 | 893 | ||
886 | int uvd_v1_0_init(struct radeon_device *rdev); |
894 | int uvd_v1_0_init(struct radeon_device *rdev); |
887 | void uvd_v1_0_fini(struct radeon_device *rdev); |
895 | void uvd_v1_0_fini(struct radeon_device *rdev); |
888 | int uvd_v1_0_start(struct radeon_device *rdev); |
896 | int uvd_v1_0_start(struct radeon_device *rdev); |
Line 889... | Line 897... | ||
889 | void uvd_v1_0_stop(struct radeon_device *rdev); |
897 | void uvd_v1_0_stop(struct radeon_device *rdev); |
- | 898 | ||
- | 899 | int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
|
890 | 900 | void uvd_v1_0_fence_emit(struct radeon_device *rdev, |
|
891 | int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
901 | struct radeon_fence *fence); |
892 | int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
902 | int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
893 | bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
903 | bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
894 | struct radeon_ring *ring, |
904 | struct radeon_ring *ring, |