Rev 1963 | Rev 3192 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1963 | Rev 2997 | ||
|---|---|---|---|
| Line 40... | Line 40... | ||
| 40 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
40 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
| 41 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); |
41 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); |
| 42 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
42 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
| 43 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
43 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
| Line -... | Line 44... | ||
| - | 44 | ||
| - | 45 | void atombios_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); |
|
| - | 46 | u8 atombios_get_backlight_level(struct radeon_encoder *radeon_encoder); |
|
| - | 47 | void radeon_legacy_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); |
|
| - | 48 | u8 radeon_legacy_get_backlight_level(struct radeon_encoder *radeon_encoder); |
|
| - | 49 | ||
| 44 | 50 | ||
| 45 | /* |
51 | /* |
| 46 | * r100,rv100,rs100,rv200,rs200 |
52 | * r100,rv100,rs100,rv200,rs200 |
| 47 | */ |
53 | */ |
| 48 | struct r100_mc_save { |
54 | struct r100_mc_save { |
| Line 56... | Line 62... | ||
| 56 | int r100_init(struct radeon_device *rdev); |
62 | int r100_init(struct radeon_device *rdev); |
| 57 | void r100_fini(struct radeon_device *rdev); |
63 | void r100_fini(struct radeon_device *rdev); |
| 58 | int r100_suspend(struct radeon_device *rdev); |
64 | int r100_suspend(struct radeon_device *rdev); |
| 59 | int r100_resume(struct radeon_device *rdev); |
65 | int r100_resume(struct radeon_device *rdev); |
| 60 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
66 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
| 61 | bool r100_gpu_is_lockup(struct radeon_device *rdev); |
67 | bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 62 | int r100_asic_reset(struct radeon_device *rdev); |
68 | int r100_asic_reset(struct radeon_device *rdev); |
| 63 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
69 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
| 64 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
70 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
| 65 | int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
71 | int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
| 66 | void r100_cp_commit(struct radeon_device *rdev); |
- | |
| 67 | void r100_ring_start(struct radeon_device *rdev); |
72 | void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
| 68 | int r100_irq_set(struct radeon_device *rdev); |
73 | int r100_irq_set(struct radeon_device *rdev); |
| 69 | int r100_irq_process(struct radeon_device *rdev); |
74 | int r100_irq_process(struct radeon_device *rdev); |
| 70 | void r100_fence_ring_emit(struct radeon_device *rdev, |
75 | void r100_fence_ring_emit(struct radeon_device *rdev, |
| 71 | struct radeon_fence *fence); |
76 | struct radeon_fence *fence); |
| - | 77 | void r100_semaphore_ring_emit(struct radeon_device *rdev, |
|
| - | 78 | struct radeon_ring *cp, |
|
| - | 79 | struct radeon_semaphore *semaphore, |
|
| - | 80 | bool emit_wait); |
|
| 72 | int r100_cs_parse(struct radeon_cs_parser *p); |
81 | int r100_cs_parse(struct radeon_cs_parser *p); |
| 73 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
82 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 74 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
83 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
| 75 | int r100_copy_blit(struct radeon_device *rdev, |
84 | int r100_copy_blit(struct radeon_device *rdev, |
| 76 | uint64_t src_offset, |
85 | uint64_t src_offset, |
| 77 | uint64_t dst_offset, |
86 | uint64_t dst_offset, |
| 78 | unsigned num_pages, |
87 | unsigned num_gpu_pages, |
| 79 | struct radeon_fence *fence); |
88 | struct radeon_fence **fence); |
| 80 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
89 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
| 81 | uint32_t tiling_flags, uint32_t pitch, |
90 | uint32_t tiling_flags, uint32_t pitch, |
| 82 | uint32_t offset, uint32_t obj_size); |
91 | uint32_t offset, uint32_t obj_size); |
| 83 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
92 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
| 84 | void r100_bandwidth_update(struct radeon_device *rdev); |
93 | void r100_bandwidth_update(struct radeon_device *rdev); |
| 85 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
94 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 86 | int r100_ring_test(struct radeon_device *rdev); |
95 | int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
| 87 | void r100_hpd_init(struct radeon_device *rdev); |
96 | void r100_hpd_init(struct radeon_device *rdev); |
| 88 | void r100_hpd_fini(struct radeon_device *rdev); |
97 | void r100_hpd_fini(struct radeon_device *rdev); |
| 89 | bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
98 | bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 90 | void r100_hpd_set_polarity(struct radeon_device *rdev, |
99 | void r100_hpd_set_polarity(struct radeon_device *rdev, |
| 91 | enum radeon_hpd_id hpd); |
100 | enum radeon_hpd_id hpd); |
| Line 98... | Line 107... | ||
| 98 | void r100_pci_gart_fini(struct radeon_device *rdev); |
107 | void r100_pci_gart_fini(struct radeon_device *rdev); |
| 99 | int r100_pci_gart_enable(struct radeon_device *rdev); |
108 | int r100_pci_gart_enable(struct radeon_device *rdev); |
| 100 | void r100_pci_gart_disable(struct radeon_device *rdev); |
109 | void r100_pci_gart_disable(struct radeon_device *rdev); |
| 101 | int r100_debugfs_mc_info_init(struct radeon_device *rdev); |
110 | int r100_debugfs_mc_info_init(struct radeon_device *rdev); |
| 102 | int r100_gui_wait_for_idle(struct radeon_device *rdev); |
111 | int r100_gui_wait_for_idle(struct radeon_device *rdev); |
| 103 | void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup, |
- | |
| 104 | struct radeon_cp *cp); |
- | |
| 105 | bool r100_gpu_cp_is_lockup(struct radeon_device *rdev, |
- | |
| 106 | struct r100_gpu_lockup *lockup, |
- | |
| 107 | struct radeon_cp *cp); |
- | |
| 108 | void r100_ib_fini(struct radeon_device *rdev); |
- | |
| 109 | int r100_ib_init(struct radeon_device *rdev); |
112 | int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 110 | void r100_irq_disable(struct radeon_device *rdev); |
113 | void r100_irq_disable(struct radeon_device *rdev); |
| 111 | void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); |
114 | void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); |
| 112 | void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); |
115 | void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); |
| 113 | void r100_vram_init_sizes(struct radeon_device *rdev); |
116 | void r100_vram_init_sizes(struct radeon_device *rdev); |
| 114 | int r100_cp_reset(struct radeon_device *rdev); |
117 | int r100_cp_reset(struct radeon_device *rdev); |
| Line 134... | Line 137... | ||
| 134 | extern void r100_pm_init_profile(struct radeon_device *rdev); |
137 | extern void r100_pm_init_profile(struct radeon_device *rdev); |
| 135 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
138 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
| 136 | extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc); |
139 | extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc); |
| 137 | extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
140 | extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 138 | extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); |
141 | extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); |
| - | 142 | extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); |
|
| - | 143 | extern int r100_mc_wait_for_idle(struct radeon_device *rdev); |
|
| Line 139... | Line 144... | ||
| 139 | 144 | ||
| 140 | /* |
145 | /* |
| 141 | * r200,rv250,rs300,rv280 |
146 | * r200,rv250,rs300,rv280 |
| 142 | */ |
147 | */ |
| 143 | extern int r200_copy_dma(struct radeon_device *rdev, |
148 | extern int r200_copy_dma(struct radeon_device *rdev, |
| 144 | uint64_t src_offset, |
149 | uint64_t src_offset, |
| 145 | uint64_t dst_offset, |
150 | uint64_t dst_offset, |
| 146 | unsigned num_pages, |
151 | unsigned num_gpu_pages, |
| 147 | struct radeon_fence *fence); |
152 | struct radeon_fence **fence); |
| Line 148... | Line 153... | ||
| 148 | void r200_set_safe_registers(struct radeon_device *rdev); |
153 | void r200_set_safe_registers(struct radeon_device *rdev); |
| 149 | 154 | ||
| 150 | /* |
155 | /* |
| 151 | * r300,r350,rv350,rv380 |
156 | * r300,r350,rv350,rv380 |
| 152 | */ |
157 | */ |
| 153 | extern int r300_init(struct radeon_device *rdev); |
158 | extern int r300_init(struct radeon_device *rdev); |
| 154 | extern void r300_fini(struct radeon_device *rdev); |
159 | extern void r300_fini(struct radeon_device *rdev); |
| 155 | extern int r300_suspend(struct radeon_device *rdev); |
- | |
| 156 | extern int r300_resume(struct radeon_device *rdev); |
160 | extern int r300_suspend(struct radeon_device *rdev); |
| 157 | extern bool r300_gpu_is_lockup(struct radeon_device *rdev); |
161 | extern int r300_resume(struct radeon_device *rdev); |
| 158 | extern int r300_asic_reset(struct radeon_device *rdev); |
162 | extern int r300_asic_reset(struct radeon_device *rdev); |
| 159 | extern void r300_ring_start(struct radeon_device *rdev); |
163 | extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
| 160 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
164 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
| 161 | struct radeon_fence *fence); |
165 | struct radeon_fence *fence); |
| 162 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
166 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
| Line 171... | Line 175... | ||
| 171 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
175 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
| 172 | extern int rv370_pcie_gart_init(struct radeon_device *rdev); |
176 | extern int rv370_pcie_gart_init(struct radeon_device *rdev); |
| 173 | extern void rv370_pcie_gart_fini(struct radeon_device *rdev); |
177 | extern void rv370_pcie_gart_fini(struct radeon_device *rdev); |
| 174 | extern int rv370_pcie_gart_enable(struct radeon_device *rdev); |
178 | extern int rv370_pcie_gart_enable(struct radeon_device *rdev); |
| 175 | extern void rv370_pcie_gart_disable(struct radeon_device *rdev); |
179 | extern void rv370_pcie_gart_disable(struct radeon_device *rdev); |
| - | 180 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
|
| Line 176... | Line 181... | ||
| 176 | 181 | ||
| 177 | /* |
182 | /* |
| 178 | * r420,r423,rv410 |
183 | * r420,r423,rv410 |
| 179 | */ |
184 | */ |
| Line 201... | Line 206... | ||
| 201 | int rs400_gart_init(struct radeon_device *rdev); |
206 | int rs400_gart_init(struct radeon_device *rdev); |
| 202 | int rs400_gart_enable(struct radeon_device *rdev); |
207 | int rs400_gart_enable(struct radeon_device *rdev); |
| 203 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
208 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
| 204 | void rs400_gart_disable(struct radeon_device *rdev); |
209 | void rs400_gart_disable(struct radeon_device *rdev); |
| 205 | void rs400_gart_fini(struct radeon_device *rdev); |
210 | void rs400_gart_fini(struct radeon_device *rdev); |
| - | 211 | extern int rs400_mc_wait_for_idle(struct radeon_device *rdev); |
|
| Line 206... | Line 212... | ||
| 206 | 212 | ||
| 207 | /* |
213 | /* |
| 208 | * rs600. |
214 | * rs600. |
| 209 | */ |
215 | */ |
| Line 231... | Line 237... | ||
| 231 | extern void rs600_pm_finish(struct radeon_device *rdev); |
237 | extern void rs600_pm_finish(struct radeon_device *rdev); |
| 232 | extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc); |
238 | extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc); |
| 233 | extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
239 | extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 234 | extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc); |
240 | extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc); |
| 235 | void rs600_set_safe_registers(struct radeon_device *rdev); |
241 | void rs600_set_safe_registers(struct radeon_device *rdev); |
| 236 | - | ||
| - | 242 | extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); |
|
| - | 243 | extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); |
|
| Line 237... | Line 244... | ||
| 237 | 244 | ||
| 238 | /* |
245 | /* |
| 239 | * rs690,rs740 |
246 | * rs690,rs740 |
| 240 | */ |
247 | */ |
| Line 246... | Line 253... | ||
| 246 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
253 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 247 | void rs690_bandwidth_update(struct radeon_device *rdev); |
254 | void rs690_bandwidth_update(struct radeon_device *rdev); |
| 248 | void rs690_line_buffer_adjust(struct radeon_device *rdev, |
255 | void rs690_line_buffer_adjust(struct radeon_device *rdev, |
| 249 | struct drm_display_mode *mode1, |
256 | struct drm_display_mode *mode1, |
| 250 | struct drm_display_mode *mode2); |
257 | struct drm_display_mode *mode2); |
| - | 258 | extern int rs690_mc_wait_for_idle(struct radeon_device *rdev); |
|
| Line 251... | Line 259... | ||
| 251 | 259 | ||
| 252 | /* |
260 | /* |
| 253 | * rv515 |
261 | * rv515 |
| 254 | */ |
262 | */ |
| 255 | struct rv515_mc_save { |
- | |
| 256 | u32 d1vga_control; |
- | |
| 257 | u32 d2vga_control; |
263 | struct rv515_mc_save { |
| 258 | u32 vga_render_control; |
264 | u32 vga_render_control; |
| 259 | u32 vga_hdp_control; |
- | |
| 260 | u32 d1crtc_control; |
- | |
| 261 | u32 d2crtc_control; |
265 | u32 vga_hdp_control; |
| - | 266 | }; |
|
| 262 | }; |
267 | |
| 263 | int rv515_init(struct radeon_device *rdev); |
268 | int rv515_init(struct radeon_device *rdev); |
| 264 | void rv515_fini(struct radeon_device *rdev); |
269 | void rv515_fini(struct radeon_device *rdev); |
| 265 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
270 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 266 | void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
271 | void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 267 | void rv515_ring_start(struct radeon_device *rdev); |
272 | void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
| 268 | void rv515_bandwidth_update(struct radeon_device *rdev); |
273 | void rv515_bandwidth_update(struct radeon_device *rdev); |
| 269 | int rv515_resume(struct radeon_device *rdev); |
274 | int rv515_resume(struct radeon_device *rdev); |
| 270 | int rv515_suspend(struct radeon_device *rdev); |
275 | int rv515_suspend(struct radeon_device *rdev); |
| 271 | void rv515_bandwidth_avivo_update(struct radeon_device *rdev); |
276 | void rv515_bandwidth_avivo_update(struct radeon_device *rdev); |
| 272 | void rv515_vga_render_disable(struct radeon_device *rdev); |
277 | void rv515_vga_render_disable(struct radeon_device *rdev); |
| 273 | void rv515_set_safe_registers(struct radeon_device *rdev); |
278 | void rv515_set_safe_registers(struct radeon_device *rdev); |
| 274 | void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); |
279 | void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); |
| 275 | void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); |
280 | void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); |
| 276 | void rv515_clock_startup(struct radeon_device *rdev); |
281 | void rv515_clock_startup(struct radeon_device *rdev); |
| 277 | void rv515_debugfs(struct radeon_device *rdev); |
- | |
| - | 282 | void rv515_debugfs(struct radeon_device *rdev); |
|
| Line 278... | Line 283... | ||
| 278 | 283 | int rv515_mc_wait_for_idle(struct radeon_device *rdev); |
|
| 279 | 284 | ||
| 280 | /* |
285 | /* |
| 281 | * r520,rv530,rv560,rv570,r580 |
286 | * r520,rv530,rv560,rv570,r580 |
| 282 | */ |
287 | */ |
| - | 288 | int r520_init(struct radeon_device *rdev); |
|
| Line 283... | Line 289... | ||
| 283 | int r520_init(struct radeon_device *rdev); |
289 | int r520_resume(struct radeon_device *rdev); |
| 284 | int r520_resume(struct radeon_device *rdev); |
290 | int r520_mc_wait_for_idle(struct radeon_device *rdev); |
| 285 | 291 | ||
| 286 | /* |
292 | /* |
| Line 291... | Line 297... | ||
| 291 | int r600_suspend(struct radeon_device *rdev); |
297 | int r600_suspend(struct radeon_device *rdev); |
| 292 | int r600_resume(struct radeon_device *rdev); |
298 | int r600_resume(struct radeon_device *rdev); |
| 293 | void r600_vga_set_state(struct radeon_device *rdev, bool state); |
299 | void r600_vga_set_state(struct radeon_device *rdev, bool state); |
| 294 | int r600_wb_init(struct radeon_device *rdev); |
300 | int r600_wb_init(struct radeon_device *rdev); |
| 295 | void r600_wb_fini(struct radeon_device *rdev); |
301 | void r600_wb_fini(struct radeon_device *rdev); |
| 296 | void r600_cp_commit(struct radeon_device *rdev); |
- | |
| 297 | void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); |
302 | void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 298 | uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
303 | uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
| 299 | void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
304 | void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 300 | int r600_cs_parse(struct radeon_cs_parser *p); |
305 | int r600_cs_parse(struct radeon_cs_parser *p); |
| 301 | void r600_fence_ring_emit(struct radeon_device *rdev, |
306 | void r600_fence_ring_emit(struct radeon_device *rdev, |
| 302 | struct radeon_fence *fence); |
307 | struct radeon_fence *fence); |
| - | 308 | void r600_semaphore_ring_emit(struct radeon_device *rdev, |
|
| - | 309 | struct radeon_ring *cp, |
|
| - | 310 | struct radeon_semaphore *semaphore, |
|
| - | 311 | bool emit_wait); |
|
| 303 | bool r600_gpu_is_lockup(struct radeon_device *rdev); |
312 | bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 304 | int r600_asic_reset(struct radeon_device *rdev); |
313 | int r600_asic_reset(struct radeon_device *rdev); |
| 305 | int r600_set_surface_reg(struct radeon_device *rdev, int reg, |
314 | int r600_set_surface_reg(struct radeon_device *rdev, int reg, |
| 306 | uint32_t tiling_flags, uint32_t pitch, |
315 | uint32_t tiling_flags, uint32_t pitch, |
| 307 | uint32_t offset, uint32_t obj_size); |
316 | uint32_t offset, uint32_t obj_size); |
| 308 | void r600_clear_surface_reg(struct radeon_device *rdev, int reg); |
317 | void r600_clear_surface_reg(struct radeon_device *rdev, int reg); |
| 309 | int r600_ib_test(struct radeon_device *rdev); |
318 | int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 310 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
319 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 311 | int r600_ring_test(struct radeon_device *rdev); |
320 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
| 312 | int r600_copy_blit(struct radeon_device *rdev, |
321 | int r600_copy_blit(struct radeon_device *rdev, |
| 313 | uint64_t src_offset, uint64_t dst_offset, |
322 | uint64_t src_offset, uint64_t dst_offset, |
| 314 | unsigned num_pages, struct radeon_fence *fence); |
323 | unsigned num_gpu_pages, struct radeon_fence **fence); |
| 315 | void r600_hpd_init(struct radeon_device *rdev); |
324 | void r600_hpd_init(struct radeon_device *rdev); |
| 316 | void r600_hpd_fini(struct radeon_device *rdev); |
325 | void r600_hpd_fini(struct radeon_device *rdev); |
| 317 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
326 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 318 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
327 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
| 319 | enum radeon_hpd_id hpd); |
328 | enum radeon_hpd_id hpd); |
| Line 326... | Line 335... | ||
| 326 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
335 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
| 327 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
336 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
| 328 | bool r600_card_posted(struct radeon_device *rdev); |
337 | bool r600_card_posted(struct radeon_device *rdev); |
| 329 | void r600_cp_stop(struct radeon_device *rdev); |
338 | void r600_cp_stop(struct radeon_device *rdev); |
| 330 | int r600_cp_start(struct radeon_device *rdev); |
339 | int r600_cp_start(struct radeon_device *rdev); |
| 331 | void r600_ring_init(struct radeon_device *rdev, unsigned ring_size); |
340 | void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size); |
| 332 | int r600_cp_resume(struct radeon_device *rdev); |
341 | int r600_cp_resume(struct radeon_device *rdev); |
| 333 | void r600_cp_fini(struct radeon_device *rdev); |
342 | void r600_cp_fini(struct radeon_device *rdev); |
| 334 | int r600_count_pipe_bits(uint32_t val); |
343 | int r600_count_pipe_bits(uint32_t val); |
| 335 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
344 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
| 336 | int r600_pcie_gart_init(struct radeon_device *rdev); |
345 | int r600_pcie_gart_init(struct radeon_device *rdev); |
| Line 347... | Line 356... | ||
| 347 | void r600_irq_suspend(struct radeon_device *rdev); |
356 | void r600_irq_suspend(struct radeon_device *rdev); |
| 348 | void r600_disable_interrupts(struct radeon_device *rdev); |
357 | void r600_disable_interrupts(struct radeon_device *rdev); |
| 349 | void r600_rlc_stop(struct radeon_device *rdev); |
358 | void r600_rlc_stop(struct radeon_device *rdev); |
| 350 | /* r600 audio */ |
359 | /* r600 audio */ |
| 351 | int r600_audio_init(struct radeon_device *rdev); |
360 | int r600_audio_init(struct radeon_device *rdev); |
| 352 | int r600_audio_tmds_index(struct drm_encoder *encoder); |
- | |
| 353 | void r600_audio_set_clock(struct drm_encoder *encoder, int clock); |
361 | void r600_audio_set_clock(struct drm_encoder *encoder, int clock); |
| 354 | int r600_audio_channels(struct radeon_device *rdev); |
- | |
| 355 | int r600_audio_bits_per_sample(struct radeon_device *rdev); |
- | |
| 356 | int r600_audio_rate(struct radeon_device *rdev); |
- | |
| 357 | uint8_t r600_audio_status_bits(struct radeon_device *rdev); |
362 | struct r600_audio r600_audio_status(struct radeon_device *rdev); |
| 358 | uint8_t r600_audio_category_code(struct radeon_device *rdev); |
- | |
| 359 | void r600_audio_schedule_polling(struct radeon_device *rdev); |
- | |
| 360 | void r600_audio_enable_polling(struct drm_encoder *encoder); |
- | |
| 361 | void r600_audio_disable_polling(struct drm_encoder *encoder); |
- | |
| 362 | void r600_audio_fini(struct radeon_device *rdev); |
363 | void r600_audio_fini(struct radeon_device *rdev); |
| 363 | void r600_hdmi_init(struct drm_encoder *encoder); |
- | |
| 364 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
364 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
| 365 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
365 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
| 366 | /* r600 blit */ |
366 | /* r600 blit */ |
| 367 | int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes); |
367 | int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages, |
| - | 368 | struct radeon_fence **fence, struct radeon_sa_bo **vb, |
|
| - | 369 | struct radeon_semaphore **sem); |
|
| 368 | void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence); |
370 | void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence **fence, |
| - | 371 | struct radeon_sa_bo *vb, struct radeon_semaphore *sem); |
|
| 369 | void r600_kms_blit_copy(struct radeon_device *rdev, |
372 | void r600_kms_blit_copy(struct radeon_device *rdev, |
| 370 | u64 src_gpu_addr, u64 dst_gpu_addr, |
373 | u64 src_gpu_addr, u64 dst_gpu_addr, |
| - | 374 | unsigned num_gpu_pages, |
|
| 371 | int size_bytes); |
375 | struct radeon_sa_bo *vb); |
| - | 376 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
|
| - | 377 | uint64_t r600_get_gpu_clock(struct radeon_device *rdev); |
|
| Line 372... | Line 378... | ||
| 372 | 378 | ||
| 373 | /* |
379 | /* |
| 374 | * rv770,rv730,rv710,rv740 |
380 | * rv770,rv730,rv710,rv740 |
| 375 | */ |
381 | */ |
| Line 385... | Line 391... | ||
| 385 | 391 | ||
| 386 | /* |
392 | /* |
| 387 | * evergreen |
393 | * evergreen |
| 388 | */ |
394 | */ |
| 389 | struct evergreen_mc_save { |
- | |
| 390 | u32 vga_control[6]; |
395 | struct evergreen_mc_save { |
| 391 | u32 vga_render_control; |
396 | u32 vga_render_control; |
| 392 | u32 vga_hdp_control; |
397 | u32 vga_hdp_control; |
| 393 | u32 crtc_control[6]; |
398 | bool crtc_enabled[RADEON_MAX_CRTCS]; |
| - | 399 | }; |
|
| 394 | }; |
400 | |
| 395 | void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); |
401 | void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 396 | int evergreen_init(struct radeon_device *rdev); |
402 | int evergreen_init(struct radeon_device *rdev); |
| 397 | void evergreen_fini(struct radeon_device *rdev); |
403 | void evergreen_fini(struct radeon_device *rdev); |
| 398 | int evergreen_suspend(struct radeon_device *rdev); |
404 | int evergreen_suspend(struct radeon_device *rdev); |
| 399 | int evergreen_resume(struct radeon_device *rdev); |
405 | int evergreen_resume(struct radeon_device *rdev); |
| 400 | bool evergreen_gpu_is_lockup(struct radeon_device *rdev); |
406 | bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 401 | int evergreen_asic_reset(struct radeon_device *rdev); |
407 | int evergreen_asic_reset(struct radeon_device *rdev); |
| 402 | void evergreen_bandwidth_update(struct radeon_device *rdev); |
408 | void evergreen_bandwidth_update(struct radeon_device *rdev); |
| 403 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
- | |
| 404 | int evergreen_copy_blit(struct radeon_device *rdev, |
- | |
| 405 | uint64_t src_offset, uint64_t dst_offset, |
- | |
| 406 | unsigned num_pages, struct radeon_fence *fence); |
409 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 407 | void evergreen_hpd_init(struct radeon_device *rdev); |
410 | void evergreen_hpd_init(struct radeon_device *rdev); |
| 408 | void evergreen_hpd_fini(struct radeon_device *rdev); |
411 | void evergreen_hpd_fini(struct radeon_device *rdev); |
| 409 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
412 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 410 | void evergreen_hpd_set_polarity(struct radeon_device *rdev, |
413 | void evergreen_hpd_set_polarity(struct radeon_device *rdev, |
| Line 414... | Line 417... | ||
| 414 | int evergreen_irq_process(struct radeon_device *rdev); |
417 | int evergreen_irq_process(struct radeon_device *rdev); |
| 415 | extern int evergreen_cs_parse(struct radeon_cs_parser *p); |
418 | extern int evergreen_cs_parse(struct radeon_cs_parser *p); |
| 416 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
419 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
| 417 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
420 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
| 418 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
421 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
| - | 422 | extern void sumo_pm_init_profile(struct radeon_device *rdev); |
|
| - | 423 | extern void btc_pm_init_profile(struct radeon_device *rdev); |
|
| 419 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
424 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
| 420 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
425 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 421 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
426 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
| - | 427 | extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); |
|
| 422 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
428 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
| 423 | int evergreen_blit_init(struct radeon_device *rdev); |
429 | int evergreen_blit_init(struct radeon_device *rdev); |
| 424 | void evergreen_blit_fini(struct radeon_device *rdev); |
430 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
| 425 | /* evergreen blit */ |
- | |
| 426 | int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes); |
- | |
| 427 | void evergreen_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence); |
- | |
| 428 | void evergreen_kms_blit_copy(struct radeon_device *rdev, |
- | |
| 429 | u64 src_gpu_addr, u64 dst_gpu_addr, |
- | |
| 430 | int size_bytes); |
- | |
| Line 431... | Line 431... | ||
| 431 | 431 | ||
| 432 | /* |
432 | /* |
| 433 | * cayman |
433 | * cayman |
| - | 434 | */ |
|
| - | 435 | void cayman_fence_ring_emit(struct radeon_device *rdev, |
|
| 434 | */ |
436 | struct radeon_fence *fence); |
| 435 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
437 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 436 | int cayman_init(struct radeon_device *rdev); |
438 | int cayman_init(struct radeon_device *rdev); |
| 437 | void cayman_fini(struct radeon_device *rdev); |
439 | void cayman_fini(struct radeon_device *rdev); |
| 438 | int cayman_suspend(struct radeon_device *rdev); |
440 | int cayman_suspend(struct radeon_device *rdev); |
| 439 | int cayman_resume(struct radeon_device *rdev); |
- | |
| 440 | bool cayman_gpu_is_lockup(struct radeon_device *rdev); |
441 | int cayman_resume(struct radeon_device *rdev); |
| - | 442 | int cayman_asic_reset(struct radeon_device *rdev); |
|
| - | 443 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
|
| - | 444 | int cayman_vm_init(struct radeon_device *rdev); |
|
| - | 445 | void cayman_vm_fini(struct radeon_device *rdev); |
|
| - | 446 | void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
|
| - | 447 | uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); |
|
| - | 448 | void cayman_vm_set_page(struct radeon_device *rdev, uint64_t pe, |
|
| - | 449 | uint64_t addr, unsigned count, |
|
| - | 450 | uint32_t incr, uint32_t flags); |
|
| - | 451 | int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
|
| - | 452 | ||
| - | 453 | /* DCE6 - SI */ |
|
| - | 454 | void dce6_bandwidth_update(struct radeon_device *rdev); |
|
| - | 455 | ||
| - | 456 | /* |
|
| - | 457 | * si |
|
| - | 458 | */ |
|
| - | 459 | void si_fence_ring_emit(struct radeon_device *rdev, |
|
| - | 460 | struct radeon_fence *fence); |
|
| - | 461 | void si_pcie_gart_tlb_flush(struct radeon_device *rdev); |
|
| - | 462 | int si_init(struct radeon_device *rdev); |
|
| - | 463 | void si_fini(struct radeon_device *rdev); |
|
| - | 464 | int si_suspend(struct radeon_device *rdev); |
|
| - | 465 | int si_resume(struct radeon_device *rdev); |
|
| - | 466 | bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
|
| - | 467 | int si_asic_reset(struct radeon_device *rdev); |
|
| - | 468 | void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
|
| - | 469 | int si_irq_set(struct radeon_device *rdev); |
|
| - | 470 | int si_irq_process(struct radeon_device *rdev); |
|
| - | 471 | int si_vm_init(struct radeon_device *rdev); |
|
| - | 472 | void si_vm_fini(struct radeon_device *rdev); |
|
| - | 473 | void si_vm_set_page(struct radeon_device *rdev, uint64_t pe, |
|
| - | 474 | uint64_t addr, unsigned count, |
|
| - | 475 | uint32_t incr, uint32_t flags); |
|
| - | 476 | void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
|
| - | 477 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
|
| Line 441... | Line 478... | ||
| 441 | int cayman_asic_reset(struct radeon_device *rdev); |
478 | uint64_t si_get_gpu_clock(struct radeon_device *rdev); |