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| Rev 1123 | Rev 1126 | ||
|---|---|---|---|
| Line 108... | Line 108... | ||
| 108 | CHIP_RV670, |
108 | CHIP_RV670, |
| 109 | CHIP_RS780, |
109 | CHIP_RS780, |
| 110 | CHIP_RV770, |
110 | CHIP_RV770, |
| 111 | CHIP_RV730, |
111 | CHIP_RV730, |
| 112 | CHIP_RV710, |
112 | CHIP_RV710, |
| 113 | CHIP_RV740, |
- | |
| 114 | CHIP_LAST, |
113 | CHIP_LAST, |
| 115 | }; |
114 | }; |
| Line 116... | Line 115... | ||
| 116 | 115 | ||
| 117 | enum radeon_chip_flags { |
116 | enum radeon_chip_flags { |
| Line 229... | Line 228... | ||
| 229 | */ |
228 | */ |
| 230 | struct radeon_gem { |
229 | struct radeon_gem { |
| 231 | struct list_head objects; |
230 | struct list_head objects; |
| 232 | }; |
231 | }; |
| Line -... | Line 232... | ||
| - | 232 | ||
| - | 233 | int radeon_gem_init(struct radeon_device *rdev); |
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| - | 234 | void radeon_gem_fini(struct radeon_device *rdev); |
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| - | 235 | int radeon_gem_object_create(struct radeon_device *rdev, int size, |
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| - | 236 | int alignment, int initial_domain, |
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| - | 237 | bool discardable, bool kernel, |
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| - | 238 | bool interruptible, |
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| - | 239 | struct drm_gem_object **obj); |
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| - | 240 | int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain, |
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| - | 241 | uint64_t *gpu_addr); |
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| Line 233... | Line 242... | ||
| 233 | 242 | void radeon_gem_object_unpin(struct drm_gem_object *obj); |
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| 234 | 243 | ||
| 235 | 244 | ||
| Line 517... | Line 526... | ||
| 517 | uint8_t *bios; |
526 | uint8_t *bios; |
| 518 | bool is_atom_bios; |
527 | bool is_atom_bios; |
| 519 | uint16_t bios_header_start; |
528 | uint16_t bios_header_start; |
| Line 520... | Line 529... | ||
| 520 | 529 | ||
| 521 | // struct radeon_object *stollen_vga_memory; |
530 | // struct radeon_object *stollen_vga_memory; |
| 522 | // struct fb_info *fbdev_info; |
531 | struct fb_info *fbdev_info; |
| 523 | struct radeon_object *fbdev_robj; |
532 | struct radeon_object *fbdev_robj; |
| Line 524... | Line 533... | ||
| 524 | struct radeon_framebuffer *fbdev_rfb; |
533 | struct radeon_framebuffer *fbdev_rfb; |
| 525 | 534 | ||
| Line 547... | Line 556... | ||
| 547 | struct radeon_fence_driver fence_drv; |
556 | struct radeon_fence_driver fence_drv; |
| 548 | struct radeon_cp cp; |
557 | struct radeon_cp cp; |
| 549 | struct radeon_ib_pool ib_pool; |
558 | struct radeon_ib_pool ib_pool; |
| 550 | // struct radeon_irq irq; |
559 | // struct radeon_irq irq; |
| 551 | struct radeon_asic *asic; |
560 | struct radeon_asic *asic; |
| 552 | // struct radeon_gem gem; |
561 | struct radeon_gem gem; |
| 553 | // struct mutex cs_mutex; |
562 | // struct mutex cs_mutex; |
| 554 | struct radeon_wb wb; |
563 | struct radeon_wb wb; |
| 555 | bool gpu_lockup; |
564 | bool gpu_lockup; |
| 556 | bool shutdown; |
565 | bool shutdown; |
| 557 | bool suspend; |
566 | bool suspend; |
| Line 896... | Line 905... | ||
| 896 | {0x1002, 0x9403, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
905 | {0x1002, 0x9403, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
| 897 | {0x1002, 0x9405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
906 | {0x1002, 0x9405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
| 898 | {0x1002, 0x940A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
907 | {0x1002, 0x940A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
| 899 | {0x1002, 0x940B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
908 | {0x1002, 0x940B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
| 900 | {0x1002, 0x940F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
909 | {0x1002, 0x940F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ |
| 901 | {0x1002, 0x94A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
- | |
| 902 | {0x1002, 0x94A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
- | |
| 903 | {0x1002, 0x94B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ |
- | |
| 904 | {0x1002, 0x94B3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ |
- | |
| 905 | {0x1002, 0x94B5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ |
- | |
| 906 | {0x1002, 0x9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
910 | {0x1002, 0x9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
| 907 | {0x1002, 0x9441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
911 | {0x1002, 0x9441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
| 908 | {0x1002, 0x9442, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
912 | {0x1002, 0x9442, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
| 909 | {0x1002, 0x9444, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
913 | {0x1002, 0x9444, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
| 910 | {0x1002, 0x9446, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
914 | {0x1002, 0x9446, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |